CN113994768A

CN113994768A - Circuit board

Info

Publication number: CN113994768A
Application number: CN202080041866.0A
Authority: CN
Inventors: 罗世雄; 梁义烈; 柳到爀
Original assignee: LG Innotek Co Ltd
Current assignee: LG Innotek Co Ltd
Priority date: 2019-06-04
Filing date: 2020-05-29
Publication date: 2022-01-28
Anticipated expiration: 2040-05-29
Also published as: WO2020246755A1; CN113994768B

Abstract

The circuit board according to the embodiment includes: a first insulating layer; a circuit pattern on the first insulating layer; and a second insulating layer on the circuit pattern, wherein a plurality of holes are formed inside the first insulating layer and/or the second insulating layer, the holes are formed to have a diameter of 100nm to 300nm, and a porosity of the first insulating layer and/or a porosity of the second insulating layer is 5% to 10%.

Description

Circuit board

Technical Field

The present invention relates to a circuit board.

Background

A Printed Circuit Board (PCB) is formed by printing a circuit line pattern on an electrically insulating substrate with a conductive material such as copper, and thus the PCB refers to a board immediately before electronic components are mounted thereon. That is, in order to densely mount various types of electronic components on a flat surface, a PCB refers to a circuit board having a flat surface on which a mounting position of each component is fixed and on which a circuit pattern connecting the components is fixedly printed.

Generally, as a surface treatment method of a circuit pattern included in the PCB, an Organic Solderability Preservation (OSP) method, an electrolytic nickel/electrolytic gold cobalt alloy method, an electroless nickel/electroless palladium/electroless gold plating method, and the like are used.

In this case, the above surface treatment method varies depending on its use, and the use includes, for example, soldering, wire bonding, and connectors.

The components mounted on the printed circuit board may transmit signals generated from the components through circuit patterns connected to the components.

Meanwhile, recently, with the advancement of functions of portable electronic devices and the like, high frequency of signals is being carried out to perform high speed processing of a large amount of information, and a circuit pattern of a printed circuit board suitable for high frequency applications is required.

The circuit pattern of such a printed circuit board needs to reduce transmission loss in order to enable transmission without deteriorating the quality of high-frequency signals.

The transmission loss of the circuit pattern of the printed circuit board is mainly composed of conductor loss due to the copper foil and dielectric loss due to the insulator.

Meanwhile, as the thickness of the insulator increases, dielectric loss between the upper and lower circuits of the insulator decreases. In this case, there is a problem in that the total thickness of the circuit board increases.

Further, when an insulator having a low dielectric constant is used, the strength of the insulator is reduced, and thus there is a problem that the reliability of the circuit board is reduced.

Therefore, there is a need for a printed circuit board of a new structure suitable for transmitting high frequency signals, including an insulator having a low dielectric constant while having sufficient strength.

Disclosure of Invention

Technical problem

Embodiments are directed to providing a circuit board having a low dielectric constant while maintaining rigidity and having improved thermal reliability.

Technical scheme

The circuit board according to one embodiment includes: a first insulating layer; a circuit pattern on the first insulating layer; and a second insulating layer on the circuit pattern, wherein a plurality of holes are formed inside at least one of the first insulating layer and the second insulating layer, the holes being formed to have a diameter of 100nm to 300nm, and at least one of a porosity of the first insulating layer and a porosity of the second insulating layer is 5% to 10%.

The circuit board according to one embodiment includes: a first insulating layer; a circuit pattern on the first insulating layer; and a second insulating layer on the circuit pattern, wherein at least one of the first insulating layer and the second insulating layer includes an inorganic filler including a first inorganic filler having a positive thermal expansion coefficient and a second inorganic filler having a negative thermal expansion coefficient.

Advantageous effects

The circuit board according to the embodiment may form a hole in at least one of the plurality of insulating layers.

A hole may be formed in the interior of the insulating layer to reduce the overall dielectric constant of the insulating layer.

For example, when the insulating layer includes a prepreg, the dielectric constant of the insulating layer may be 3.5 or more, and the dielectric loss may be about 0.01 or more. When the dielectric loss increases, there is a problem in that the loss of the high-frequency signal increases due to the dielectric loss when the circuit board according to the embodiment is used for high-frequency applications.

In general, the dielectric constant may be proportional to the dielectric loss, and in order to reduce the dielectric loss, the dielectric constant should be reduced, but in the case of a material having a low dielectric constant, the strength is reduced together with the dielectric constant, so that there is a problem that the reliability of the circuit board is reduced.

Therefore, the circuit board according to the embodiment forms the hole in the insulating layer, in which the air having the dielectric constant of 1 is formed, without changing the material of the insulating layer to maintain the rigidity of the insulating layer, thereby reducing the average dielectric constant of the insulating layer.

That is, by lowering the dielectric constant of the insulating layer, the dielectric loss can be reduced, and the signal loss in the circuit board transmitting the high-frequency signal can be reduced as a whole.

Further, the circuit board according to the embodiment may include holes having different diameters in the insulating layer.

In this case, by making the ratio of the small-sized holes larger than the ratio of the large-sized holes, the dielectric constant of the insulating layer can be reduced and the difference in dielectric constant according to the position of the insulating layer can be reduced.

In the hole formed in the insulating layer, the overall dielectric constant of the insulating layer may decrease as the size of the hole increases. However, when a hole having a large diameter is formed in each insulating layer, in the insulating layer, a dimensional deviation of a dielectric constant increases for each position of the insulating layer, and thus thermal characteristics and signal transmission characteristics of the circuit board may be deteriorated.

Accordingly, while the overall dielectric constant size of the insulating layer including the plurality of holes having different sizes in the insulating layer is reduced, the small-sized holes are formed more than the large-sized holes, and thus the dielectric constant difference in the insulating layer according to the position of the insulating layer can be reduced. Therefore, the uniformity of the dielectric constant in the insulating layer according to the position of the insulating layer can be improved, thereby improving the thermal characteristics and signal transmission characteristics of the circuit board.

In addition, the circuit board according to the embodiment may include various inorganic fillers capable of reducing the total thermal expansion coefficient of the insulating layers within the insulating layer 111 to solve the above-mentioned problems due to the high thermal expansion coefficient of the insulating layers, thereby improving the reliability of the circuit board.

In addition, the circuit board according to the embodiment may include a plurality of inorganic fillers having different characteristics and different thermal expansion coefficients within the insulating layer. Therefore, in the circuit board according to the embodiment, the inorganic filler having a negative thermal expansion coefficient and the inorganic filler having a positive thermal expansion coefficient may be added together to the insulating layer to reduce the overall thermal expansion coefficient of the insulating layer.

Therefore, the circuit board according to the embodiment can prevent cracks of the circuit board due to the difference in thermal expansion coefficient between the insulating layer and the electronic component by reducing the difference in thermal expansion coefficient between the insulating layer and the electronic component.

In addition, the circuit board according to the embodiment may use a metal-based inorganic filler having improved thermal conductivity and dielectric constant together with an inorganic filler having a negative thermal expansion coefficient. Therefore, a metal-based inorganic filler having a high thermal expansion coefficient but high thermal conductivity and a low dielectric constant is used to reduce the thermal conductivity and the dielectric constant of the circuit board, thereby improving the signal transmission characteristics of the circuit board. Further, by using an inorganic filler having a negative thermal expansion coefficient together, it is possible to alleviate an increase in the thermal expansion coefficient due to the metal-based inorganic filler, thereby reducing the magnitude of the total thermal expansion coefficient of the insulating layer.

That is, the insulating layer of the circuit board according to the embodiment may include a plurality of the first inorganic filler and the second inorganic filler, and thus, the insulating layer may have a thermal expansion coefficient of about 5 ppm/deg.C to about 8 ppm/deg.C.

Drawings

Fig. 1 is a diagram showing a sectional view of a circuit board according to an embodiment.

Fig. 2 is a view showing an enlarged view of an area a in fig. 1.

Fig. 3 is a view showing another enlarged view of the area a in fig. 1.

Fig. 4 is a view illustrating a graph for describing a change in dielectric constant of an insulating layer based on porosity of the insulating layer of the circuit board according to the embodiment.

Fig. 5 is a view showing a graph for describing a change in dielectric constant of an insulating layer of an aperture of the insulating layer of the circuit board according to the embodiment.

Fig. 6 and 7 are views for describing a dielectric constant distribution of an insulating layer based on an aperture of the insulating layer of the circuit board according to the embodiment.

Fig. 8 and 9 are views for describing dielectric constant distribution of an insulating layer based on a ratio of holes of the insulating layer of the circuit board according to the embodiment.

Fig. 10 is another view showing an enlarged view of the area a in fig. 1.

Fig. 11 and 12 are views for describing the magnitude of the total thermal expansion coefficient and the dielectric constant of the insulating layer according to the weight% of the second inorganic filler.

Detailed Description

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the spirit and scope of the present invention are not limited to the parts of the embodiments described, but may be embodied in various other forms, and one or more elements of the embodiments may be selectively combined and substituted within the spirit and scope of the present invention.

In addition, unless otherwise explicitly defined and described, terms (including technical and scientific terms) used in the embodiments of the present invention may be construed as having the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, and terms defined, for example, in a common dictionary may be construed as having a meaning consistent with their meaning in the context of the related art.

In addition, terms used in the embodiments of the present invention are used to describe the embodiments, and are not used to limit the present invention. In this specification, unless specifically stated in the phrase, the singular form may also include the plural form, and may include at least one of all combinations that may be combined in A, B and C when describing "at least one (or more) of a (and), B, and C".

Furthermore, in describing the elements of the embodiments of the present invention, the terms first, second, A, B, (A), (b), etc. may be used. These terms are only used to distinguish one element from another element, and the terms do not limit the nature, order, or sequence of the elements.

Further, when an element is described as being "connected," coupled, "or" connected "to another element, it may include not only the case where the element is directly" connected, "coupled," or "connected" to the other element, but also the case where the element is "connected," "coupled," or "connected" to the other element through another element between the element and the other element.

Further, when it is described that "upper (upper)" or "lower (lower)" of each element is formed or disposed, the "upper (upper)" or "lower (lower)" may include not only a case where two elements are directly connected to each other but also a case where one or more other elements are formed or disposed between the two elements.

Further, when it is expressed as "upper (upper)" or "lower (lower)", not only an upward direction based on one element but also a downward direction based on one element may be included.

Hereinafter, a circuit board according to an embodiment will be described with reference to the drawings.

Referring to fig. 1, a circuit board according to an embodiment may include an insulating substrate 110, a first pad 120, a first upper metal layer 130, a second pad 140, a second upper metal layer 150, a first passivation layer 160, a second passivation layer 170, a solder paste 180, and an electronic component 190.

The insulating substrate 110 may have a flat plate structure. The insulating substrate 110 may be a Printed Circuit Board (PCB). Here, the insulating substrate 110 may be implemented as a single substrate, alternatively, the insulating substrate 110 may be implemented as a multi-layer substrate in which a plurality of insulating layers are sequentially stacked.

Accordingly, the insulating substrate 110 includes a plurality of insulating layers 111. As shown in fig. 2, the plurality of insulating layers 111 may include, from the uppermost portion, a first insulating layer 111a, a second insulating layer 111b, a third insulating layer 111c, a fourth insulating layer 111d, and a fifth insulating layer 111 e. Further, the circuit pattern 112 may be disposed at each surface of the first to fifth insulating layers.

The plurality of insulating layers 111 are substrates on which circuits capable of changing wiring are provided and may include all of a printed board, a wiring board, and an insulating substrate formed of an insulating material capable of forming a circuit pattern 112 on a surface of the insulating layer.

The plurality of insulating layers 111 may include prepregs including glass fibers. In detail, the plurality of insulating layers 111 may include an epoxy resin and a material formed by dispersing glass fibers and a silicon-based filler in the epoxy resin.

The plurality of insulating layers 111 may be rigid or flexible. For example, the insulating layer 111 may include glass or plastic. Specifically, the insulating layer 111 may include: chemically tempered/semi-tempered glass such as soda-lime glass, aluminosilicate glass, and the like; toughened or flexible plastics such as Polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), Polycarbonate (PC), etc., or sapphire.

In addition, the insulating layer 111 may include an optically isotropic film. For example, the insulating layer 111 may include Cyclic Olefin Copolymer (COC), Cyclic Olefin Polymer (COP), optically isotropic PC, optically isotropic Polymethylmethacrylate (PMMA), or the like.

Further, the insulating layer 111 may be partially bent while having a curved surface. That is, the insulating layer 111 may partially have a plane and may partially be bent while having a curved surface. Specifically, the end portion of the insulating layer 111 may be bent while having a curved surface, or bent while including a surface having a random curvature.

Further, the insulating layer 111 may be a flexible substrate having flexibility. Further, the insulating layer 111 may be a bent or bent substrate. In this case, the insulating layer 111 may represent a wiring layout of wires connecting circuit components based on circuit design, and the electrical conductors may be provided on the insulating material. Further, an electric component may be mounted on the insulating layer 111, and the insulating layer 111 may form a wiring configured to connect the electric component to form a circuit, and may mechanically fix the component in addition to functioning to electrically connect the component.

Meanwhile, a plurality of holes may be formed in at least one of the first to fifth insulating layers. In detail, a plurality of holes for reducing the dielectric constant of the insulating layer may be formed in at least one of the first to fifth insulating layers. The hole formed inside the insulating layer will be described in detail below.

Each of the circuit patterns 112 is disposed on a surface of the insulating layer 111. The circuit pattern 112 may be a wiring for transmitting an electrical signal, and may be formed of a metal material having high conductivity. For this, the circuit pattern 112 may be formed of at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn).

In addition, the circuit pattern 112 may be formed of a paste or solder paste including at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) having excellent bonding strength. Preferably, the circuit pattern 112 may be formed of copper (Cu) having high conductivity and relatively low cost.

The circuit pattern 112 may be formed through a general process of manufacturing a PCB, such as an addition process, a subtraction process, a modified semi-addition process (MSAP), a semi-addition process (SAP), and the like, and a detailed description thereof will be omitted herein.

At least one via 113 is formed in the insulating layer 111. The via 113 is provided through at least one of the plurality of insulating layers 111. The via 113 may pass through only one of the plurality of insulating layers 111, and alternatively, may be formed to pass through at least two of the plurality of insulating layers 111 in common. Accordingly, the via holes 113 electrically connect the circuit patterns disposed at the surfaces of the different insulating layers to each other.

The via hole 113 may be formed by filling a through hole (not shown) penetrating through at least one of the plurality of insulating layers 111 with a conductive material.

The through-holes may be formed by any of mechanical, laser, and chemical treatments. When the through-hole is formed by machining, methods such as milling, drilling, and routing (routing) may be employed. When the via hole is formed by laser processing, UV or CO may be used₂A laser method. And when the through-hole is formed by chemical processing, it can be formed by usingThe insulating layer 111 is opened by a chemical substance including aminosilane, ketone, or the like.

Meanwhile, laser processing is a cutting method in which a portion of a material is melted and evaporated by concentrating light energy at a surface to form a desired shape. Complex shapes based on computer programs can be easily processed, as well as composite materials that are difficult to cut by other methods.

Further, the machining by laser may have a cutting diameter of at least 0.005mm, and have a wide range of thickness that can be machined.

Preferably, a Yttrium Aluminum Garnet (YAG) laser or CO is used₂Lasers or Ultraviolet (UV) lasers are used as laser machining drills. YAG laser is a laser capable of processing copper foil layer and insulation layer, CO₂The laser is a laser capable of processing only an insulating layer.

When the through-hole is formed, the through-hole 113 is formed by filling the inside of the through-hole with a conductive material. The metal material forming the via hole 113 may be any one selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd). The conductive material may be filled by any one of electroless plating, electrolytic plating, screen printing, sputtering, evaporation, ink jetting and dispensing (dispensing), or a combination thereof.

The first pad 120 is disposed on the insulating layer disposed at the uppermost portion of the plurality of insulating layers 111, and the second pad 140 is disposed under the insulating layer disposed at the lowermost portion of the plurality of insulating layers 111.

In other words, the first pad 120 is disposed on the uppermost insulating layer 111 among the plurality of insulating layers 111, and the electronic element 190 is formed in the uppermost insulating layer 111. The first pad 120 may be formed in plurality on the uppermost insulating layer. In addition, a portion of the first pad 120 may be used as a pattern for signal transmission, and the remaining portion of the first pad 120 may be used as an inner lead electrically connected to the electronic component 190 through a wire or the like. In other words, the first pad 120 may include a wire bonding pad for wire bonding.

Further, the second pad 140 is disposed under the lowermost insulating layer among the plurality of insulating layers 111, and an external substrate (not shown) is attached to the lowermost insulating layer. As with the first pads 120, a portion of the second pads 140 also serves as a pattern for signal transmission, and the remaining portion of the second pads 140 may serve as an external lead in which an adhesive member 175 is provided for attaching an external substrate. In other words, the second pads 140 include bonding pads for bonding.

Further, the first upper metal layer 130 is disposed on the first pad 120 and the second upper metal layer 150 is disposed under the second pad 140. The first and second

upper metal layers

130 and 150 are formed of the same material, and increase the characteristics of wire bonding or soldering while protecting the first and

second pads

120 and 140, respectively.

For this, the first and second

upper metal layers

130 and 150 are formed of a metal including gold (Au). Preferably, the first and second

upper metal layers

130 and 150 may include only pure gold (purity of 99% or more), or may be formed of an alloy including gold (Au). When the first and second

upper metal layers

130 and 150 are formed of an alloy including gold, the alloy may be formed of a gold alloy including cobalt.

The solder paste 180 is disposed at the uppermost insulating layer among the plurality of insulating layers. The solder paste is an adhesive for fixing the electronic component 190 attached to the insulating substrate 110. Accordingly, the solder paste 180 may be defined as an adhesive. The adhesive may be a conductive adhesive, alternatively, the adhesive may be a non-conductive adhesive. That is, the printed circuit board 100 may be a substrate to which the electronic component 190 is attached in a wire bonding manner, and thus terminals (not shown) of the electronic component 190 may not be provided on the adhesive. In addition, the adhesive may not be electrically connected to the electronic component 190. Thus, a non-conductive adhesive may be used as the adhesive, or alternatively, a conductive adhesive may be used as the adhesive.

The conductive adhesive is largely classified into an anisotropic conductive adhesive and an isotropic conductive adhesive, and basically consists of conductive particles such as Ni, Au/polymer or Ag, and thermosetting and thermoplastic resins, or a blend type insulating resin mixing the characteristics of both resins.

Further, the nonconductive adhesive may also be a polymer adhesive, and may preferably be a nonconductive polymer adhesive including a thermosetting resin, a thermoplastic resin, a filler, a curing agent, and a curing accelerator.

Further, a first passivation layer 160 is disposed on the uppermost insulating layer, wherein at least a portion of the surface of the first upper metal layer 130 is exposed through the first passivation layer 160. The first passivation layer 160 is provided to protect a surface of the uppermost insulating layer, and may be, for example, a solder resist.

In addition, the solder paste 180 is disposed on the first upper metal layer 130 so that the first pad 120 and the electronic component 190 can be electrically connected to each other.

Here, the electronic component 190 may include a device and a chip. Devices can be divided into active devices and passive devices. An active device refers to a device that actively utilizes non-linear characteristics. A passive device refers to a device that does not utilize non-linear characteristics even if both linear and non-linear characteristics exist. In addition, the active devices may include transistors, IC semiconductor chips, and the like, and the passive devices may include capacitors, resistors, inductors, and the like. The passive device is mounted on the substrate together with a general semiconductor package to increase a signal processing speed of a semiconductor chip as an active device, perform a filtering function, and the like.

Accordingly, the electronic element 190 may include all of a semiconductor chip, a light emitting diode chip, and other driving chips.

Further, a resin molding part may be formed on the uppermost insulating layer, and thus, the electronic element 190 and the first upper metal layer 130 may be protected by the resin molding part.

Meanwhile, the second passivation layer 170 is disposed under the lowermost insulating layer among the plurality of insulating layers. The second passivation layer 170 has an opening exposing a surface of the second upper metal layer 150. The second passivation layer 170 may be formed of a solder resist.

Hereinafter, referring to fig. 2 to 9, a plurality of holes P formed in the insulating layer 111 will be described in detail.

As described above, the insulating layer may include, from the lowermost portion thereof, the first insulating layer 111a, the second insulating layer 111b, the third insulating layer 111c, the fourth insulating layer 111d, and the fifth insulating layer 111 e.

The first, second, third, fourth, and fifth insulating

layers

111a, 111b, 111c, 111d, and 111e may include a plurality of holes P inside the insulating layers.

Alternatively, at least one of the first, second, third, fourth, and fifth insulating

layers

111a, 111b, 111c, 111d, and 111e may include a plurality of holes P inside the insulating layer.

Fig. 2 is a view showing an enlarged view of one region of the second insulating layer 111 b. In fig. 2, an enlarged view of only one region of the second insulating layer 111b is shown, but the description of fig. 2 may be applied not only to the second insulating layer 111b but also to at least one of the first insulating layer 111a, the third insulating layer 111c, the fourth insulating layer 111d, and the fifth insulating layer 111 e.

Referring to fig. 2, in the circuit board according to the embodiment, a plurality of holes P may be formed inside the insulating layer 111.

The holes P are formed to be spaced apart from each other, not concentrated in one region within the insulating layer, and may be formed to be uniformly distributed over the entire region of the insulating layer.

The hole P may be formed inside the insulating layer to reduce the overall dielectric constant of the insulating layer. For example, when the insulating layer includes a prepreg, the dielectric constant of the insulating layer may be 3.5 or more, and the dielectric loss may be about 0.01 or more. When the dielectric loss increases, there is a problem in that the loss of the high-frequency signal increases due to the dielectric loss when the circuit board according to the embodiment is used for high-frequency applications.

Therefore, the circuit board according to the embodiment forms the hole in the insulating layer, in which the air having the dielectric constant close to 1 is formed, without changing the material of the insulating layer to maintain the rigidity of the insulating layer, thereby reducing the average dielectric constant of the insulating layer. That is, by lowering the dielectric constant of the insulating layer, the dielectric loss can be reduced, and the signal loss in the circuit board transmitting the high-frequency signal can be reduced as a whole.

That is, the insulating layer of the circuit board according to the embodiment may control the dielectric constant of the insulating layer to 3.2 or less and the dielectric loss to 0.0005 or less by forming a hole of a specific size within a certain range while maintaining rigidity.

Meanwhile, the total area (porosity) of the holes P may be formed to a specific area with respect to the total area of the insulating layer 111. In detail, the total area (porosity) of the holes P may be formed to be about 10% or less of the total area of the insulating layer 111. In more detail, the total area (porosity) of the holes P may be formed to be about 5% to about 10% of the total area of the insulating layer 111.

When the total area of the holes P is less than about 5% of the total area of the insulating layer 111, the dielectric constant of the insulating layer 111 may not be sufficiently reduced. Further, when the total area of the holes P exceeds about 10% of the total area of the insulating layer 111, the rigidity of the insulating layer 111 is reduced by the holes, so that the overall reliability of the circuit board is reduced.

In addition, the hole P may be formed to have a specific size. Here, the size of the hole P may be defined as a diameter size of the hole P. In detail, the size of the pores P may be about 300nm or less. In more detail, the size of the pores P may be in the range of about 100nm to about 300 nm.

Pores having a size of less than 100nm are difficult to form inside the insulating layer, so that process problems may occur and process efficiency may be reduced. Further, when the size of the hole P exceeds 300nm, thermal reliability of the insulating layer may be deteriorated due to the size of the hole. As the size of the hole increases, the difference in the magnitude of the dielectric constant becomes large for each position of the insulating layer within the insulating layer, so that the uniformity of the dielectric constant of the insulating layer is lowered, so that the signal transmission characteristics are deteriorated conversely.

Meanwhile, an inorganic filler may be additionally added to the insulating layer 111 to ensure thermal reliability. For example, alumina (Al) may be used₂O₃) Or silicon dioxide (SiO)₂) Inorganic filler to the baseThe insulating layer 111 is to improve thermal conductivity of the insulating layer.

That is, the temperature increase of the circuit board can be prevented by improving the heat conduction characteristic of the insulating layer 111 with the inorganic filler.

The inorganic filler may be included in an amount of about 70 wt% to about 80 wt% with respect to the total weight of the insulating layer 111. When the inorganic filler is contained in an amount of less than about 70 wt%, the thermal conduction characteristics of the insulating layer may be deteriorated, and when the inorganic filler is contained in an amount of more than about 80 wt%, the strength of the insulating layer may be reduced, and thus the reliability of the circuit board may be deteriorated.

Meanwhile, referring to fig. 3, the insulating layer 111 may include holes having different sizes. In detail, the first hole P1 and the second hole P2 may be formed in the insulating layer 111. The first and second holes P1 and P2 may have different sizes. That is, the first hole P1 and the second hole P2 may have different diameters.

The first hole P1 may be formed to have a size smaller than that of the second hole P2. In detail, the first holes P1 may have a diameter of about 100 to 150nm, and the second holes P2 may have a diameter of from greater than about 150 to 300 nm.

In this case, the first holes P1 and the second holes P2 may have different numbers. In detail, the ratio of the first holes P1 may be greater than that of the second holes P2. In more detail, when the number of the first holes P1 is defined as a and the number of the second holes P2 is defined as B, the ratio of a: B may be 2:1 or more.

In the holes formed in the insulating layer, the overall dielectric constant of the insulating layer decreases as the size of the holes increases. However, when the ratio of the holes having a large diameter in the insulating layer is increased, the variation in the magnitude of the dielectric constant in the insulating layer for each position of the insulating layer is increased, so that the thermal characteristics and the signal transmission characteristics of the circuit board are rather deteriorated.

Accordingly, while the size of the overall dielectric constant of the insulating layer is reduced by including a plurality of holes having different sizes in the insulating layer, holes having a small size are formed more than holes having a large size, so that the difference in dielectric constant in the insulating layer according to the position of the insulating layer can be reduced. Accordingly, the uniformity of the dielectric constant in the insulating layer according to the position of the insulating layer can be improved, thereby improving the thermal characteristics and signal transmission characteristics of the circuit board.

Hereinafter, the present invention will be described in more detail by measuring dielectric constants according to examples and comparative examples. These examples are provided by way of example only to describe the invention in more detail. Therefore, the present invention is not limited to these examples.

Examples

The prepreg serves as an insulating layer, and a plurality of holes formed by air are formed in the insulating layer.

In this case, the dielectric constant size and reliability evaluation (void generation/strength reduction) of the insulating layer were measured while adjusting the total area of the pores, i.e., the porosity with respect to the total area of the insulating layer, to 5% to 10%.

Comparative example

In this case, the dielectric constant of the insulating layer was measured and the reliability evaluation was performed while adjusting the total area of the pores, i.e., the porosity with respect to the total area of the insulating layer, to less than 5%, and to more than 10% to 20%.

[ TABLE 1 ]

	Porosity (%)	Dielectric constant	Dielectric loss	Reliability of
					Example 1	5	3.2	0.005	By passing
Example 2	10	3.1	0.004	By passing
					Comparative example 1	0	3.5	0.001	By passing
Comparative example 2	15	3.05	0.0004	Failed through
					Comparative example 3	20	3.02	0.004	Failed through

Referring to table 1 and fig. 4, in examples 1 and 2, that is, in the region where the porosity is 5% to 10%, it can be seen that there is no problem in reliability while having a low dielectric constant of about 3.2 or less and a low dielectric loss of about 0.0005 or less.

On the other hand, in the case of comparative example 1, it can be seen that there is no problem in reliability, but there are almost no holes, and thus the dielectric constant and the dielectric loss are high, and thus it is not suitable for high frequency signal transmission. In addition, in the case of comparative examples 2 and 3, it can be seen that these values are lower than the dielectric constant and dielectric loss of the examples, but are not suitable for reliability.

Examples

In this case, the dielectric constant size and reliability evaluation of the insulating layer were measured while adjusting the diameter size of the pores to 100nm to 300 nm.

Comparative example

In this case, the dielectric constant of the insulating layer was measured and the reliability evaluation was performed while adjusting the diameter size of the pores to less than 100nm and more than 300nm to 1000 nm.

[ TABLE 2 ]

	Aperture (mm)	Dielectric constant	Reliability of
				Example 3	100	3.1	By passing
Example 4	300	3.1	By passing
				Comparative example 4	50	3.3	By passing
Comparative example 5	500	3.0	Failed through
				Comparative example 6	700	3.0	Failed through
Comparative example 7	900	2.9	Failed through
				Comparative example 8	1000	2.9	Failed through

Referring to table 1 and fig. 5, in examples 3 and 4, i.e., the pore diameter of 100nm to 300nm, it can be seen that there is no problem in reliability while having a low dielectric constant of about 3.1 or less.

Fig. 6 is a view showing the distribution of the dielectric constant of the insulating layer at the aperture of 100 nm. Referring to fig. 6, in the case of example 1, it can be seen that the distribution of the region where the dielectric constant of the insulating layer is 3 or less is very high, and thus the overall dielectric constant of the insulating layer is lowered.

On the other hand, in the case of comparative example 4, it can be seen that there is no problem in reliability, but the pore diameter is very small and the dielectric constant is large. In addition, in the case of comparative examples 5 to 8, it can be seen that their values are lower than the dielectric constant of the examples, but are not suitable for reliability.

Fig. 7 is a view showing the dielectric constant distribution of the insulating layer at an aperture diameter of 1000 nm. Referring to fig. 7, in the case of comparative example 8, it can be seen that there is a region where the dielectric constant of the insulating layer is substantially 3 or less, and therefore the dielectric constant of the entire insulating layer is greatly reduced. However, it can be seen that the strength of the hole is greatly reduced due to the increase of the hole diameter, and the insulating layer is damaged during the manufacturing process of the circuit board, so that the reliability is very poor.

Example 5

In this case, the pores include a first pore having a diameter size of 100nm and a second pore having a diameter size of 300 nm.

In this case, the ratio of the number of first holes to the number of second holes is 2:1 or more.

Then, the difference in dielectric constant in the insulating layer according to the position of the insulating layer was measured.

Comparative example 9

In this case, the ratio of the number of first holes to the number of second holes is less than 2: 1.

Then, a difference in dielectric constant according to the position of the insulating layer in the insulating layer is measured.

Fig. 8 is a view showing a dielectric constant distribution of an insulating layer according to embodiment 5. Fig. 9 is a view showing a dielectric constant distribution of an insulating layer according to comparative example 9.

Referring to fig. 8, in the case of example 5, it can be seen that the dimensional deviation of the dielectric constant is very low, 0.02 or less, depending on the position of the insulating layer.

On the other hand, referring to fig. 9, in the case of comparative example 9, it can be seen that the dimensional variation of the dielectric constant is very high, 0.05 or more, depending on the position of the insulating layer.

That is, in the case of the comparative example, it can be seen that as the difference in dielectric constant increases according to the position of the insulating layer, the uniformity of the dielectric constant of the insulating layer deteriorates, and thus, when a high-frequency signal is transmitted, the signal loss increases due to such a deviation in dielectric constant.

For example, when the insulating layer includes a prepreg, the insulating layer may have a dielectric constant of 3.5 or more and a dielectric loss of about 0.01 or more. When the dielectric loss increases, there is a problem in that the loss of the high-frequency signal increases due to the dielectric loss when the circuit board according to the embodiment is used for high-frequency applications.

In general, the dielectric constant and the dielectric loss may be proportional, and in order to reduce the dielectric loss, the dielectric constant should be reduced, but in the case of a material having a low dielectric constant, the strength may be reduced together with the dielectric constant, so that there is a problem in that the reliability of the circuit board is reduced.

In the holes formed in the insulating layer, the overall dielectric constant of the insulating layer decreases as the size of the holes increases. However, when a hole having a large diameter is formed in each insulating layer, a dimensional deviation of a dielectric constant for each position of the insulating layer in the insulating layer increases, and thus thermal characteristics and signal transmission characteristics of the circuit board may be deteriorated.

Accordingly, while the overall dielectric constant size of the insulating layer including the plurality of holes having different sizes in the insulating layer is reduced, the small-sized holes are formed much larger than the large-sized holes, and thus the difference in dielectric constant according to location can be reduced. Therefore, the uniformity of the dielectric constant in the insulating layer according to the position of the insulating layer can be improved, thereby improving the thermal characteristics and signal transmission characteristics of the circuit board.

Hereinafter, an insulating layer according to another embodiment will be described with reference to fig. 10 to 12.

As described above, the insulating layer may include the first insulating layer 111a, the second insulating layer 111b, the third insulating layer 111c, the fourth insulating layer 111d, and the fifth insulating layer 111e from the bottom.

The first, second, third, fourth, and fifth insulating

layers

111a, 111b, 111c, 111d, and 111e may include various inorganic fillers inside the insulating layers.

layers

111a, 111b, 111c, 111d, and 111e may include a plurality of inorganic fillers inside the insulating layer.

Referring to fig. 10, the insulating layer 111 may include a plurality of inorganic fillers 200 dispersed in the insulating layer 111. In detail, the inorganic filler 200 may include a first inorganic filler 210 and a second inorganic filler 220.

For example, the insulating layer 111 may be formed of a prepreg (PPG) material, and the first and second

inorganic fillers

210 and 220 may be disposed to be dispersed within the prepreg.

The insulating layer 111 and the inorganic filler 200 may have different thermal expansion coefficients. In detail, the thermal expansion coefficient of the material constituting the insulating layer 111 may be greater than that of the material constituting the inorganic filler 200.

That is, in the insulating layer 111 of the circuit board according to the embodiment, a plurality of inorganic fillers having a thermal expansion coefficient smaller than that of the insulating layer may be disposed inside the insulating layer 111 to reduce the overall thermal expansion coefficient of the insulating layer 111.

In general, the coefficient of thermal expansion of an electronic component, i.e., a device or chip disposed on the insulating layer 111, can be 6 ppm/deg.C to 7 ppm/deg.C. Meanwhile, as an example of a material constituting the insulating layer 111, the thermal expansion coefficient of the epoxy resin may be 20 ppm/deg.C to 40 ppm/deg.C. Therefore, cracks and the like may occur in the circuit board during the manufacturing process of the circuit board due to the difference in thermal expansion coefficient between the insulating layer and the electronic component, thereby reducing the reliability of the circuit board. In addition, when manufacturing a circuit board, a warpage or delamination phenomenon may occur during a pressing process or a soldering process due to a high thermal expansion coefficient of an insulating layer, thereby also reducing reliability of the circuit board.

Therefore, the circuit board according to the embodiment may include various inorganic fillers capable of reducing the overall thermal expansion coefficient of the insulating layer within the insulating layer 111 to solve the above-described problems due to the high thermal expansion coefficient of the insulating layer, thereby improving the reliability of the circuit board.

Meanwhile, the first inorganic filler 210 and the second inorganic filler 220 may have different thermal expansion coefficients.

In detail, the first inorganic filler 210 and the second inorganic filler 220 may have different thermal expansion characteristics. For example, the first inorganic filler 210 may have a positive thermal expansion characteristic, and the second inorganic filler 220 may have a negative thermal expansion characteristic. That is, the first inorganic filler 210 may have a characteristic of expanding when heat is applied thereto, and the second inorganic filler 220 may have a characteristic of contracting when heat is applied thereto.

In addition, the first inorganic filler 210 and the second inorganic filler 220 may have different thermal expansion coefficients. For example, the first inorganic filler 210 may have a positive thermal expansion coefficient. In detail, the first inorganic filler 210 may have a thermal expansion coefficient of 0.5 ppm/deg.C to 10 ppm/deg.C. In addition, the second inorganic filler 220 may have a negative thermal expansion coefficient. In detail, the second inorganic filler 220 may have a thermal expansion coefficient of less than 0 and equal to or more than-5 ppm/deg.C.

For example, the first inorganic filler 210 may include a ceramic inorganic filler or a metallic inorganic filler. For example, the first inorganic filler 210 may include, for example, Silica (SiO)₂) Alumina (Al)₂O₃) And ceramic inorganic fillers such as aluminum nitride (AlN).

In addition, the second inorganic filler 220 may include Mn₃XN (X is Cu-Sn, Zn-Sn) and ZrMo₂O₈At least one material of (1).

The inorganic filler 200 may be included therein at a content of about 70% to about 90% by volume with respect to the entire insulating layer.

In addition, the first inorganic filler 210 and the second inorganic filler 220 may be contained in different contents within the insulating layer 111. In detail, the first inorganic filler 210 may be included in an amount greater than that of the second inorganic filler 220. For example, the second inorganic filler may be included in an amount of 5 wt% to less than 50 wt% with respect to the entire inorganic filler.

Referring to fig. 11 and 12, when the second inorganic filler is included therein at a content of less than 5 wt%, the effect of reducing the thermal expansion coefficient of the insulating layer may not be significant. In addition, when the second inorganic filler is contained therein at a content of about 50 wt% or more, the dielectric constant of the insulating layer increases, and when used as an insulating layer of a circuit board for high frequency applications, the signal loss increases, and thus the characteristics may be deteriorated.

Meanwhile, the second inorganic filler may be included in different weight% according to the magnitude of the thermal expansion coefficient of the first inorganic filler.

In detail, when the first inorganic filler includes the ceramic inorganic filler, the first inorganic filler may have a thermal expansion coefficient of 0.5 ppm/deg.C to 3 ppm/deg.C. In this case, the second inorganic filler may be included in an amount of about 10 wt% to about 20 wt% with respect to the entire inorganic filler.

Further, when the first inorganic filler includes a metallic inorganic filler, the first inorganic filler may have a coefficient of thermal expansion of about 5 ppm/deg.C to 10 ppm/deg.C. In this case, the second inorganic filler may be included in an amount of about 30 wt% to about 40 wt% with respect to the entire inorganic filler.

That is, in the case of the metallic inorganic filler, the thermal expansion coefficient may be higher than that of the ceramic inorganic filler, but the thermal conductivity may be high and the dielectric constant may be low. Therefore, when the metallic inorganic filler is contained as the first inorganic filler, more of the second inorganic filler may be contained to lower the overall thermal expansion coefficient of the insulating layer than when the ceramic inorganic filler is contained.

That is, the insulating layer according to the embodiment may include the ceramic-based 1 st-1 st inorganic filler and the second inorganic filler, the metal-based 1 st-2 nd inorganic filler and the second inorganic filler, or the ceramic-based 1 st-1 st inorganic filler, the metal-based 1 st-2 nd inorganic filler, and the second inorganic filler.

The circuit board according to the embodiment may include a plurality of inorganic fillers having different characteristics and different thermal expansion coefficients in the insulating layer. Therefore, in the circuit board according to the embodiment, the inorganic filler having a negative thermal expansion coefficient and the inorganic filler having a positive thermal expansion coefficient may be added together in the insulating layer to lower the overall thermal expansion coefficient of the insulating layer.

In addition, the circuit board according to the embodiment may use a metal-based inorganic filler having improved thermal conductivity and dielectric constant together with an inorganic filler having a negative thermal expansion coefficient. Therefore, a metal-based inorganic filler having a high thermal expansion coefficient but high thermal conductivity and a low dielectric constant is used to reduce the thermal conductivity and the dielectric constant of the circuit board, thereby improving the signal transmission characteristics of the circuit board. Further, by using the inorganic filler having a negative thermal expansion coefficient together, it is possible to alleviate an increase in the thermal expansion coefficient due to the metal-based inorganic filler, thereby reducing the magnitude of the overall thermal expansion coefficient of the insulating layer.

That is, the insulating layer of the circuit board according to the embodiment may include a plurality of kinds of the first inorganic filler and the second inorganic filler, and thus, the insulating layer may have a thermal expansion coefficient of about 5 ppm/deg.C to about 8 ppm/deg.C.

The features, structures, and effects described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. Further, those of ordinary skill in the art to which the embodiments pertain may even combine or modify the features, structures, effects, and the like shown in each embodiment with respect to the other embodiments. Therefore, it is to be construed that the matters relating to such combination and such modification are included in the scope of the embodiments.

Further, the above description focuses on the embodiments, but this is only exemplary and does not limit the present invention. It will be understood by those skilled in the art to which the embodiments pertain that various modifications and applications not shown above may be made without departing from essential features of the embodiments. For example, each component specifically shown in the embodiments may be modified and implemented. Further, it is to be understood that differences related to such modifications and applications are included in the scope of the present invention as defined in the appended claims.

Claims

1. A circuit board, comprising:

a first insulating layer;

a circuit pattern on the first insulating layer; and

a second insulating layer on the circuit pattern,

wherein a plurality of holes are formed inside at least one of the first insulating layer and the second insulating layer,

the hole is formed to have a diameter of 100nm to 300nm, and

at least one of a porosity of the first insulating layer and a porosity of the second insulating layer is 5% to 10%.

2. The circuit board according to claim 1, wherein at least one of the first insulating layer and the second insulating layer has a dielectric constant of 3.2 or less.

3. The circuit board according to claim 1, wherein first and second holes having different diameters are formed in at least one of the first and second insulating layers,

the first pores have a diameter of 100nm to 150nm,

the second pores have a diameter of from more than 150nm to 300nm, and

the ratio of the first holes is greater than the ratio of the second holes.

4. The circuit board according to claim 5, wherein a ratio A: B of a ratio A of the first holes to a ratio B of the second holes is 2:1 or more.

5. The circuit board of claim 1, wherein the insulating layer further comprises an inorganic filler in an amount of 70 wt% to 80 wt% with respect to the entire insulating layer.

6. A circuit board, comprising:

a first insulating layer;

a circuit pattern on the first insulating layer; and

a second insulating layer on the circuit pattern,

wherein at least one of the first insulating layer and the second insulating layer includes an inorganic filler,

the inorganic filler includes a first inorganic filler and a second inorganic filler,

the first inorganic filler has a positive coefficient of thermal expansion, and

the second inorganic filler has a negative thermal expansion coefficient.

7. The circuit board of claim 6, wherein the second inorganic filler has a coefficient of thermal expansion of less than 0 and equal to or greater than-5 ppm/° C.

8. The circuit board according to claim 6, wherein the inorganic filler is contained in an amount of 70% to 90% by volume with respect to the entire insulating layer.

9. The circuit board according to claim 8, wherein an amount of the second inorganic filler with respect to the entire inorganic filler is smaller than an amount of the first inorganic filler with respect to the entire inorganic filler, and

the content of the second inorganic filler is 5 wt% to less than 50 wt% with respect to the entire inorganic filler.

10. The circuit board of claim 9, wherein the first inorganic filler has a coefficient of thermal expansion of 0.5ppm/° c to 3ppm/° c, and

the content of the second inorganic filler is 10 to 20 wt% with respect to the entire inorganic filler.