CN113990244B

CN113990244B - Display panel driving method, display driving circuit and display device

Info

Publication number: CN113990244B
Application number: CN202111327644.8A
Authority: CN
Inventors: 李健; 朱元章; 田雪松; 吴国强
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2021-11-10
Filing date: 2021-11-10
Publication date: 2023-12-12
Anticipated expiration: 2041-11-10
Also published as: CN113990244A

Abstract

According to the display panel driving method, the display driving circuit and the display device, the current display frame is divided into a plurality of continuous sub-display frames, a first sub-display frame in the plurality of sub-display frames is defined as a refreshing sub-frame, the rest sub-display frames are defined as holding sub-frames, and the first initializing voltage input in the refreshing sub-frame and the second initializing voltage input in the holding sub-frame are set to different voltage values, so that the sizes of the initializing voltages input into the refreshing sub-frame and the holding sub-frame can be independently set, namely the initializing voltages input into the anode of the light emitting element are independently set, and therefore brightness difference between the refreshing sub-frame and the holding sub-frame can be improved, and flicker phenomenon is reduced.

Description

Display panel driving method, display driving circuit and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a driving method of a display panel, a display driving circuit and a display device.

Background

The display device may operate at multiple refresh frequencies, for example, 60Hz, 90Hz, and 120Hz. In practical application, the display device has a flicker problem when displaying at the current refresh frequency due to the brightness difference between the high frequency and the low frequency.

Disclosure of Invention

The driving method of the display panel provided by the embodiment of the disclosure comprises the following steps:

dividing a current display frame into a plurality of continuous sub-display frames, defining a first sub-display frame in the plurality of sub-display frames as a refreshing sub-frame, and defining the rest sub-display frames as holding sub-frames;

in the refresh sub-frame, driving a data writing transistor in the display panel, inputting a data voltage, and driving an initializing transistor in the display panel, inputting a first initializing voltage;

driving an initialization transistor in the display panel in the sustain subframe, and inputting a second initialization voltage;

wherein the first initialization voltage and the second initialization voltage are different.

In some examples, further comprising:

in each of the plurality of sub-display frames, a second power supply voltage is input to a cathode of a light emitting element in the display panel.

In some examples, before the dividing the current display frame into the plurality of consecutive sub-display frames, further comprising:

acquiring a current brightness mode corresponding to the current display frame;

determining a second power supply voltage, a first initialization voltage and a second initialization voltage corresponding to the current brightness mode according to a corresponding relation table of a plurality of different pre-stored brightness modes and the second power supply voltage, the first initialization voltage and the second initialization voltage; in the relation table, in the same brightness mode, a voltage difference is formed between the second power supply voltage and the first initialization voltage, and the absolute value of the second initialization voltage is not smaller than the absolute value of the voltage on the anode of the light-emitting element when the light-emitting element displays the maximum brightness; and under different brightness modes, the voltage difference values are the same, the second power supply voltages are different, the first initialization voltages are different, and the second initialization voltages are different;

the driving the initialization transistor in the display panel, inputting a first initialization voltage, specifically includes: driving an initialization transistor in the display panel according to the determined first initialization voltage, and inputting the first initialization voltage;

the driving the initialization transistor in the display panel, inputting a second initialization voltage, specifically includes: driving an initialization transistor in the display panel according to the determined second initialization voltage, and inputting the second initialization voltage;

the inputting a second power supply voltage to the cathode of the light emitting element in the display panel specifically includes: and inputting the second power supply voltage to the cathode of the light-emitting element in the display panel according to the determined second power supply voltage.

In some examples, the relationship table includes M luminance patterns, the M luminance patterns being defined as a1 st luminance pattern to an M th luminance pattern; m is an integer greater than 1;

in the 1 st to the M th brightness modes, the brightness of the display panel is sequentially reduced;

in the 1 st to the M-th luminance modes, the absolute value of the second initialization voltage is sequentially decreased.

In some examples, the second initialization voltage Vinit2 (m) in the mth luminance mode satisfies the following formula;

Vinit2(m)＝Vinit2(1)+Vc(m)；

wherein Vinit2 (1) represents the second initialization voltage in the 1 st luminance mode; vc (m) represents a voltage threshold corresponding to the mth brightness mode, and Vc (m) >0; m is more than or equal to 1 and less than or equal to M, and M is an integer.

In some examples, vc (m). Ltoreq.Vc (m+1).

In some examples, vc (M) < Vc (m+1), and the difference between the voltage thresholds is the same in the 1 st to M-th luminance modes.

In some examples, the second power supply voltage sequentially decreases in the 1 st to the M-th luminance modes.

The display driving circuit provided by the embodiment of the disclosure is configured to:

The display device provided by the embodiment of the disclosure comprises: display panel and the display driving circuit.

Drawings

Fig. 1 is a schematic structural diagram of a pixel circuit in an embodiment of the disclosure;

FIG. 2 is a timing diagram of some signals in an embodiment of the present disclosure;

FIG. 3 is a timing diagram of other signals in an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. And embodiments of the invention and features of the embodiments may be combined with each other without conflict. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present invention fall within the protection scope of the present invention.

Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

It should be noted that the dimensions and shapes of the figures in the drawings do not reflect true proportions, and are intended to illustrate the present invention only. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

In an embodiment of the present disclosure, a display panel may include: a substrate. The pixel units are arranged in an array on the substrate, and each pixel unit can comprise a plurality of sub-pixels. Illustratively, the plurality of subpixels may include a red subpixel, a green subpixel, and a blue subpixel. Thus, the display panel can mix light according to the red sub-pixel, the green sub-pixel and the blue sub-pixel, so as to realize color display. Of course, embodiments of the present disclosure include, but are not limited to, this.

Illustratively, the display panel may include: a plurality of light emission control lines EM, a plurality of reset lines RST, a plurality of first gate lines GA1, a plurality of second gate lines GA2, and a plurality of third gate lines GA3. Wherein, a row of sub-pixels is connected to a first gate line GA1, a second gate line GA2, a third gate line GA3, a light emission control line EM, and a reset line RST. Illustratively, as shown in connection with fig. 1 and 2, each subpixel may include: a pixel circuit 0121 and a light emitting element 0120. Wherein the pixel circuit 0121 has a transistor and a capacitor, and generates an electric signal by interaction of the transistor and the capacitor, and the generated electric signal is input to an anode of the light emitting element 0120. And the cathode of the light emitting element 0120 is applied with a corresponding voltage, so that the light emitting element 0120 can be driven to emit light.

Illustratively, the light emitting element 0120 may be provided as an electroluminescent diode, such as at least one of an organic light emitting diode (Organic Light Emitting Diode, OLED), a quantum dot light emitting diode (Quantum Dot Light Emitting Diodes, QLED), a micro LED, a mini LED. The light-emitting element 0120 may include an anode, a light-emitting layer, and a cathode, which are stacked. Further, the light emitting layer may further include a hole injection layer, a hole transport layer, an electron injection layer, and the like. Of course, in practical application, the light emitting element 0120 may be determined by design according to the requirements of the practical application environment, which is not limited herein.

Illustratively, as shown in connection with fig. 1, the pixel circuit 0121 may include: the memory capacitor CST, the driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the light emission control transistor T4, the on control transistor T5, the reset transistor T6, and the initialization transistor T7. Wherein the gate of the reset transistor T6 in a row of sub-pixels is connected to a corresponding reset line RST. The gate of the data writing transistor T2 in one row of subpixels is connected to the corresponding first gate line GA 1. The gate of the initializing transistor T7 in one row of subpixels is connected to the corresponding second gate line GA 2. The gate of the threshold compensation transistor T3 in one row of subpixels is connected to the corresponding third gate line GA3. The gates of the emission control transistor T4 and the on control transistor T5 in one row of subpixels are connected to the corresponding emission control line EM.

Illustratively, the first power supply terminal VDD is a voltage source to output a constant first power supply voltage, e.g., the first power supply voltage is a positive voltage; and the second power source terminal VSS may be a voltage source to output a constant second power voltage, for example, the second power voltage is 0 or a negative voltage. For example, in some examples, the second power supply terminal VSS may be grounded.

The signal timing diagram corresponding to the pixel circuit shown in fig. 1 is shown in fig. 2. In a display frame, the operation of the pixel circuit has three phases: stage T10, stage T20, stage T30. Wherein RST represents a reset signal transmitted on the reset line RST, GA1 represents a first scan signal transmitted on the first gate line GA1, GA2 represents a second scan signal transmitted on the second gate line GA2, GA3 represents a third scan signal transmitted on the third gate line GA3, and EM represents a light emission control signal transmitted on the light emission control line EM.

The data writing transistor T2 may be turned on under control of an active level of the first scan signal ga1, and may be turned off under control of an inactive level of the first scan signal ga 1. For example, as shown in fig. 1, the data writing transistor T2 is a P-type transistor, and the active level of the first scan signal ga1 is low and the inactive level is high. If the data writing transistor T2 is an N-type transistor, the active level of the first scan signal ga1 is high and the inactive level is low.

The initialization transistor T7 may be turned on under control of an active level of the second scan signal ga2, and may be turned off under control of an inactive level of the second scan signal ga 2. For example, as shown in fig. 1, the initialization transistor T7 is a P-type transistor, the active level of the second scan signal ga2 is low, and the inactive level is high. If the initialization transistor T7 is an N-type transistor, the active level of the second scan signal ga2 is high and the inactive level is low.

The reset transistor T6 may be turned on under control of an active level of the reset signal rst and may be turned off under control of an inactive level of the reset signal rst. For example, as shown in fig. 1, the reset transistor T6 is an N-type transistor, and the active level of the reset signal rst is a high level and the inactive level is a low level. If the reset transistor T6 is a P-type transistor, the active level of the reset signal rst is low, and the inactive level is high.

The threshold compensation transistor T3 may be turned on under control of an active level of the third scan signal ga3 and may be turned off under control of an inactive level of the third scan signal ga3. For example, as shown in fig. 1, the threshold compensation transistor T3 is an N-type transistor, and the active level of the third scan signal ga3 is high and the inactive level is low. If the threshold compensation transistor T3 is a P-type transistor, the active level of the third scan signal ga3 is low and the inactive level is high.

In the stage T10, the reset signal rst controls the reset transistor T6 to be turned on, so that the reset voltage transferred on the reset voltage line VRS can be supplied to the gate of the driving transistor T1 to reset the gate of the driving transistor T1. The second scan signal ga2 controls the initialization transistor T7 to be turned on to supply the voltage transmitted on the initialization line VINIT to the anode of the light emitting element 0120 to initialize the anode of the light emitting element 0120. Also, in this stage, the first scan signal ga1 controls the data writing transistor T2 to be turned off, and the third scan signal ga3 controls the threshold compensation transistor T3 to be turned off. The light emission control signal em controls the light emission control transistor T4 and the on control transistor T5 to be both turned off.

In the period T20, the first scan signal ga1 controls the data writing transistor T2 to be turned on, and the third scan signal ga3 controls the threshold compensation transistor T3 to be turned on. The turned-on data writing transistor T2 charges the gate of the driving transistor T1 with the data signal transmitted on the data line VD such that the voltage of the gate of the driving transistor T1 becomes: vdata+vth. Where Vth represents the threshold voltage of the driving transistor T1, and Vdata represents the voltage of the data signal. Also, in this stage, the reset signal rst controls the reset transistor T6 to be turned off. The second scan signal ga2 controls the initialization transistor T7 to be turned off. The light emission control signal em controls the light emission control transistor T4 and the on control transistor T5 to be both turned off.

In the stage T30, the emission control signal em controls the emission control transistor T4 and the on control transistor T5 to be turned on. The turned-on light emission control transistor T4 supplies the voltage VDD of the first power supply terminal VDD to the first electrode of the driving transistor T1 such that the voltage of the first electrode of the driving transistor T1 is VDD. The driving transistor T1 generates a driving current according to its gate voltage vdata+|vth| and the voltage Vdd of the first pole. The driving current is supplied to the light emitting element 0120 through the on control transistor T5, and the light emitting element 0120 is driven to emit light. Also, in this stage, the reset signal rst controls the reset transistor T6 to be turned off, and the second scan signal ga2 controls the initialization transistor T7 to be turned off. The first scan signal ga1 controls the data writing transistor T2 to be turned off. The third scan signal ga3 controls the threshold compensation transistor T3 to be turned off.

In the T10 stage, the T20 stage, and the T30 stage, a first power supply voltage is input to the first power supply terminal, and a second power supply voltage is input to the cathode of the light emitting element in the display panel.

It should be noted that, in the embodiment of the present disclosure, the first pole of the transistor may be the source electrode thereof, and the second pole may be the drain electrode thereof; or the first electrode is the drain electrode and the second electrode is the source electrode, which can be designed and determined according to the practical application requirement. Also, the pixel circuit in the sub-pixel may be a structure including other number of transistors in addition to the structure shown in fig. 2, which is not limited by the embodiment of the present disclosure. The following describes an example of the structure of the pixel circuit shown in fig. 1.

In the embodiment of the present disclosure, the threshold compensation transistor T3 and the reset transistor T6 may be set as N-type transistors, and the materials of the active layers of the threshold compensation transistor T3 and the reset transistor T6 may be set as metal oxide semiconductor materials, that is, the threshold compensation transistor T3 and the reset transistor T6 may be set as oxide transistors, so that leakage currents of the threshold compensation transistor T3 and the reset transistor T6 may be made smaller. And, the data writing transistor T2, the light emission control transistor T4, the on control transistor T5, the initializing transistor T7, and the driving transistor T1 may be set as P-type transistors, and the materials of the active layers of the data writing transistor T2, the light emission control transistor T4, the on control transistor T5, the initializing transistor T7, and the driving transistor T1 may be set as low-temperature polysilicon materials, that is, the data writing transistor T2, the light emission control transistor T4, the on control transistor T5, the initializing transistor T7, and the driving transistor T1 may be set as LTPS-type transistors, so that the mobility of the data writing transistor T2, the light emission control transistor T4, the on control transistor T5, the initializing transistor T7, and the driving transistor T1 may be made higher, and may be made thinner, smaller, lower power consumption, and the like. Thus, the LTPO pixel circuit of the low-temperature polycrystalline silicon oxide is prepared by combining the two processes of preparing the LTPS type transistor and the oxide type transistor, so that the drain current of the grid electrode of the driving transistor can be smaller, and the power consumption can be lower.

With the development of display technology, a display device may operate at a plurality of refresh frequencies, for example, 60Hz, 90Hz,120 Hz. How to reduce power consumption has been a big research hotspot in the display field, and various ways for reducing power consumption have been developed. The mode of reducing the refresh frequency based on the actual application situation has obvious effect on reducing the power consumption. In particular, the display panel may operate in a normal refresh mode and a low frequency refresh mode. When the display panel displays a dynamic picture, a normal refresh mode can be adopted, and the refresh frequency is high, for example, 90hz,120hz, etc., and each display frame is a refresh frame for writing data voltages into sub-pixels. When the display panel displays a still picture, a low frequency refresh mode may be employed, and the refresh frequency is low, for example, 1HZ (or 30 HZ), and 1 refresh frame and 59 hold frames are included in 1S. The difference between the hold frame and the refresh frame is that: the hold frame holds the data voltage written by the previous refresh frame without writing a new data voltage to the sub-pixel. Thus, the effect of reducing power consumption can be achieved. However, since there is a brightness difference between the refresh frame and the sustain frame, a flicker phenomenon is observed by the user.

Based on this, in the driving method of the display panel provided in the embodiment of the present disclosure, the current display frame may be, for example, a display frame when the display panel is driven with the current refresh frequency. Illustratively, the current refresh frequency may be 1/n of the highest refresh frequency; wherein n is an integer greater than 1. For example, the highest refresh frequency is 120Hz, then the current refresh frequency may be 60Hz, or the current refresh frequency may be 40Hz, or the current refresh frequency may be 30Hz, or the current refresh frequency may be 10Hz, or the current refresh frequency may be 1Hz.

In the embodiment of the present disclosure, the current display frame may be divided into n sub-display frames, a first sub-display frame of the n sub-display frames is defined as a refresh sub-frame, and the remaining sub-display frames are defined as hold sub-frames. In the refresh sub-frame, a data writing transistor in the display panel may be driven, a data voltage may be input, and an initializing transistor in the display panel may be driven, a first initializing voltage may be input, and a second power voltage may be input to a cathode of a light emitting element in the display panel. That is, in the refresh sub-frame, each pixel circuit may be controlled to perform the operation of the T10, T20, and T30 phases. At this time, the first initialization voltage is transmitted on the initialization line VINIT in the T10 stage, so that the first initialization voltage can be input to the anode of the light emitting element through the initialization transistor.

In the hold sub-frame, an initialization transistor in the display panel is driven, a second initialization voltage is input, and a second power supply voltage is input to a cathode of a light emitting element in the display panel. That is, in the sustain sub-frame, each pixel circuit may be controlled by the signal ga2 to turn on only the initialization transistor, and at this time, the second initialization voltage is transmitted on the initialization line VINIT, so that the second initialization voltage may be input to the anode of the light emitting element through the initialization transistor. The first initialization voltage and the second initialization voltage are different.

According to the driving method of the display panel, the first initializing voltage input in the refreshing sub-frame and the second initializing voltage input in the holding sub-frame are set to different voltage values, the initializing voltages input in the refreshing sub-frame and the holding sub-frame can be set independently, namely the initializing voltage input to the anode of the light emitting element is set independently, so that the brightness difference between the refreshing sub-frame and the holding sub-frame can be improved, and the flicker phenomenon is reduced.

Illustratively, in conjunction with FIG. 3, GA1 represents the signal on the first gate line GA1, GA2 represents the signal on the second gate line GA2, and init represents the signal on the initialization line VINIT. The current display frame F1 may be divided into a plurality of sub-display frames (e.g., F11, F12, F13, F14) in succession. The first sub-display frame may be defined as refresh sub-frame F11 and the remaining sub-display frames as sustain sub-frames: f12, F13, F14. In the refresh subframe F11, each pixel circuit is controlled to sequentially execute the working processes of the T10 phase, the T20 phase and the T30 phase. And, at this time, the first initialization voltage is transmitted on the initialization line VINIT in the T10 stage, so that the first initialization voltage can be input to the anode of the light emitting element through the initialization transistor. And inputting a second power supply voltage to a cathode of the light emitting element in the display panel.

And, at the holding subframe: f12, F13, and F14, the initialization transistor may be turned on, and the second initialization voltage may be transmitted on the initialization line VINIT, so that the second initialization voltage may be input to the anode of the light emitting element through the initialization transistor. And inputting a second power supply voltage to a cathode of the light emitting element in the display panel.

In the embodiments of the present disclosure, the second power supply voltage input to the cathode of the light emitting element in the display panel is equal in each sub-display frame in the same display frame.

In an embodiment of the present disclosure, before dividing the current display frame into the continuous plurality of sub display frames, the method may further include:

acquiring a current brightness mode corresponding to a current display frame;

and determining the second power supply voltage, the first initialization voltage and the second initialization voltage corresponding to the current brightness mode according to a corresponding relation table of a plurality of different pre-stored brightness modes and the second power supply voltage, the first initialization voltage and the second initialization voltage. In the relation table, in the same brightness mode, a voltage difference exists between the second power supply voltage and the first initialization voltage, and the absolute value of the second initialization voltage is not smaller than the absolute value of the voltage on the anode of the light-emitting element when the light-emitting element displays the maximum brightness; and under different brightness modes, the voltage difference is the same, the second power supply voltage is different, the first initialization voltage is different, and the second initialization voltage is different.

In an embodiment of the present disclosure, the relationship table may include a plurality of different luminance patterns, and each of the luminance patterns has a one-to-one correspondence with the second power supply voltage, the first initialization voltage, and the second initialization voltage. Illustratively, the relationship table may include M different luminance patterns. The M luminance patterns are defined as 1 st luminance pattern to M th luminance pattern. The m-th brightness mode corresponds to the second power voltage, the first initialization voltage and the second initialization voltage one by one.

In the embodiment of the present disclosure, in the 1 st to M-th luminance modes, the luminance of the display panel is sequentially reduced. In the 1 st to the Mth luminance modes, the absolute value of the second initialization voltage is sequentially decreased. And, in the 1 st to the Mth luminance modes, the second power supply voltage is sequentially decreased. For example, in the 1 st luminance mode, the luminance of the display panel is highest, the absolute value of the second initialization voltage is highest, and the second power supply voltage is highest. In the M-th brightness mode, the brightness of the display panel is the lowest, the absolute value of the second initialization voltage is the lowest, and the second power supply voltage is the lowest. It should be noted that, in the embodiments of the present disclosure, voltages whose absolute values are not described refer to specifically applied voltages, which themselves carry signs. For example, the first initialization voltage is negative, the second initialization voltage is negative, and the second power supply voltage may be negative or 0V.

Illustratively, m=2, the relationship table may include 2 different luminance patterns. In the 1 st luminance mode, the luminance of the display panel is highest, and the absolute value of the second initialization voltage is highest. In the 2 nd luminance mode, the luminance of the display panel is the lowest, and the absolute value of the second initialization voltage is the lowest.

Illustratively, m=3, the relationship table may include 3 different luminance patterns. In the 1 st luminance mode, the luminance of the display panel is highest, and the absolute value of the second initialization voltage is highest. In the 2 nd luminance mode, the luminance of the display panel is next highest, and the absolute value of the second initialization voltage is next highest. In the 3 rd brightness mode, the brightness of the display panel is the lowest, and the absolute value of the second initialization voltage is the lowest.

Illustratively, m=9, the relationship table may include 9 different luminance patterns. In the 1 st luminance mode, the luminance of the display panel is highest, and the absolute value of the second initialization voltage is highest. In the 2 nd luminance mode, the luminance of the display panel is next highest, and the absolute value of the second initialization voltage is next highest. … … in the 8 th luminance mode, the luminance of the display panel is low and the absolute value of the second initializing voltage is low. In the 9 th luminance mode, the luminance of the display panel is the lowest, and the absolute value of the second initialization voltage is the lowest.

Of course, in practical applications, the specific value of m=3 may be determined according to the requirements of practical applications, which is not limited herein.

In the embodiment of the present disclosure, the second initialization voltage Vinit2 (m) in the mth luminance mode satisfies the following formula;

Vinit2(m)＝Vinit2(1)+Vc(m)；

In the embodiment of the present disclosure, vc (m) =vc (m+1), that is, vc (m) in different luminance modes may be the same. Illustratively, 0< Vc (m). Ltoreq.0.2 may be made. For example, vc (m) =0.05, or Vc (m) =0.08, or Vc (m) =0.1, or Vc (m) =0.15, or Vc (m) =0.2 may be used, and is not limited herein.

In the embodiment of the present disclosure, vc (m) < Vc (m+1), that is, the voltage threshold in the m+1th luminance mode may be smaller than the voltage threshold in the m-th luminance mode, so that Vc (m) in different luminance modes may be different. Illustratively, in the 1 st to M-th luminance modes, the difference between the voltage thresholds is the same, i.e., vc (M) -Vc (m+1) =vc (M-1) -Vc (M). For example, the voltage threshold values at different brightnesses may be specifically set according to a relationship of 0< Vc (m). Ltoreq.0.2, which is not limited herein.

For example, taking m=9 as an example, as shown in table one, the 9 luminance patterns are: normal (1), normal (2), normal (3), normal (4), normal (5), normal (6), normal (7), normal (8), normal (9). The luminance pattern normal (1) corresponds to the second power voltage Vss (1), the first initialization voltages Vss (1) -Vb, and the second initialization voltage Vinit2 (1) +vc (1). The luminance pattern normal (2) corresponds to the second power supply voltage Vss (2), the first initialization voltages Vss (2) -Vb, and the second initialization voltage Vinit2 (1) +vc (2). The luminance pattern normal (3) corresponds to the second power supply voltage Vss (3), the first initialization voltages Vss (3) -Vb, and the second initialization voltage Vinit2 (1) +vc (3). The luminance pattern normal (4) corresponds to the second power supply voltage Vss (4), the first initialization voltages Vss (4) -Vb, and the second initialization voltage Vinit2 (1) +vc (4). The luminance pattern normal (5) corresponds to the second power supply voltage Vss (5), the first initialization voltages Vss (5) -Vb, and the second initialization voltage Vinit2 (1) +vc (5). The luminance pattern normal (6) corresponds to the second power supply voltage Vss (6), the first initialization voltages Vss (6) -Vb, and the second initialization voltage Vinit2 (1) +vc (6). The luminance pattern normal (7) corresponds to the second power supply voltage Vss (7), the first initialization voltages Vss (7) -Vb, and the second initialization voltage Vinit2 (1) +vc (7). The luminance pattern normal (8) corresponds to the second power supply voltage Vss (8), the first initialization voltages Vss (8) -Vb, and the second initialization voltage Vinit2 (1) +vc (8). The luminance pattern normal (9) corresponds to the second power supply voltage Vss (9), the first initialization voltages Vss (9) -Vb, and the second initialization voltage Vinit2 (1) +vc (9).

It should be noted that Vb is a fixed value, and Vb is a positive value. The specific value of Vb may be determined according to the requirements of practical applications, and is not limited herein.

Luminance mode	Second supply voltage	First initialization voltage	Second initialization voltage
				normal(1)	Vss(1)	Vss(1)-Vb	Vinit2(1)+Vc(1)
normal(2)	Vss(2)	Vss(2)-Vb	Vinit2(1)+Vc(2)
				normal(3)	Vss(3)	Vss(3)-Vb	Vinit2(1)+Vc(3)
normal(4)	Vss(4)	Vss(4)-Vb	Vinit2(1)+Vc(4)
				normal(5)	Vss(5)	Vss(5)-Vb	Vinit2(1)+Vc(5)
normal(6)	Vss(6)	Vss(6)-Vb	Vinit2(1)+Vc(6)
				normal(7)	Vss(7)	Vss(7)-Vb	Vinit2(1)+Vc(7)
normal(8)	Vss(8)	Vss(8)-Vb	Vinit2(1)+Vc(8)
				normal(9)	Vss(9)	Vss(9)-Vb	Vinit2(1)+Vc(9)

In the embodiment of the disclosure, according to the determined first initialization voltage, an initialization transistor in the display panel may be driven, and the first initialization voltage may be input; driving an initialization transistor in the display panel according to the determined second initialization voltage, and inputting the second initialization voltage; and inputting the second power supply voltage to the cathode of the light emitting element in the display panel according to the determined second power supply voltage.

The present disclosure is described in detail below with reference to specific embodiments. The present embodiment is for better explaining the present disclosure, but not limiting the present invention.

The driving method of the display panel provided by the embodiment of the disclosure may include the following steps:

and acquiring the current brightness mode corresponding to the current display frame as normal (2).

The second power supply voltage Vss (2), the first initialization voltages Vss (2) -Vb, and the second initialization voltage Vinit2 (1) +vc (2) corresponding to normal (2) are found from table one.

Based on the determined second power supply voltage Vss (2), the second power supply voltage is input to the cathodes of the light emitting elements in the display panel in each of the sub-display frames F11 to F14. And driving initialization transistors in the display panel according to the determined first initialization voltages Vss (2) -Vb in the sub-display frame F11, and inputting the first initialization voltages. And driving the initialization transistor in the display panel according to the determined second initialization voltage Vinit2 (1) +Vc (2) in the sub display frames F12-F14, and inputting the second initialization voltage.

In summary, different brightness modes correspond to different second power voltages, so that dynamic voltage across can be realized to save power consumption of the light emitting element and improve service life. Thus, the first initialization voltage can be dynamically adjusted so that the voltage difference between the first initialization voltage and the second power supply voltage can be kept consistent in the refresh subframe of each display frame.

In addition, according to the embodiment of the disclosure, the second initial voltages with different brightness modes correspond to different second initial voltages, so that the second initial voltages can be dynamically adjusted, and in the same brightness mode, the absolute value of the second initial voltages is not smaller than the absolute value of the voltage on the anode of the light-emitting element when the light-emitting element displays the maximum brightness, so that the second initial voltages are input to the anode of the light-emitting element, the light-emitting element can be rapidly switched from a light-emitting state to a non-light-emitting state, and a flicker phenomenon can be hardly observed by human eyes.

The disclosed embodiments also provide a display driving circuit configured to:

in the holding sub-frame, driving an initialization transistor in the display panel, and inputting a second initialization voltage;

It should be noted that, the principle of the display driving circuit for solving the problem is similar to that of the driving method, so that the implementation of the display driving circuit can refer to the implementation of the driving method, and the repetition is omitted herein.

Based on the same inventive concept, the embodiment of the invention also provides a display device, which comprises the display panel and the display driving circuit provided by the embodiment of the invention. The principle of the display device for solving the problems is similar to that of the driving method, so that the implementation of the display device can refer to the implementation of the driving method, and the repetition is omitted herein.

In a specific implementation, in an embodiment of the present invention, the display device may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Other essential components of the display device will be understood by those skilled in the art, and are not described herein in detail, nor should they be considered as limiting the invention.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. A driving method of a display panel, comprising:

wherein the first initialization voltage and the second initialization voltage are different;

further comprises:

inputting a second power supply voltage to a cathode of a light emitting element in the display panel in each of the plurality of sub-display frames;

before the dividing the current display frame into the plurality of continuous sub-display frames, the method further comprises:

acquiring a current brightness mode corresponding to the current display frame;

2. The driving method of a display panel according to claim 1, wherein the relation table includes M luminance patterns defined as 1 st to M th luminance patterns; m is an integer greater than 1;

3. The driving method of a display panel according to claim 2, wherein the second initialization voltage Vinit2 (m) in the mth luminance mode satisfies the following formula;

Vinit2(m)＝Vinit2(1)+Vc(m)；

4. A driving method of a display panel according to claim 3, wherein Vc (m) +.vc (m+1).

5. The driving method of a display panel according to claim 4, wherein Vc (M) < Vc (m+1), and the difference between the voltage thresholds is the same in the 1 st to M-th luminance modes.

6. The driving method of a display panel according to any one of claims 2 to 5, wherein the second power supply voltage is sequentially reduced in the 1 st to M-th luminance modes.