CN113985248A - High-temperature dynamic burn-in system and method for PCIe exchange circuit - Google Patents
High-temperature dynamic burn-in system and method for PCIe exchange circuit Download PDFInfo
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Abstract
The invention discloses a high-temperature dynamic burn-in system and a high-temperature dynamic burn-in method for a PCIe (peripheral component interface express) exchange circuit, and belongs to the field of integrated circuit design and test. The system functionally covers the functions of a physical layer, a controller, a transaction routing exchange and the like of the circuit to the maximum extent, so that each port of the circuit transmits and receives transactions during burn-in, and dynamic burn-in is performed according to the normal working frequency and bus interface rate of the PCIe exchange circuit; according to the invention, each aging circuit can be aged according to the working frequency of the circuit and the bus interface rate without externally connecting PCIe root complex equipment and a plurality of PCIe endpoint equipment, so that the use cost of components on an aging board is greatly saved; meanwhile, the invention realizes more stations on the aging single board due to the reduction of peripheral PCIe devices on the aging board, can age more circuits in the same aging high-temperature box, and saves the test cost.
Description
Technical Field
The invention belongs to the field of integrated circuit design and test, and relates to a high-temperature dynamic burn-in system and method for a PCIe switching circuit.
Background
The high-reliability and high-quality integrated circuit screens or eliminates the barely qualified devices through a burn-in test in the production process, and the reliability of the outgoing circuit is ensured. These devices either have inherent defects or defects arising from improper control of their manufacturing processes, which can cause time and stress related failures. Without burn-in testing, these defective devices may experience early catastrophic or early life failure in service. Dynamic burn-in testing requires that the test circuit apply appropriate excitation and output loads so that the circuit is as close to practical use as possible, burn-in at practical operating frequencies and interface rates.
In a PCIe system, PCIe switch circuits are used to interconnect multiple electronic components or modules. PCIe switch circuits generally have two or more PCIe ports, any one of which may be configured as an Upstream Port (Upstream Port) to connect to a Root Complex (RC), and the remaining ports are configured as Downstream ports (Downstream Port) to connect to an Endpoint (Endpoint) device, and two Downstream ports of the same circuit cannot be connected and communicate. FIG. 1 is a diagram of a typical application of a PCIe switch circuit having N ports. Due to the strict electrical performance requirements of PCIe, complex functionality, and excessive signal count, existing burn-in boxes are unable to provide burn-in stimulus signals that can satisfy PCIe switch circuitry. In order to dynamically burn in the N-port switch circuit of fig. 1 at the actual operating frequency and interface rate, it is necessary to provide one root complex device connected to the upstream port to provide the burn-in stimulus and output load and N-1 endpoint devices connected to all the downstream ports to provide the burn-in stimulus and output load. However, the requirement of nxm peripheral PCIe devices as drivers and loads for burn-in of M circuits in the mass production of circuits incurs high hardware cost, and makes burn-in circuit sites available on burn-in printed boards extremely limited, incurring high or even unacceptable testing costs.
Disclosure of Invention
The invention aims to overcome the defects that the aging of a plurality of circuits needs more peripheral PCIe devices as excitation and load, which causes higher hardware cost and test cost in the prior art, and provides a high-temperature dynamic aging system and a method of PCIe exchange circuit.
In order to achieve the purpose, the invention adopts the following technical scheme to realize the purpose:
a high-temperature dynamic burn-in system of PCIe switching circuit comprises a burn-in port, an internal processing module, a burn-in enable pin and a transaction processing output pin;
a burn-in port, including a burn-in upstream port and a burn-in downstream port, for receiving, routing or discarding configuration transactions for a particular ID and memory transactions for a particular address range;
the internal processing module is interacted with the aging port and used for detecting the transaction receiving state of each port in the circuit, forming a uniform transaction processing signal and outputting the uniform transaction processing signal to a transaction processing output pin; simultaneously routing the received aging affair to an aging upstream port or an aging downstream port;
the burn-in enabling pin is respectively interacted with the internal processing module and the burn-in port and used for enabling a burn-in mode of the PCIe exchange circuit;
the transaction processing output pin is interacted with the internal processing module and used for judging whether the circuit is normal or not during the circuit aging period;
when the number of PCIe ports in the circuit is odd, the system further comprises a last port upstream enable pin for connecting with a specific burn-in port and configuring the specific burn-in port as a burn-in upstream port or a burn-in downstream port.
Preferably, the structure of the aging upstream port or the aging downstream port is the same;
the burn-in upstream port and the burn-in downstream port are respectively connected with the burn-in downstream port and the burn-in upstream port of the same or different burn-in circuits through PCB printed lines.
Preferably, when the number of PCIe ports in the circuit is even, half of the ports are fixedly configured as burn-in upstream ports, and half of the ports are fixedly configured as burn-in downstream ports;
when the number of the PCIe ports in the circuit is odd, the circuit further comprises a specific port connected with the upstream enabling pin of the last port, and except the specific port, half of the ports are fixedly configured as burn-in upstream ports, and the other half of the ports are fixedly configured as burn-in downstream ports.
Preferably, the burn-in port comprises a physical layer module, a controller module, a burn-in transaction sending module, an output end virtual receiving module and a burn-in transaction receiving module;
the physical layer module is interacted with the controller module and is used for realizing the PCIe protocol physical layer function;
the controller module is respectively interacted with the internal processing module and the burn-in transaction sending module, and is used for acquiring a data link layer of a PCIe protocol and controlling the sending of the burn-in transaction;
the aging transaction sending module is interacted with the controller module and is used for periodically sending an aging transaction to an opposite-end downstream port or an opposite-end upstream port connected with the port through the controller module and the physical layer module after the link training is finished and a link is established;
the output end virtual receiving module is interacted with the internal processing module and is used for executing the virtual receiving function of the aging transaction, and taking and discarding the aging transaction in real time;
the aging transaction receiving module is interacted with the controller module and the internal processing module connecting block and is used for submitting the aging transaction received by the controller module to the internal processing module.
Preferably, the link of the burn-in port is a single path or a multi-path.
Preferably, the last port upstream enable pin is multiplexed with the functional mode configuration pin.
Preferably, when the burn-in mode enable pin is active and the last port upstream enable pin is active, the particular port is a burn-in upstream port;
when the burn-in mode enable pin is active and the last port upstream enable pin is inactive, the particular port is a burn-in downstream port.
A high-temperature dynamic burn-in method of PCIe exchange circuit includes the following steps:
s1: configuring the port burn-in mode enabling pin of each circuit to be effective through the level;
for the circuits with odd port numbers, the last upstream enabling pin of the port of one circuit on the adjacent burn-in station is configured to be valid through level, and the last upstream enabling pin of the other circuit is not valid;
for a circuit with an even port number, a last port upstream enabling pin is not arranged;
s2: connecting the adjacent burn-in upstream port and the burn-in downstream port on each burn-in station according to a PCB printed line conforming to a PCIe protocol; the transmitting signal of the aging upstream port is connected with the receiving signal of the aging downstream port, and the receiving signal of the aging upstream port is connected with the transmitting signal of the aging downstream port;
s3: powering on the circuit and generating a clock and a reset which meet the circuit requirements;
s4: after the reset is finished, the PCIe exchange circuit to be aged automatically enters an aging mode, and each aging upstream port and each aging downstream port carry out link training and establishment according to a PCIe protocol;
s5: after the aging upstream port and the aging downstream port complete link establishment, an aging flow in the circuit is started, and PCIe aging affairs are periodically and continuously sent from the aging downstream port to the aging upstream port or PCIe aging affairs are periodically and continuously sent from the aging upstream port to the aging downstream port;
s6: and polling and monitoring whether the transaction processing indication output signal of the circuit on each aging station changes periodically or not during aging, and further judging whether the aging circuit is invalid or not.
Preferably, in S2, for a circuit with an odd number of ports, the specific ports of the two circuits on adjacent burn-in stations are connected according to the PCB tracks conforming to the PCIe protocol; the specific port of one circuit on the adjacent burn-in station is used as the upstream port of the burn-in, and the specific port of the other circuit is used as the downstream port of the burn-in.
Compared with the prior art, the invention has the following beneficial effects:
the invention relates to a high-temperature dynamic burn-in system of a PCIe exchange circuit, which comprises a burn-in port, an internal processing module, a burn-in enable pin and a transaction processing output pin, wherein the system functionally covers the functions of a physical layer, a controller, a transaction routing exchange and the like of the circuit to the maximum extent, so that each port of the circuit transmits and receives transactions during the burn-in period, and dynamic burn-in is carried out according to the normal working frequency and the bus interface rate of the PCIe exchange circuit; according to the invention, each burn-in circuit can be burned in according to the working frequency of the circuit and the bus interface speed without externally connecting PCIe root complex equipment and a plurality of PCIe endpoint equipment, N × M peripheral PCIe equipment can be saved by the burn-in station of the M N-port circuits, and the use cost of components on the burn-in board is greatly saved; meanwhile, the invention realizes more stations on the aging single board due to the reduction of peripheral PCIe devices on the aging board, can age more circuits in the same aging high-temperature box, and saves the test cost.
The invention also discloses a high-temperature dynamic burn-in method of the PCIe exchange circuit, which enables the pin to be effective by configuring the port burn-in mode of each circuit through the level, so that the circuit to be burned in enters the burn-in mode; setting the PCIe ports of the circuit to be aged in an even number and an odd number according to the condition, connecting the adjacent aging upstream port and the aging downstream port on each aging station according to the PCB printed line conforming to the PCIe protocol, electrifying the circuit and generating a clock and reset conforming to the circuit requirements, so that the circuit is in the designed aging working frequency and the aging initial state; after the reset is finished, the PCIe exchange circuit to be aged automatically enters an aging mode, and each aging upstream port and each aging downstream port train and establish a link according to a PCIe protocol so as to provide a reliable link for the sending and receiving of aging transactions in subsequent steps; after the aging upstream port and the aging downstream port complete link establishment, an aging flow in the circuit is started, aging of functional logics such as physical layer sending, controller sending, transaction sending and the like is realized through the sending of aging transactions, and aging of functional logics such as physical layer receiving, controller receiving, routing and the like is realized through the receiving of aging transactions; and polling and monitoring whether the transaction processing indication output signal of the circuit on each aging station changes periodically or not during aging, and further judging whether the aging circuit is invalid or not, so that the functional failure of the circuit can be judged in the aging process.
Drawings
FIG. 1 is a diagram of a typical application of a PCIe switch circuit having N ports;
FIG. 2 is a diagram of the external interface connection of the high temperature dynamic burn-in system of the PCIe switched circuit of the present invention;
FIG. 3 is a schematic diagram of a burn-in mode configuration for either a burn-in upstream port or a burn-in downstream port of the present invention;
FIG. 4 is a schematic diagram of a 7-port PCIe switched circuit structure and burn-in bias of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
example 1
A high-temperature dynamic burn-in system of PCIe switching circuit comprises a burn-in port, an internal processing module, a burn-in enable pin and a transaction processing output pin;
a burn-in port, including a burn-in upstream port and a burn-in downstream port, for receiving, routing or discarding configuration transactions for a particular ID and memory transactions for a particular address range;
the internal processing module is interacted with the aging port and used for detecting the transaction receiving state of each port in the circuit, forming a uniform transaction processing signal and outputting the uniform transaction processing signal to a transaction processing output pin; simultaneously routing the received aging affair to an aging upstream port or an aging downstream port;
the burn-in enabling pin is respectively interacted with the internal processing module and the burn-in port and used for enabling a burn-in mode of the PCIe exchange circuit;
the transaction processing output pin is interacted with the internal processing module and used for judging whether the circuit is normal or not during the circuit aging period;
when the number of PCIe ports in the circuit is odd, the system further comprises a last port upstream enable pin for connecting with a specific burn-in port and configuring the specific burn-in port as a burn-in upstream port or a burn-in downstream port.
Example 2
A dynamic burn-in mode system of PCIe exchange circuit comprises a burn-in upstream port, a burn-in downstream port, an internal processing module, a burn-in mode enabling pin, a last port upstream enabling pin and a transaction processing output pin; a burn-in upstream port and a burn-in downstream port may be externally connected; the internal processing module is connected with the aging upstream port; the internal processing module is connected with the aging downstream port; the burn-in enable pin is connected with a burn-in upstream port; the aging enable pin is connected with an aging downstream port; the aging enabling pin is connected with the internal processing module; finally, the upstream enabling pin of the port is connected with a specific port; the transaction output pin is connected with the internal processing module; the aging upstream port or the aging downstream port comprises a physical layer module, a controller module, an aging transaction sending module, an outlet virtual receiving module and an aging transaction receiving module; the aging transaction sending module is connected with the controller module; the aging transaction receiving module is connected with the controller module and the internal processing module; the output end virtual receiving module is connected with the internal processing module. The link of the aging upstream port is a multi-path.
Example 3
A high-temperature dynamic burn-in system of PCIe switching circuit comprises a burn-in port, an internal processing module, a burn-in enable pin and a transaction processing output pin;
the link of the burn-in upstream port is a single path (Lane); the link of the burn-in downstream port can be a single path (Lane), and the burn-in upstream port physical layer module realizes the function of a PCIe protocol physical layer; the burn-in upstream port controller realizes the functions of a data link layer and a transaction layer of a PCIe protocol; the aging downstream port comprises a physical layer module, a controller module, an aging transaction sending module, an outlet virtual receiving module and an aging transaction receiving module; the aging downstream port physical layer module realizes the function of a PCIe protocol physical layer; the aging downstream port controller realizes the functions of a data link layer and a transaction layer of a PCIe protocol; the burn-in mode enabling pin is used for enabling a burn-in mode of the PCIe switching circuit, so that part of ports of the circuit are configured as burn-in upstream ports, and part of ports are configured as burn-in downstream ports; the last port upstream enabling pin is only set when the number of the ports of the PCIe exchange switch is odd; this pin need not be provided for PCIe switch circuits of an even number of ports. The upstream enabling pin of the last port can be independently set or can be multiplexed with other functional mode configuration pins; when multiplexing with a functional mode configuration pin, when the burn-in mode enable pin is active, the pin is interpreted as the last port upstream enable pin; otherwise the pin is interpreted as a functional mode pin. Part of ports of the circuit are configured as burn-in upstream ports, and part of ports are configured as burn-in downstream ports, which means that: half of the ports of the circuit are fixedly configured as burn-in upstream ports, and the fixed configuration of half of the ports as burn-in downstream ports means that: one of two ports with adjacent or near PCIe outer lead pins of the port is fixedly configured as a burn-in upstream port, and the other port is fixedly configured as a burn-in downstream port.
The specific port connected to the last port upstream enable pin is: when the number of the ports is odd, selecting a specific port, for example, the port with the largest port number is connected with the last port upstream enable pin, and the port can be configured as a burn-in upstream port or a burn-in downstream port; when the burn-in mode enabling pin is effective and the last port upstream enabling pin is effective, the selected specific port is used as a burn-in upstream port; when the burn-in mode enabling pin is effective and the last port upstream enabling pin is ineffective, the selected specific port is used as a burn-in downstream port;
the burn-in upstream port is configured as an upstream port in a burn-in mode, and can receive, route or discard configuration transactions of a specific ID and memory transactions of a specific address range by configuring a Primary Bus Number (Primary Bus Number), a Secondary Bus Number (Secondary Bus Number) and a Subordinate Bus Number (Subordinate Bus Number) therein, and a memory base point register and a memory boundary register as fixed values or/and configuring a routing mode;
the aging downstream port is configured as a downstream port in an aging mode, and can receive, route or discard configuration transactions of a specific ID and memory transactions of a specific address range by configuring the primary bus number, the secondary bus number and the subordinate bus number inside the aging downstream port, and a memory base point register and a memory limit register as fixed values or/and a configuration route mode; the aging transaction sending module of the aging upstream port or the aging downstream port finishes link training at the pair of the aging upstream port and the aging downstream port and periodically sends the same transaction or different transactions as aging transactions to the opposite-end downstream port or the upstream port through the controller module and the physical layer module after the link is established; and the aging transaction receiving module of the opposite aging downstream port or the aging upstream port submits the aging transaction received by the physical layer and the controller module to the internal processing module.
The internal processing module routes the aging affair to an outlet virtual receiving module of the aging upstream port or the aging downstream port; the output end virtual receiving module of the burn-in upstream port or the burn-in downstream port executes the virtual receiving function of the burn-in transaction, and the burn-in transaction is taken away and discarded in real time; the internal processing module also detects the transaction receiving state of each port of the circuit, forms a uniform transaction processing signal and outputs the uniform transaction processing signal to the transaction processing output pin; the transaction processing output pin can be independently arranged or can be multiplexed with other functional mode pins; when multiplexed with other functional mode pins, the transaction output pin is interpreted when the burn-in mode enable pin is active; the transaction output pin is used for determining whether the circuit is normal during circuit burn-in.
Example 4
The dynamic burn-in mode structure and burn-in bias diagram of the 7-port PCIe switching circuit realized according to the invention. As shown in fig. 4, the circuit consists of 7 ports and an internal processing module, and a burn-in mode enable pin, a last port upstream enable pin and a transaction output pin are provided. Port 0 and port 1, port 2 and port 3, and port 4 and port 5 of the circuit are physically adjacent.
The circuit fixedly configures a port 0, a port 2 and a port 4 of 7 ports as aging upstream ports, and fixedly configures a port 1, a port 3 and a port 5 as aging downstream ports; the port 0 and the port 1 are connected through a PCB printed line to provide excitation and load; similarly, port 2 is connected to port 3 and port 4 is connected to port 5; the remaining ports 6 are selected as special ports and are connected to the ports 6 of another aging circuit at an adjacent station to provide excitation and load to each other.
Example 5
In the embodiment, in the burn-in mode, the primary bus numbers of the insides of the burn-in upstream port 0, the port 2 and the port 4 are configured as 1, the secondary bus numbers are configured as 2, the subordinate bus numbers are configured as 8, the base point register of the memory is configured as 0x00000, the limit register of the memory is configured as 0xFFFFF, and the routing table is configured to route all transactions to the adjacent burn-in downstream port; fixedly configuring the internal primary bus numbers of the aging downstream ports 1, 3 and 5 to be 2, configuring the secondary bus number to be 3, configuring the subordinate bus number to be 3, configuring a memory base point register to be 0x00000, configuring a memory limit register to be 0x0000F, and configuring a routing table to route all transactions to an adjacent aging upstream port; the internal primary bus number of the special port 6 is fixedly configured as 2, the secondary bus number is configured as 3, the subordinate bus number is configured as 3, the memory base point register is configured as 0x00000, the memory limit register is configured as 0x0000F, and the routing table is configured as all transaction discard.
The aging transaction sending module of the aging upstream port of the embodiment is designed to detect and judge whether link training is completed, and when an indication signal linkup for completing link establishment is valid, the configuration read transaction and the memory write transaction are periodically sent to the aging downstream port according to the sequence of 'configuration read transaction → interval waiting for 1ms → memory write transaction → interval waiting for 1 ms'; wherein, the configuration read transaction access bus 3 and the write address of the memory write transaction are 0x00FFF 00000;
as shown in fig. 2 and fig. 3, the aging transaction sending module of the aging downstream port is designed to detect and determine whether the link training is completed, and after the indication signal linkup indicating that the link establishment is completed is valid, periodically send the configuration read transaction and the memory write transaction to the aging upstream port according to the sequence of "configuration read transaction → interval wait 1ms → memory write transaction → interval wait 1 ms". The aging upstream port 0, the port 2 and the port 4 route the received configuration transaction and the memory write transaction to an output end virtual receiving module of an aging downstream port; the aging downstream port 1, the port 3 and the port 5 route the received configuration transaction and the memory write transaction to an output end virtual receiving module of the aging upstream port; the port 6 discards the received configuration transactions and memory write transactions.
The output end virtual receiving module of this embodiment can read the transaction in the cache; when an outlet virtual receiving module of a burn-in upstream port or a burn-in downstream port receives a burn-in transaction of a route, the outlet virtual receiving module immediately takes the transaction away and discards the transaction; in the internal processing module of this embodiment, 7 ports of the circuit are detected, and when a certain port does not receive a burn-in transaction within 2ms, a transaction processing output pin is set to low level output; when all ports can receive aging transactions within 2ms, a high level pulse is output every 2 ms.
To save the number of pins in the circuit, the last port upstream enable pin and the transaction output pin are both multiplexed with other functional mode pins in this embodiment. The link widths of the upstream and downstream ports are generally uniform.
Example 5
A high-temperature dynamic burn-in method of PCIe switching circuit is as follows:
s1: pulling up the burn-in mode enabling pin of each circuit to a 2.75V power supply through a resistor, so that the burn-in mode enabling pin of each circuit is effective;
s2: pulling up the upstream enabling pin of the last port on the circuit with the station number of an even number to a 2.75V power supply through a resistor to enable the upstream enabling pin to be effective; grounding an upstream enabling pin of a last port on a circuit with odd station numbers to make the upstream enabling pin invalid;
s3: connecting a port 0 and a port 1, a port 2 and a port 3, and a port 4 and a port 5 on each burn-in station according to a PCB printed line conforming to a PCIe protocol; the transmitting signal of the aging upstream port is connected with the receiving signal of the aging downstream port, and the receiving signal of the aging upstream port is connected with the transmitting signal of the aging downstream port;
s4: the ports 6 of the two circuits on the adjacent aging stations (an even-numbered station and an odd-numbered station) are connected according to the PCB printed line conforming to the PCIe protocol; the port 6 on the even-numbered station is used as a burn-in upstream port, and the port 6 on the odd-numbered station is used as a burn-in downstream port;
s5: the circuit is powered on through power supply, clock and reset signals provided by other components on the burn-in board and/or the burn-in machine, and a 100MHz input clock and 200us power-on reset are generated;
s6: after the reset is finished, the PCIe exchange circuit to be aged automatically enters an aging mode, and each aging upstream port and each aging downstream port carry out link training and establishment according to a PCIe protocol;
s7: after the aging upstream port and the aging downstream port complete the link establishment, the aging process in the circuit is started, namely the aging downstream port periodically and continuously sends PCIe aging affairs to the aging upstream port or the aging upstream port to the aging downstream port;
s8: in the aging period, polling and monitoring whether the transaction processing indication output signal of the circuit on each aging station outputs a positive pulse for 2ms periodically by an oscilloscope carried by aging equipment; if the transaction processing indicates that the output signal periodically outputs a positive pulse once in 2ms, the circuit is normal, otherwise, the circuit aging is judged to be invalid.
According to the high-temperature dynamic burn-in method of the PCIe exchange circuit, the port burn-in mode enabling pin of each circuit is configured through the level, so that the circuit to be burned in enters the burn-in mode; when the number of PCIe ports of the circuit to be aged is an even number, enabling half ports of the circuit to enter an aging upstream port mode and half ports to enter an aging downstream port mode; when the number of PCIe ports of the circuit is odd, enabling an upstream enabling pin of a last port of a circuit on an adjacent burn-in station to be effective through level configuration, and enabling a specific port of the circuit to enter a burn-in upstream mode; enabling a specific port of the other circuit to enter a burn-in downstream mode by disabling a last upstream enable pin of the other circuit;
connecting the adjacent burn-in upstream port and the burn-in downstream port on each burn-in station according to a PCB printed line conforming to a PCIe protocol; the transmitting signal of the aging upstream port is connected with the receiving signal of the aging downstream port, and the receiving signal of the aging upstream port is connected with the transmitting signal of the aging downstream port; and the signals transmitted by the aging upstream port and the aging downstream port respectively provide excitation for the signals received by the aging downstream port and the aging upstream port, and the signals received by the aging upstream port and the aging downstream port are respectively used as aging loads for the signals transmitted by the aging downstream port and the aging upstream port. Powering on the circuit and generating a clock and a reset which meet the circuit requirements so that the circuit is in a designed burn-in working frequency and a burn-in initial state; after the reset is finished, the PCIe exchange circuit to be aged automatically enters an aging mode, and each aging upstream port and each aging downstream port train and establish a link according to a PCIe protocol so as to provide a reliable link for the sending and receiving of aging transactions in subsequent steps; after the aging upstream port and the aging downstream port complete link establishment, an aging flow in the circuit is started, and PCIe aging affairs are periodically and continuously sent from the aging downstream port to the aging upstream port or PCIe aging affairs are periodically and continuously sent from the aging upstream port to the aging downstream port; the aging of functional logics such as physical layer sending, controller sending, transaction sending and the like is realized through the sending of aging transactions, and the aging of functional logics such as physical layer receiving, controller receiving, routing and the like is realized through the receiving of aging transactions; and polling and monitoring whether the transaction processing indication output signal of the circuit on each aging station changes periodically or not during aging, and further judging whether the aging circuit is invalid or not, so that the functional failure of the circuit can be judged in the aging process.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (9)
1. A high-temperature dynamic burn-in system of PCIe exchange circuit is characterized in that the system comprises a burn-in port, an internal processing module, a burn-in enable pin and a transaction processing output pin;
a burn-in port, including a burn-in upstream port and a burn-in downstream port, for receiving, routing or discarding configuration transactions for a particular ID and memory transactions for a particular address range;
the internal processing module is interacted with the aging port and used for detecting the transaction receiving state of each port in the circuit, forming a uniform transaction processing signal and outputting the uniform transaction processing signal to a transaction processing output pin; simultaneously routing the received aging affair to an aging upstream port or an aging downstream port;
the burn-in enabling pin is respectively interacted with the internal processing module and the burn-in port and used for enabling a burn-in mode of the PCIe exchange circuit;
the transaction processing output pin is interacted with the internal processing module and used for judging whether the circuit is normal or not during the circuit aging period;
when the number of PCIe ports in the circuit is odd, the system further comprises a last port upstream enable pin for connecting with a specific burn-in port and configuring the specific burn-in port as a burn-in upstream port or a burn-in downstream port.
2. The high temperature dynamic burn-in system for PCIe switched circuits of claim 1,
the structures of the aging upstream port or the aging downstream port are the same;
the burn-in upstream port and the burn-in downstream port are respectively connected with the burn-in downstream port and the burn-in upstream port of the same or different burn-in circuits through PCB printed lines.
3. The high temperature dynamic burn-in system for PCIe switch circuit of claim 1, wherein when the number of PCIe ports in the circuit is even, half of the ports are fixedly configured as burn-in upstream ports and half of the ports are fixedly configured as burn-in downstream ports;
when the number of the PCIe ports in the circuit is odd, the circuit further comprises a specific port connected with the upstream enabling pin of the last port, and except the specific port, half of the ports are fixedly configured as burn-in upstream ports, and the other half of the ports are fixedly configured as burn-in downstream ports.
4. The high temperature dynamic burn-in system for PCIe switch circuit as recited in claim 1, wherein the burn-in port comprises a physical layer module, a controller module, a burn-in transaction sending module, an egress virtual receiving module, and a burn-in transaction receiving module;
the physical layer module is interacted with the controller module and is used for realizing the PCIe protocol physical layer function;
the controller module is respectively interacted with the internal processing module and the burn-in transaction sending module, and is used for acquiring a data link layer of a PCIe protocol and controlling the sending of the burn-in transaction;
the aging transaction sending module is interacted with the controller module and is used for periodically sending an aging transaction to an opposite-end downstream port or an opposite-end upstream port connected with the port through the controller module and the physical layer module after the link training is finished and a link is established;
the output end virtual receiving module is interacted with the internal processing module and is used for executing the virtual receiving function of the aging transaction, and taking and discarding the aging transaction in real time;
the aging transaction receiving module is interacted with the controller module and the internal processing module connecting block and is used for submitting the aging transaction received by the controller module to the internal processing module.
5. The high temperature dynamic burn-in system for PCIe switch circuit as recited in claim 1, wherein the link of the burn-in port is a single lane or a multi lane.
6. The high temperature dynamic burn-in system for PCIe switch circuit of claim 1, wherein the last port upstream enable pin is multiplexed with the functional mode configuration pin.
7. The high temperature dynamic burn-in system for PCIe switched circuits of claim 1,
when the burn-in mode enable pin is valid and the last port upstream enable pin is valid, the specific port is a burn-in upstream port;
when the burn-in mode enable pin is active and the last port upstream enable pin is inactive, the particular port is a burn-in downstream port.
8. A high-temperature dynamic burn-in method of a PCIe switching circuit is characterized by comprising the following steps:
s1: configuring the port burn-in mode enabling pin of each circuit to be effective through the level;
for the circuits with odd port numbers, the last upstream enabling pin of the port of one circuit on the adjacent burn-in station is configured to be valid through level, and the last upstream enabling pin of the other circuit is not valid;
for a circuit with an even port number, a last port upstream enabling pin is not arranged;
s2: connecting the adjacent burn-in upstream port and the burn-in downstream port on each burn-in station according to a PCB printed line conforming to a PCIe protocol; the transmitting signal of the aging upstream port is connected with the receiving signal of the aging downstream port, and the receiving signal of the aging upstream port is connected with the transmitting signal of the aging downstream port;
s3: powering on the circuit and generating a clock and a reset which meet the circuit requirements;
s4: after the reset is finished, the PCIe exchange circuit to be aged automatically enters an aging mode, and each aging upstream port and each aging downstream port carry out link training and establishment according to a PCIe protocol;
s5: after the aging upstream port and the aging downstream port complete link establishment, an aging flow in the circuit is started, and PCIe aging affairs are periodically and continuously sent from the aging downstream port to the aging upstream port or PCIe aging affairs are periodically and continuously sent from the aging upstream port to the aging downstream port;
s6: and polling and monitoring whether the transaction processing indication output signal of the circuit on each aging station changes periodically or not during aging, and further judging whether the aging circuit is invalid or not.
9. The method for high-temperature dynamic burn-in of PCIe switch circuit of claim 8, wherein, in S2, for the circuit with odd number of ports, the specific ports of two circuits on adjacent burn-in stations are connected according to the PCB tracks conforming to PCIe protocol; the specific port of one circuit on the adjacent burn-in station is used as the upstream port of the burn-in, and the specific port of the other circuit is used as the downstream port of the burn-in.
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