CN113940689B - Closed-loop deep brain stimulation artifact suppression system - Google Patents

Closed-loop deep brain stimulation artifact suppression system Download PDF

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CN113940689B
CN113940689B CN202111074246.XA CN202111074246A CN113940689B CN 113940689 B CN113940689 B CN 113940689B CN 202111074246 A CN202111074246 A CN 202111074246A CN 113940689 B CN113940689 B CN 113940689B
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input
stimulation
analog
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CN113940689A (en
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刘伟
王守岩
权昭宇
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Fudan University
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Fudan University
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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00Measuring for diagnostic purposes; Identification of persons
    • A61B5/24Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
    • A61B5/316Modalities, i.e. specific diagnostic methods
    • A61B5/369Electroencephalography [EEG]
    • A61B5/377Electroencephalography [EEG] using evoked responses
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00Measuring for diagnostic purposes; Identification of persons
    • A61B5/72Signal processing specially adapted for physiological signals or for diagnostic purposes
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • A61N1/3605Implantable neurostimulators for stimulating central or peripheral nerve system

Abstract

The invention discloses a closed-loop deep brain stimulation artifact suppression system, which comprises an electrode module, a sensor module, a control module and a control module, wherein the electrode module is in contact with the body surface of a human body to apply electrical stimulation and record corresponding nerve signals; the front-end module is used for inhibiting stimulation artifacts in the nerve signals and amplifying local field potential signals in the nerve signals; the analog-to-digital conversion module is matched with the local field potential signal and realizes digitization; the input end of the front end module is configured as differential input, the output end is configured as differential output, the neural signals are differentially input to the front end module, and the filtered and amplified local field potential signals are differentially output to the analog-to-digital conversion module. The closed-loop deep brain stimulation artifact suppression system disclosed by the invention can realize synchronous acquisition and synchronous stimulation in the deep brain stimulation process, and effectively suppress the influence of stimulation artifact on nerve signals in the simultaneous acquisition and stimulation, so that local field potential signals are recorded in real time with higher quality.

Description

Closed-loop deep brain stimulation artifact suppression system
Technical Field
The invention relates to the technical field of brain-computer interfaces and medical electronic circuits, in particular to a closed-loop deep brain stimulation artifact suppression system.
Background
The subthalamic nucleus (STN) of Parkinson's Disease (PD) patients can continuously detect Local Field Potential (LFP) oscillations in the beta band (13-30 Hz), and LFP signal intensity correlates with disease severity and therapeutic effect. Reliable signal detection can be achieved during stimulation rather than detecting neural signals by stopping stimulation during stimulation, which is critical for closed-loop neural stimulation systems.
Observing the LFP signal during stimulation may reveal new neural activity that is not present in the neural tissue in the absence of stimulation. However, the large difference between the amplitude of the stimulation pulses and the associated neural signal amplitude results in the occurrence of stimulation artifacts, which prevent accurate recording of the neural signal and processing of the effective biomarker signal.
More specifically, the normal amplitude of the LFP signal may be from a few microvolts to hundreds microvolts, while the normal amplitude of the stimulation pulse is from a few hundred millivolts to a few volts. It is apparent that the magnitude of LFP is about 5 to 6 orders of magnitude smaller than the magnitude of the stimulation pulses, differing by about 100 to 120dB. Thus, designing an LFP stimulation pulse generated artifact suppression front-end circuit that can record weak nerve signals (microvolts) in the presence of strong stimulation artifacts (volts) without saturating the acquisition analog-to-digital converter may be the most difficult challenge associated with implementing simultaneous detection and simultaneous stimulation strategies.
Disclosure of Invention
The invention aims to provide a closed-loop deep brain stimulation artifact suppression system which can realize synchronous acquisition and synchronous stimulation in the deep brain stimulation process and effectively suppress the influence of stimulation artifact on nerve signals in the simultaneous acquisition and stimulation, thereby recording local field potential signals in real time with higher quality.
In order to solve the above technical problems, in one aspect, the present invention provides a closed-loop deep brain stimulation artifact suppression system, including:
the electrode module is contacted with the body surface of the human body to apply electric stimulation and record corresponding nerve signals;
a front-end module that suppresses stimulus artifacts in the neural signal, amplifies a local field potential signal in the neural signal;
the analog-to-digital conversion module is matched with the local field potential signal and realizes digitization;
the input end of the front-end module is configured as differential input, the output end of the front-end module is configured as differential output, the neural signals are differentially input to the front-end module, and the filtered and amplified local field potential signals are differentially output to the analog-to-digital conversion module.
Preferably, the front-end module comprises a front-end amplifying circuit, a high-pass filtering circuit, a low-pass filtering circuit and a rear-end amplifying circuit which are sequentially connected, the front-end amplifying circuit is connected with the electrode module, and the rear-end amplifying circuit is connected with the analog-to-digital conversion module.
Preferably, the input end of the front-end amplifying circuit is configured as differential input, the output end is configured as single-ended output, and the gain of the front-end amplifying circuit is configured as 40 dB-60 dB.
Preferably, the input end of the high-pass filter circuit is configured as single-ended input, the output end of the high-pass filter circuit is configured as single-ended output, and the cut-off frequency of the high-pass filter circuit is configured to be 0.05-1 Hz.
Preferably, the input end of the low-pass filter circuit is configured as single-ended input, the output end is configured as single-ended output, and the cut-off frequency of the low-pass filter circuit is configured to be 40-48 Hz.
Preferably, the input end of the back-end amplifying circuit is configured as single-ended input, the output end is configured as differential output, and the gain of the back-end amplifying circuit is configured to be 0 dB-20 dB.
Preferably, the voltage of the back-end amplifying circuit is matched with the voltage of the analog-to-digital conversion module.
Preferably, the gain of the analog-to-digital conversion module is matched with the gain of the back-end amplifying circuit, so that the maximum voltage range of the local field potential signal is within the acquisition range of the analog-to-digital conversion module.
Compared with the prior art, the invention has the following advantages:
according to the method, the front end module capable of amplifying the local field potential signals of interest and inhibiting the non-interesting stimulation artifacts is arranged after nerve tissues and before digitization, synchronous acquisition and synchronous stimulation can be realized in the deep brain stimulation process, and the influence of the stimulation artifacts on the nerve signals is effectively inhibited in the simultaneous acquisition and stimulation, so that the local field potential signals are recorded in real time with higher quality;
furthermore, the front-end module adopts a front-end amplifying circuit, a high-pass filter circuit, a low-pass filter circuit and a rear-end amplifying circuit, and configures various levels of circuit specifications according to requirements, so that the difference between the acquired stimulation artifact and the signal of interest is reduced from the original difference of 5-6 orders of magnitude (100 dB-120 dB) to be smaller than 1 order of magnitude (20 dB), thereby supporting closed-loop deep brain stimulation application for realizing real-time synchronous recording and synchronous stimulation, and being capable of reliably recording beta low-frequency and beta high-frequency LFP signals during unipolar or bipolar deep brain stimulation.
Drawings
The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way. In addition, the shapes, proportional sizes, and the like of the respective components in the drawings are merely illustrative for aiding in understanding the present invention, and are not particularly limited. Those skilled in the art with access to the teachings of the present invention can select a variety of possible shapes and scale sizes to practice the present invention as the case may be. In the drawings:
FIG. 1 is a block diagram of a closed loop deep brain stimulation artifact suppression system in accordance with the present invention;
FIG. 2 is a block diagram of a front end module of the present invention;
FIG. 3 is a schematic diagram of a front-end amplifier circuit according to the present invention;
FIG. 4 is a schematic diagram of a high-pass filter circuit according to the present invention;
FIG. 5 is a schematic diagram of a low pass filter circuit according to the present invention;
FIG. 6 is a schematic diagram of a back-end amplifier circuit according to the present invention;
FIG. 7 is a flow chart of a closed loop deep brain stimulation artifact suppression method of the present invention;
fig. 8 is a specific flowchart of step S2 in fig. 7.
Detailed Description
In order to make the technical solution of the present invention better understood by those skilled in the art, the technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, shall fall within the scope of the invention.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only and are not meant to be the only embodiment.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1 and 2, a closed-loop deep brain stimulation artifact suppression system corresponding to a preferred embodiment of the present invention includes an electrode module 1, an analog-to-digital conversion module 3, and a front-end module 2 connected between the electrode module 1 and the analog-to-digital conversion module 3. The electrode module 1 is in contact with the body surface of the human body to apply electric stimulation, corresponding nerve signals are recorded, the front end module 2 suppresses stimulation artifacts in the nerve signals, local field potential signals in the nerve signals are amplified, and the analog-to-digital conversion module 3 is matched with the local field potential signals to realize digitization. During power-on, the front-end module 2 may be turned on and off using a dial switch.
In particular, the electrode module 1 is configured as a multi-contact implant electrode, and for convenience of description later, the electrode module 1 in this embodiment is described by taking a 4-segment implant electrode as an example. The 4-section type implantation electrode comprises a contact 0, a contact 1, a contact 2 and a contact 3, wherein if the contact 1 and the contact 3 are recording ends, the contact 2 is a stimulating end; if the contact 0 and the contact 2 are recording ends, the contact 1 is a stimulating end, the stimulating end is connected with a stimulating output channel, electric stimulation is applied to the body surface of the human body, the recording end is connected with the input end of the front end module 2, and correspondingly generated nerve signals are recorded.
As shown in fig. 2, the front-end module 2 includes a front-end amplifying circuit 21, a high-pass filter circuit 22, a low-pass filter circuit 23, and a back-end amplifying circuit 24, which are connected in this order.
The input terminal of the front-end amplification circuit 21 is configured as a differential input, and the output terminal is configured as a single-ended output. The neural signals are input to the front-end amplification circuit 21 in a differential manner, and may be recorded by unipolar stimulation or bipolar stimulation. When monopolar stimulation differential recording is used, one preferred connection is: one input pin of the front-end amplifying circuit 21 is connected with a contact 3/contact 2 of an implanted electrode, the other input pin is connected with a contact 1/contact 0, and the pin of the stimulation output channel is connected with the contact 2/contact 1; when bipolar stimulation differential recording is used, one preferred connection is: one input pin of the front-end amplifying circuit 21 is connected with the contact 3 of the implanted electrode, the other input pin is connected with the contact 0, the pin of the stimulation output channel is connected with the contact 2, and the systematic ground pin is connected with the contact 1. Differential input of neural signals, whether monopolar or bipolar stimulation, can ensure impedance matching to a maximum extent and use differential recording to eliminate common mode and differential mode artifact noise.
Specifically, as shown in fig. 3, the front-end amplifying circuit 21 includes an instrumentation amplifier INA1, an adjustable gain resistor Rg1, ±5v dc regulated voltage source, and a peripheral capacitor. The instrument amplifier INA1 is powered by a + -5V direct current stabilized voltage source, and the instrument amplifier INA1 preferably adopts an AD849 instrument amplifier to realize 10uV low input offset voltage and 40 nV/vHz (f=1K) output noise so as to meet the minimum noise requirement of neural signal recording; further, the amplification factor may be set by the adjustable gain resistor Rg1, and the gain of the entire front-end amplifying circuit 21 is configured to be 40dB to 60dB, preferably, the resistance value of the adjustable gain resistor Rg1 is generally set to be 60.4Ω or 6.04 Ω, which respectively corresponds to the implementation of the gain of 40dB or 60dB.
The nerve signal is generated after the electric stimulation is applied to the human body surface and is input into the front end amplifying circuit 21 in a differential input mode, at this time, the nerve signal comprises weaker local field potential signals in the brain and stimulation signals per se generate stronger stimulation artifact signals, after the stimulation artifact signals are amplified by the front end amplifying circuit 21, 100 uVpp-level local field potential signals are amplified into 10 mVpp-100 mVpp after passing through the front end amplifying circuit, and the maximum 10 mV-level stimulation artifact signals are amplified into 1 Vpp-10 Vpp at the maximum, at this time, the amplified nerve signals comprise most of stimulation artifact signals and harmonic frequency components thereof, and the stimulation artifact signals and the local field potential signals are amplified together and then output to the high-pass filter circuit 22 of the next stage in a single-ended mode.
The input end of the high-pass filter circuit 22 is matched with the output end of the front-end amplifying circuit 21, the input end is configured as single-ended input, and the output end is configured as single-ended output. The high-pass filter circuit 22 preferably adopts an active high-pass filter circuit, so that input and output noise can be reduced better, and the total noise is reduced. In this embodiment, according to the overall requirement and implementation effect, the cut-off frequency of the high-pass filter circuit 22 is configured to be 0.05-1 Hz, so that baseline drift and low-frequency direct current components can be well filtered, and the cut-off frequency is preferably configured to be 0.5Hz.
Specifically, as shown in fig. 4, the high-pass filter circuit 22 is preferably designed with-3 dB passband ripple, the cutoff frequency is 0.5Hz, the stop band frequency is set to 0.1Hz, the attenuation is-100 dB, and the three-stage 6-order Butterworth type circuit is obtained according to the 2-order mullen-key structure. The structure of the 2-order high-pass filter circuit of each stage is the same (the specific structure of one stage is shown in fig. 4), the 2-order high-pass filter circuit of the first stage comprises a capacitor Ch1, a resistor Rh1, a capacitor Ch2, a resistor Rh2, an operational amplifier Oph1 and a + -5V direct current power supply, the operational amplifier Oph1 is powered by + -5V, the output end of the instrumentation amplifier INA1 is connected to the P end of the operational amplifier Oph1 sequentially through the capacitor Ch1 and the capacitor Ch2, one end of the resistor Rh1 is connected between the capacitor Ch1 and the capacitor Ch2, the other end is connected to the N end of the operational amplifier Oph1, one end of the resistor Rh2 is connected between the capacitor Ch2 and the P end of the operational amplifier Oph1, and the other end is grounded. Further, the analogized second-stage 2-order high-pass filter circuit comprises a capacitor Ch3, a resistor Rh3, a capacitor Ch4, a resistor Rh4, an operational amplifier Oph2 and a + -5V direct current power supply; the third-stage 2-order high-pass filter circuit comprises a capacitor Ch5, a resistor Rh5, a capacitor Ch6, a resistor Rh6, an operational amplifier Oph3 and a + -5V direct current power supply, wherein the first stage and the second stage are preferably completed by adopting a low-noise and low-offset-voltage double-operational amplifier ADA4522-2, and the third stage is completed by adopting a low-noise and low-offset-voltage single-operational amplifier ADA 4522-1. The high-pass filter circuit 22 is so arranged that its filter output noise is less than 1.1uVpp.
To reduce noise, the high-pass filter circuit 22 does not introduce a resistive amplification factor, and is configured to have an amplification factor of 1. The amplified neural signal is filtered to remove baseline wander and low frequency dc components, at this time, the stimulus artifact signal and its harmonic components are attenuated to about-10 Vpp level, and the local field potential signal is also attenuated to about-100 mVpp level, but various high frequency components of the mixed signal are output to the low pass filter circuit 23 of the next stage in a single-ended manner.
The input of the low-pass filter circuit 23 is matched to the output of the high-pass filter circuit 22, the input of which is configured as a single-ended input and the output of which is configured as a single-ended output. The low-pass filter circuit 23 preferably adopts an active low-pass filter circuit, so that input and output noise can be reduced better, and the total noise is reduced. In this embodiment, according to the overall requirement and implementation effect, the cut-off frequency of the low-pass filter circuit 23 is configured to be 40-48 Hz, so that the stimulus artifact can be well filtered, the local field potential signal is reserved, and the cut-off frequency is preferably configured to be 45Hz.
Specifically, as shown in fig. 5, the low-pass filter circuit 23 is preferably designed with-3 dB passband ripple, the cut-off frequency is 45Hz, the stop band frequency is set to 125Hz, and a five-stage 10-stage Butterworth type circuit is obtained according to a 2-stage Sallen-key structure. The 2 nd order low-pass filter circuit of each stage has the same structure (fig. 5 shows a specific structure of one stage), the 2 nd order low-pass filter circuit of the first stage comprises a capacitor Cl1, a resistor Rl1, a capacitor Cl2, a resistor Rl2, an operational amplifier Opl1 and a plus or minus 5V direct current power supply, the operational amplifier Opl is powered by plus or minus 5V, the output end of the high-pass filter circuit is connected to the P end of the operational amplifier Opl1 sequentially through the resistor Rl1 and the resistor Rl2, one end of the capacitor Cl1 is connected between the resistor Rl1 and the resistor Rl2, the other end is connected to the N end of the operational amplifier Opl1, one end of the capacitor Cl2 is connected between the resistor Rl2 and the P end of the operational amplifier Opl1, and the other end is grounded. Further, the analogized second-stage 2-order low-pass filter circuit comprises a capacitor Cl3, a resistor Rl3, a capacitor Cl4, a resistor Rl4, an operational amplifier Opl2 and a + -5V direct current power supply; the third-stage 2-order low-pass filter circuit comprises a capacitor Cl5, a resistor Rl5, a capacitor Cl6, a resistor Rl6, an operational amplifier Opl3 and a + -5V direct current power supply; the fourth stage 2-stage low-pass filter circuit comprises a capacitor Cl7, a resistor Rl7, a capacitor Cl8, a resistor Rl8, an operational amplifier Opl and a + -5V direct current power supply; the fifth stage 2-stage low-pass filter circuit comprises a capacitor Cl9, a resistor Rl9, a capacitor Cl10, a resistor Rl10, an operational amplifier Opl5 and a +/-2.5V power supply direct current power supply. The first stage, the second stage, the third stage and the fourth stage are preferably completed by adopting a low-noise and low-offset voltage double operational amplifier ADA4522-2, and the fifth stage is completed by adopting a low-noise and low-offset voltage single operational amplifier ADA 4522-1. The low-pass filter circuit 23 is so arranged that its filter output noise is less than 1.6uVpp.
Similarly, in order to reduce noise, the low-pass filter circuit does not introduce a resistive amplification factor, and the amplification factor is configured to be 1. The stimulus artifact frequency component and its harmonic signal in the high frequency component of the mixed signal are low-pass filtered, and then greatly attenuated by about-100 dB, the local field potential signal is suppressed from-10 Vpp level to 100uVpp level, while the local field potential signal is only slightly attenuated by about-3 dB, still at-100 mVpp level, the stimulus artifact signal is suppressed, and the useful local field potential signal is left, and the cleaner local field potential signal is output to the next stage of back-end amplifying circuit 24 in a single-ended mode.
The input end of the back-end amplifying circuit 24 is matched with the output end of the low-pass filter circuit 23, and the output end is matched with the input end of the analog-to-digital conversion module 3, so that the input end of the back-end amplifying circuit 24 is configured as single-ended input, and the output end is configured as differential output.
Specifically, as shown in fig. 6, the back-end amplifying circuit 24 includes a resistor Rb1, an adjustable gain resistor Rf1, a resistor Rb2, an adjustable gain resistor Rf2, a matching resistor Rt, a fully differential amplifier INA2, an output reference capacitor Cc, an output differential capacitor Cd, a ±25v dc regulated voltage source, and a decoupling capacitor. The fully differential amplifier INA2 adopts the fully differential amplifier HP210 to realize low input offset voltage of 10uV and output noise of 9 nV/[ v ] Hz (f=1k) so as to meet the minimum noise requirement of neural signal recording; further, the gain of the whole back-end amplifying circuit 24 is configured to be 0 dB-20 dB by setting the amplification factors through the adjustable gain resistor Rf1 and the adjustable gain resistor Rf2, and the gain of the back-end amplifying circuit 24 and the gain of the front-end amplifying circuit 21 are matched to realize the total gain of 40 dB-80 dB. In order to better filter noise and maximally inhibit stimulation artifacts, preferably, the resistance values of the adjustable gain resistor Rf1, the adjustable gain resistor Rf2, the resistor Rb1 and the resistor Rb2 are all set to be 215 Ω, and the corresponding gain is 0dB; alternatively, the resistance values of the adjustable gain resistor Rf1 and the adjustable gain resistor Rf2 are set to 1000Ω, and the resistance values of the resistor Rb1 and the resistor Rb2 are set to 100deg.Ω, at which time the gain of 20dB is correspondingly achieved.
The output end of the low-pass filter circuit 23 is connected to the P input end of the fully differential amplifier INA2 through a resistor Rb1, and the N input end of the fully differential amplifier INA2 is grounded through a resistor Rb2, so as to realize single-ended input of the fully differential amplifier INA 2. The Voc pin of the fully differential amplifier INA2 can set a default output end intermediate power reference, and an output reference capacitor Cc is added on the Voc pin to reduce other high output noise of internal high impedance bias; an output differential capacitor Cd is added between the P output end and the N output end of the full differential amplifier INA2 to filter out high-frequency components and enter a subsequent analog-digital converter; since the output end of the back-end amplifying circuit 24 is configured as differential output, a matching resistor Rt needs to be added to the input end of the back-end amplifying circuit 24, impedance matching related to actual gain is performed by selecting a proper matching resistor Rt, and if the signal has a truncated condition or excessive attenuation, the signal indicates that the gain is not matched, so that the gain setting is incorrect; unlike the previous circuits, the voltage of the fully differential amplifier INA2 needs to be matched to the voltage of the analog-to-digital conversion module 3, in particular to the maximum voltage input range of the analog-to-digital conversion module 3, to prevent saturation of the analog-to-digital converter. Specifically, the fully differential amplifier INA2 is preferably powered by ±2.5v, which determines that the maximum output voltage of the back-end amplifying circuit 24 is-5 Vpp, so that after the signal passes through the back-end amplifying circuit 24, the amplification factor is generally set to be 0 dB-20 dB, and the maximum amplification factor is 20dB according to the requirement, when the amplification factor is higher than 0dB, the gain of the analog-to-digital conversion module 3 needs to be matched and considered, and the peak-to-peak amplitude of the signal cannot exceed the maximum voltage range borne by the analog-to-digital conversion module 3.
After the local field potential signal is amplified by the back-end amplifying circuit 24, the maximum amplitude of the output is 1000mVpp level, and the single-ended signal is converted into a differential signal to output differential capacitance Cd for filtering and output to the next-stage analog-digital conversion module 3.
The analog-digital conversion module 3 adopts +/-2.5V to supply power, and the maximum output voltage is determined to be 5Vpp by the power supply voltage, so that the voltage amplitude of the signal after being amplified by the analog-digital conversion module 3 is not greater than 5Vpp. The gain of the ADC is required to be set before the signal enters the analog-digital conversion module 3 for sampling, so that the maximum voltage range of the signal is ensured to be within the acquisition range of the analog-digital conversion module 3, and the saturation of the analog-digital conversion module 3 is prevented. If the amplification factor of the former stage circuit (namely the rear end amplification circuit) is set to be 0dB, the output local field potential signal is still at the level of 100mVpp, and the amplification factor of the latter stage analog-digital conversion module 3 can be arbitrarily selected; if the amplification factor of the front stage circuit (i.e. the back end amplifying circuit) is set to 20dB, the maximum amplitude of the output local field potential signal is at the level of-1000 mVpp, and the amplification factor of the back stage analog-to-digital conversion module 3 itself must be set to be less than 5 times, so that the maximum output signal voltage is kept to be less than 5Vpp.
After the gain of the analog-to-digital conversion module 3 is configured, the analog-to-digital conversion module 3 acquires a local field potential signal which greatly inhibits the stimulation artifact signal.
As with the system architecture set forth above, the closed loop deep brain stimulation artifact suppression system of the present application generally exhibits a fully differential low noise structure of differential inputs and differential outputs. Since the neural signals are differentially input and the analog-to-digital conversion module 3 is also designed to be differentially input, and the structure of the filter circuit is single-ended input and single-ended output, if a filter circuit with interference removal function is used before the analog-to- digital conversion module 3, 2 complete filter circuits are required to be added to the N and P lines. By the design, on one hand, two circuits cannot be completely consistent, and on the other hand, more chips are needed, and power consumption and occupied space are increased. In the closed-loop deep brain stimulation artifact suppression system, only 1 circuit is needed for one channel, the problem of inconsistent N and P circuits is not needed to be considered, and when multiple channels are needed, half of the chips are omitted, so that the power consumption is reduced, and the space is saved.
As shown in fig. 7 and 8, the present invention further proposes a closed-loop deep brain stimulation artifact suppression method, including:
s1: applying electrical stimulation to differentially input neural signals;
s2: suppressing stimulus artifacts in the neural signal, amplifying a local field potential signal in the neural signal;
the method specifically comprises the following steps:
s2-1: amplifying the nerve signal and outputting the nerve signal in a single-ended mode;
amplifying the neural signals input in a differential way by 40 dB-60 dB, and outputting single-ended signals V1 in a single-ended way;
s2-2: filtering low-frequency components in the amplified nerve signals, and outputting high-frequency components in a single-ended mode;
the single-ended signal V1 is filtered out by a 6-order active high-pass filter circuit with the cutoff frequency of 0.5Hz and the gain of 1, so that baseline drift and low-frequency direct current components are filtered, and a high-frequency component is reserved to output a single-ended signal V2 in a single-ended mode.
S2-3: filtering out the stimulation artifact in the high-frequency component, and outputting the local field potential signal in a single-ended mode;
the single-ended signal V2 is then passed through a 10-order active low-pass filter circuit with a cut-off frequency of 45Hz and a gain of 1, so that the stimulus artifact frequency component and the harmonic signal thereof in the high-frequency component are greatly attenuated, a useful local field potential signal is remained, and the single-ended signal V3 is output in a single-ended mode.
S2-4: amplifying the local field potential signal and outputting the local field potential signal in a differential mode;
the single-ended signal V3 is connected to the input end of the rear end amplifying circuit in a single-ended mode, the matching resistor Rt of the fully differential amplifier INA2 is reasonably configured to realize the impedance matching of a signal source, the single-ended signal V3 realizes the amplification of 0 dB-20 dB, and two paths of signals of differential signals VoutP and VoutN are output in a differential mode.
S3: matching the amplified local field potential signals and realizing digitization.
The differential signal V4 is directly connected to the input end of the analog-digital conversion module 3 with the differential function, and the analog-digital conversion module 3 can realize 1-24 times gain adjustment so as to maximize the neural record signal after matching amplification and filtering and realize digitization.
According to the closed-loop deep brain stimulation artifact suppression system and method, the front end module which can amplify local field potential signals of interest and suppress stimulation artifacts not of interest is arranged after nerve tissues and before digitization, the front end module can record nerve signals with weak amplitude of microvolts under the condition of stimulation artifacts with strong amplitude of several volts, meanwhile, the acquisition analog-digital conversion module cannot be saturated, synchronous acquisition and synchronous stimulation can be realized in the deep brain stimulation process, and the influence of the stimulation artifacts on the nerve signals is effectively suppressed in the simultaneous acquisition and stimulation, so that the local field potential signals are recorded in real time with higher quality;
furthermore, the front-end module adopts a front-end amplifying circuit, a high-pass filter circuit, a low-pass filter circuit and a rear-end amplifying circuit, and configures various levels of circuit specifications according to requirements, so that the difference between the acquired stimulation artifact and the signal of interest is reduced from the original difference of 5-6 orders of magnitude (100 dB-120 dB) to be smaller than 1 order of magnitude (20 dB), thereby supporting closed-loop deep brain stimulation application for realizing real-time synchronous recording and synchronous stimulation, and being capable of reliably recording beta low-frequency and beta high-frequency LFP signals during unipolar or bipolar deep brain stimulation.
It is to be understood that the above description is intended to be illustrative, and not restrictive. Many embodiments and many applications other than the examples provided will be apparent to those of skill in the art upon reading the above description. The scope of the present teachings should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. The disclosures of all articles and references, including patent applications and publications, are incorporated herein by reference for the purpose of completeness. The omission of any aspect of the subject matter disclosed herein in the preceding claims is not intended to forego such subject matter, nor should the applicant be deemed to have such subject matter not considered to be part of the disclosed subject matter.

Claims (3)

1. A closed loop deep brain stimulation artifact suppression system comprising:
the electrode module is contacted with the body surface of the human body to apply electric stimulation and record corresponding nerve signals;
a front-end module that suppresses stimulus artifacts in the neural signal, amplifies a local field potential signal in the neural signal;
the analog-to-digital conversion module is matched with the local field potential signal and realizes digitization;
the input end of the front end module is configured as differential input, the output end of the front end module is configured as differential output, the neural signal is differentially input to the front end module, the filtered and amplified local field potential signal is differentially output to the analog-to-digital conversion module, the front end module comprises a front end amplifying circuit, a high-pass filtering circuit, a low-pass filtering circuit and a rear end amplifying circuit which are sequentially connected, the front end amplifying circuit is connected with the electrode module, the rear end amplifying circuit is connected with the analog-to-digital conversion module, the input end of the rear end amplifying circuit is configured as single-ended input, the output end of the rear end amplifying circuit is configured as differential output, and the rear end amplifying circuit is configured as impedance matching with the low-pass filtering circuit and voltage matching with the analog-to-digital conversion module;
the input end of the front-end amplifying circuit is configured as differential input, the output end of the front-end amplifying circuit is configured as single-ended output, and the gain of the front-end amplifying circuit is configured as 40 dB-60 dB;
the input end of the high-pass filter circuit is configured to be single-ended input, the output end of the high-pass filter circuit is configured to be single-ended output, and the cut-off frequency of the high-pass filter circuit is configured to be 0.05-1 Hz;
the input end of the low-pass filter circuit is configured to be single-ended input, the output end of the low-pass filter circuit is configured to be single-ended output, and the cut-off frequency of the low-pass filter circuit is configured to be 40-48 Hz;
the gain of the back-end amplifying circuit is configured to be 0 dB-20 dB;
the front-end module reduces the difference between the acquired stimulation artifact and the signal of interest from the original difference of 5-6 orders of magnitude to less than 1 order of magnitude, thereby supporting closed-loop deep brain stimulation application for realizing real-time synchronous recording and synchronous stimulation.
2. The closed loop deep brain stimulation artifact suppression system according to claim 1, wherein the voltage of the back-end amplification circuit matches the voltage of the analog-to-digital conversion module.
3. The closed loop deep brain stimulation artifact suppression system according to claim 1, wherein the gain of the analog-to-digital conversion module cooperates with the gain of the back-end amplification circuit to bring the maximum voltage range of the local field potential signal within the acquisition range of the analog-to-digital conversion module.
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