CN113940689A - Closed-loop deep brain stimulation artifact inhibition system and method - Google Patents
Closed-loop deep brain stimulation artifact inhibition system and method Download PDFInfo
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- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/24—Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
- A61B5/316—Modalities, i.e. specific diagnostic methods
- A61B5/369—Electroencephalography [EEG]
- A61B5/377—Electroencephalography [EEG] using evoked responses
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/72—Signal processing specially adapted for physiological signals or for diagnostic purposes
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- A—HUMAN NECESSITIES
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- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/3605—Implantable neurostimulators for stimulating central or peripheral nerve system
Abstract
The invention discloses a closed-loop deep brain stimulation artifact suppression system and a method, wherein the system comprises an electrode module, a data acquisition module and a data processing module, wherein the electrode module is in contact with the body surface of a human body to apply electrical stimulation and record corresponding nerve signals; the front-end module is used for inhibiting stimulation artifacts in the neural signals and amplifying local field potential signals in the neural signals; the analog-to-digital conversion module is used for matching local field potential signals and realizing digitization; the input end of the front-end module is configured to be differential input, the output end of the front-end module is configured to be differential output, the neural signal is differentially input to the front-end module, and the filtered and amplified local field potential signal is differentially output to the analog-to-digital conversion module. The closed-loop deep brain stimulation artifact suppression system and method disclosed by the invention can realize synchronous acquisition and synchronous stimulation in the deep brain stimulation process, and effectively suppress the influence of stimulation artifact on nerve signals in the synchronous acquisition and stimulation, thereby recording local field potential signals in real time with higher quality.
Description
Technical Field
The invention relates to the technical field of brain-computer interfaces and medical electronic circuits, in particular to a closed-loop deep brain stimulation artifact suppression system and a method.
Background
The subthalamic nucleus (STN) of Parkinson's Disease (PD) patients can continuously detect Local Field Potential (LFP) oscillations in the beta band (13-30Hz), and LFP signal intensity is correlated with the severity of the disease and the therapeutic effect. It is crucial for a closed loop neurostimulation system that reliable signal detection can be achieved during stimulation rather than detecting neural signals by stopping stimulation during stimulation.
Observing the LFP signal during stimulation may reveal new neural activity that is not present in the neural tissue in the absence of stimulation. The large difference between the amplitude of the stimulation pulses and the amplitude of the associated neural signals leads to the appearance of stimulation artifacts, which prevent accurate recording of the neural signals and processing of the valid biomarker signals.
More specifically, the normal amplitude of the LFP signal may range from a few microvolts to hundreds of microvolts, while the normal amplitude of the stimulation pulse is a few hundred millivolts to a few volts. It is clear that the magnitude of the LFP is about 5 to 6 orders of magnitude smaller than the magnitude of the stimulation pulse, about 100-120 dB apart. Therefore, designing an LFP stimulation pulse generated artifact suppression front-end circuit that can record weak neural signals (microvolts) in the presence of strong stimulation artifacts (volts) without saturating the acquisition analog-to-digital converter may be the most difficult challenge associated with implementing simultaneous detection and simultaneous stimulation strategies.
Disclosure of Invention
The invention aims to provide a closed-loop deep brain stimulation artifact inhibition system and a closed-loop deep brain stimulation artifact inhibition method, which can realize synchronous acquisition and synchronous stimulation in the deep brain stimulation process, and effectively inhibit the influence of stimulation artifacts on nerve signals in the synchronous acquisition and stimulation, thereby recording local field potential signals in real time with higher quality.
In order to solve the above technical problem, in one aspect, the present invention provides a closed-loop deep brain stimulation artifact suppression system, including:
the electrode module is in contact with the body surface of a human body to apply electrical stimulation and record corresponding nerve signals;
the front-end module is used for inhibiting stimulation artifacts in the neural signals and amplifying local field potential signals in the neural signals;
the analog-to-digital conversion module is used for matching the local field potential signal and realizing digitization;
the input end of the front-end module is configured as differential input, the output end of the front-end module is configured as differential output, the neural signal is differentially input to the front-end module, and the filtered and amplified local field potential signal is differentially output to the analog-to-digital conversion module.
Preferably, the front-end module comprises a front-end amplifying circuit, a high-pass filtering circuit, a low-pass filtering circuit and a rear-end amplifying circuit which are connected in sequence, the front-end amplifying circuit is connected with the electrode module, and the rear-end amplifying circuit is connected with the analog-to-digital conversion module.
Preferably, the input end of the front-end amplification circuit is configured as a differential input, the output end is configured as a single-ended output, and the gain of the front-end amplification circuit is configured to be 40dB to 60 dB.
Preferably, the input end of the high-pass filter circuit is configured as a single-ended input, the output end is configured as a single-ended output, and the cutoff frequency of the high-pass filter circuit is configured to be 0.05-1 Hz.
Preferably, the input end of the low-pass filter circuit is configured as a single-ended input, the output end is configured as a single-ended output, and the cut-off frequency of the low-pass filter circuit is configured as 40-48 Hz.
Preferably, the input end of the back-end amplification circuit is configured as a single-ended input, the output end is configured as a differential output, and the gain of the back-end amplification circuit is configured to be 0dB to 20 dB.
Preferably, the voltage of the back-end amplifying circuit is matched with the voltage of the analog-to-digital conversion module.
Preferably, the gain of the analog-to-digital conversion module is matched with the gain of the rear-end amplification circuit, so that the maximum voltage range of the local field potential signal is within the acquisition range of the analog-to-digital conversion module.
On the other hand, the invention also provides a closed-loop deep brain stimulation artifact inhibition method, which comprises the following steps:
s1: applying electrical stimulation to differentially input neural signals;
s2: inhibiting stimulation artifacts in the neural signals, amplifying local field potential signals in the neural signals;
s3: and matching the amplified local field potential signals and realizing digitization.
Preferably, the step S2 specifically includes:
s2-1: amplifying the neural signal and outputting in a single-ended manner;
s2-2: filtering out low-frequency components in the amplified neural signals, and outputting the high-frequency components in a single-ended mode;
s2-3: filtering out stimulation artifacts in the high-frequency component, and outputting a local field potential signal in a single-ended mode;
s2-4: and amplifying the local field potential signals and outputting the signals in a differential mode.
Compared with the prior art, the invention has the following advantages:
the front-end module capable of amplifying interested local field potential signals and inhibiting uninteresting stimulation artifacts is arranged behind nerve tissues and before digitization, synchronous acquisition and synchronous stimulation can be achieved in the deep brain stimulation process, the influence of the stimulation artifacts on the nerve signals is effectively inhibited in the synchronous acquisition and stimulation, and therefore the local field potential signals are recorded in real time with higher quality;
furthermore, the front-end module adopts a front-end amplifying circuit, a high-pass filtering circuit, a low-pass filtering circuit and a rear-end amplifying circuit, and configures the specifications of each stage of circuits according to requirements, so that the difference between the acquired stimulation artifact and the signal of interest is reduced from 5-6 orders of magnitude (100 dB-120 dB) to less than 1 order of magnitude (20dB), thereby supporting the closed-loop deep brain stimulation application of real-time synchronous recording and synchronous stimulation, and reliably recording beta low-frequency and beta high-frequency LFP signals during unipolar or bipolar deep brain stimulation.
Drawings
The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way. In addition, the shapes, the proportional sizes, and the like of the respective members in the drawings are merely schematic for facilitating the understanding of the present invention, and do not specifically limit the shapes, the proportional sizes, and the like of the respective members of the present invention. Those skilled in the art, having the benefit of the teachings of this invention, may choose from the various possible shapes and proportional sizes to implement the invention as a matter of case. In the drawings:
FIG. 1 is a block diagram of a closed-loop deep brain stimulation artifact suppression system of the present invention;
FIG. 2 is a block diagram of the front end module of the present invention;
FIG. 3 is a schematic diagram of a front-end amplifier circuit according to the present invention;
FIG. 4 is a schematic diagram of a high-pass filter circuit according to the present invention;
FIG. 5 is a schematic diagram of a low-pass filter circuit according to the present invention;
FIG. 6 is a schematic diagram of a back-end amplifier circuit according to the present invention;
FIG. 7 is a flow chart of a method of closed-loop deep brain stimulation artifact suppression of the present invention;
fig. 8 is a detailed flowchart of step S2 in fig. 7.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not denote a single embodiment.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1 and 2, the closed-loop deep brain stimulation artifact suppression system corresponding to a preferred embodiment of the present invention includes an electrode module 1, an analog-to-digital conversion module 3, and a front-end module 2 connected between the electrode module 1 and the analog-to-digital conversion module 3. The electrode module 1 is in contact with the body surface of a human body to apply electrical stimulation, corresponding nerve signals are recorded, stimulation artifacts in the nerve signals are suppressed by the front-end module 2, local field potential signals in the nerve signals are amplified, and the analog-to-digital conversion module 3 is matched with the local field potential signals and achieves digitization. During power-on, the front-end module 2 may be turned on and off using a dial switch.
Specifically, the electrode module 1 is configured as a multi-contact implantation electrode, and for convenience of the following description, the electrode module 1 in the present embodiment is described by taking a 4-stage implantation electrode as an example. The 4-segment implanted electrode comprises a contact 0, a contact 1, a contact 2 and a contact 3, wherein if the contact 1 and the contact 3 are recording ends, the contact 2 is a stimulating end; if the contact 0 and the contact 2 are recording ends, the contact 1 is a stimulating end which is connected with a stimulation output channel to apply electrical stimulation to the body surface of the human body, and the recording end is connected with the input end of the front-end module 2 to record correspondingly generated nerve signals.
As shown in fig. 2, the front-end module 2 includes a front-end amplifier circuit 21, a high-pass filter circuit 22, a low-pass filter circuit 23, and a rear-end amplifier circuit 24, which are connected in sequence.
The input terminal of the front-end amplification circuit 21 is configured as a differential input, and the output terminal is configured as a single-ended output. The nerve signals are differentially input to the front-end amplifier circuit 21, and unipolar stimulation differential recording or bipolar stimulation differential recording may be adopted. When using monopolar stimulation differential recording, one preferred connection is: one input pin of the front-end amplifying circuit 21 is connected with a contact 3/contact 2 of an implanted electrode, the other input pin is connected with a contact 1/contact 0, and a pin of a stimulation output channel is connected with the contact 2/contact 1; when bipolar stimulation differential recording is used, one preferred connection is: one input pin of the front-end amplifying circuit 21 is connected with a contact 3 of an implanted electrode, the other input pin is connected with a contact 0, a pin of a stimulation output channel is connected with a contact 2, and a system ground pin is connected with a contact 1. Whether monopolar or bipolar stimulation, differential input of neural signals can guarantee impedance matching to the maximum extent and common mode artifact noise and differential mode artifact noise are eliminated using differential recording.
Specifically, as shown in fig. 3, the front-end amplification circuit 21 includes an instrumentation amplifier INA1, an adjustable gain resistor Rg1, a ± 5V dc voltage-stabilizing voltage source, and a peripheral capacitor. The instrumentation amplifier INA1 is powered by a ± 5V dc regulated voltage source, and the instrumentation amplifier INA1 preferably uses an AD849 instrumentation amplifier to achieve a low input offset voltage of 10uV and an output noise of 40nV/√ Hz (f ═ 1K) to meet the minimum noise requirement for neural signal recording; further, the amplification factor may be set by the adjustable gain resistor Rg1, and the gain of the whole front-end amplification circuit 21 is configured to be 40dB to 60dB, preferably, the resistance of the adjustable gain resistor Rg1 is generally set to 60.4 Ω or 6.04 Ω, and the gain is correspondingly set to 40dB or 60dB, respectively.
The nerve signal is input to the front end amplifying circuit 21 in a differential input mode, the nerve signal comprises a weak local field potential signal in the brain and a stimulation signal which generates a strong stimulation artifact signal, after the nerve signal is amplified by the front end amplifying circuit 21, a 100uVpp level local field potential signal passes through and is amplified to be 10 mVpp-100 mVpp, the maximum 10mV level stimulation artifact signal is amplified to be 1 Vpp-10 Vpp at most, the amplified nerve signal comprises most stimulation artifact signals and harmonic frequency components thereof, and the stimulation artifact and the local field potential signal are amplified together and then are output to the next level high pass filter circuit 22 in a single-ended mode.
The input terminal of the high-pass filter circuit 22 is matched with the output terminal of the front-end amplifier circuit 21, and the input terminal is configured as a single-ended input, and the output terminal is configured as a single-ended output. The high-pass filter circuit 22 preferably adopts an active high-pass filter circuit, can better reduce input and output noise, thereby reducing total noise, and has a simple structure, steep reduction at a cut-off frequency and good filtering effect. In this embodiment, according to the overall requirements and implementation effects, the cut-off frequency of the high-pass filter circuit 22 is configured to be 0.05 to 1Hz, so as to filter out baseline drift and low-frequency dc components well, and the cut-off frequency is preferably configured to be 0.5 Hz.
Specifically, as shown in fig. 4, the high-pass filter circuit 22 is preferably designed with-3 dB passband ripple, a cutoff frequency of 0.5Hz, a stop band frequency of 0.1Hz, attenuation of-100 dB, and a three-stage 6-stage Butterworth-type circuit is obtained according to a 2-stage salen-key structure. The 2-stage high-pass filter circuit of each stage has the same structure (fig. 4 shows a specific structure of one stage), the first-stage 2-stage high-pass filter circuit includes a capacitor Ch1, a resistor Rh1, a capacitor Ch2, a resistor Rh2, an operational amplifier Oph1 and a ± 5V dc power supply, the operational amplifier Oph1 is powered by ± 5V, the output terminal of the instrumentation amplifier INA1 is connected to the P terminal of the operational amplifier Oph1 through the capacitor Ch1 and the capacitor Ch2 in sequence, one end of the resistor Rh1 is connected between the capacitor Ch1 and the capacitor Ch2, the other end is connected to the N terminal of the operational amplifier Oph1, one end of the resistor Rh2 is connected between the P terminals of the capacitor Ch2 and the operational amplifier Oph1, and the other end is grounded. Furthermore, the second-stage 2-order high-pass filter circuit comprises a capacitor Ch3, a resistor Rh3, a capacitor Ch4, a resistor Rh4, an operational amplifier Oph2 and a +/-5V direct-current power supply; the third-stage 2-order high-pass filter circuit comprises a capacitor Ch5, a resistor Rh5, a capacitor Ch6, a resistor Rh6, an operational amplifier Oph3 and a +/-5V direct-current power supply, wherein the first stage and the second stage are preferably completed by using a low-noise low-offset-voltage dual operational amplifier ADA4522-2, and the third stage is completed by using a low-noise low-offset-voltage single operational amplifier ADA 4522-1. The high pass filter circuit 22 is thus set to filter output noise less than 1.1 uVpp.
In order to reduce noise, the high-pass filter circuit 22 does not introduce a resistance amplification factor, and the amplification factor is configured to be 1. The amplified neural signals are subjected to high-pass filtering, baseline drift and low-frequency direct-current components are filtered, at the moment, stimulation artifact signals and harmonic components thereof are attenuated to be approximately 10Vpp level, local field potential signals are also attenuated to be still 100mVpp level, and various high-frequency components of the mixed signals are output to the low-pass filter circuit 23 of the next level in a single-ended mode.
The input terminal of the low-pass filter circuit 23 is matched with the output terminal of the high-pass filter circuit 22, and the input terminal is configured as a single-ended input and the output terminal is configured as a single-ended output. The low-pass filter circuit 23 preferably adopts an active low-pass filter circuit, can better reduce input and output noise, thereby reducing total noise, and has a simple structure, steep reduction at a cut-off frequency and good filtering effect. In the embodiment, according to the overall requirement and the implementation effect, the cut-off frequency of the low-pass filter circuit 23 is configured to be 40-48 Hz, so that the stimulation artifacts can be well filtered, the local field potential signals are retained, and the cut-off frequency is preferably configured to be 45 Hz.
Specifically, as shown in fig. 5, the low-pass filter circuit 23 is preferably designed with-3 dB passband ripple, a cut-off frequency of 45Hz, a stop band frequency of 125Hz, and a five-stage 10-stage Butterworth-type circuit is obtained according to a 2-stage salen-key structure. The 2 nd order low-pass filter circuit of each stage has the same structure (fig. 5 shows a specific structure of one stage), the first 2 nd order low-pass filter circuit includes a capacitor Cl1, a resistor Rl1, a capacitor Cl2, a resistor Rl2, an operational amplifier Opl1 and a ± 5V dc power supply, the operational amplifier Opl1 is powered by ± 5V, an output end of the high-pass filter circuit is connected to a P end of the operational amplifier Opl1 through a resistor Rl1 and a resistor Rl2 in sequence, one end of the capacitor Cl1 is connected between the resistor Rl1 and the resistor Rl2, the other end of the capacitor Cl1 is connected to an N end of the operational amplifier Opl1, one end of the capacitor Cl2 is connected between the resistor Rl2 and the P end of the operational amplifier Opl1, and the other end of the capacitor Cl2 is grounded. Furthermore, the second-stage 2-order low-pass filter circuit comprises a capacitor Cl3, a resistor Rl3, a capacitor Cl4, a resistor Rl4, an operational amplifier Opl2 and a +/-5V direct-current power supply; the third-stage 2-order low-pass filter circuit comprises a capacitor Cl5, a resistor Rl5, a capacitor Cl6, a resistor Rl6, an operational amplifier Opl3 and a +/-5V direct-current power supply; the fourth-stage 2-order low-pass filter circuit comprises a capacitor Cl7, a resistor Rl7, a capacitor Cl8, a resistor Rl8, an operational amplifier Opl4 and a +/-5V direct-current power supply; the fifth stage 2 nd order low pass filter circuit comprises a capacitor Cl9, a resistor Rl9, a capacitor Cl10, a resistor Rl10, an operational amplifier Opl5 and a +/-2.5V power supply direct current power supply. The first stage, the second stage, the third stage and the fourth stage are preferably completed by adopting a low-noise low-offset-voltage dual operational amplifier ADA4522-2, and the fifth stage is completed by adopting a low-noise low-offset-voltage single operational amplifier ADA 4522-1. The low-pass filter circuit 23 is thus provided, whose filter output noise is less than 1.6 uVpp.
Similarly, in order to reduce noise, the low-pass filter circuit does not introduce a resistance amplification factor, and the amplification factor is configured to be 1. After the stimulation artifact frequency components and harmonic signals thereof in the high-frequency components of the mixed signals are subjected to low-pass filtering, the stimulation artifact frequency components and the harmonic signals thereof are greatly attenuated by about-100 dB and are suppressed from a 10Vpp level to a 100uVpp level, while the local field potential signals are only slightly attenuated by about-3 dB and still reach a 100mVpp level, the stimulation artifact signals are suppressed, useful local field potential signals are left, and cleaner local field potential signals are output to the next-stage rear-end amplifying circuit 24 in a single-end mode.
The input end of the back-end amplifying circuit 24 is matched with the output end of the low-pass filter circuit 23, and the output end is matched with the input end of the analog-to-digital conversion module 3, so that the input end of the back-end amplifying circuit 24 is configured as a single-ended input, and the output end is configured as a differential output.
Specifically, as shown in fig. 6, the back-end amplifying circuit 24 includes a resistor Rb1, an adjustable gain resistor Rf1, a resistor Rb2, an adjustable gain resistor Rf2, a matching resistor Rt, a fully differential amplifier INA2, an output reference capacitor Cc, an output differential capacitor Cd, ± 2.5V dc regulated voltage source, and a decoupling capacitor. The fully differential amplifier INA2 adopts the fully differential amplifier HP210 to realize a low input offset voltage of 10uV and an output noise of 9nV/√ Hz (f ═ 1k) to meet the minimum noise requirement of neural signal recording; furthermore, the amplification factor can be set through the adjustable gain resistor Rf1 and the adjustable gain resistor Rf2, the gain of the whole rear-end amplification circuit 24 is configured to be 0dB to 20dB, and the gain of the rear-end amplification circuit 24 and the gain of the front-end amplification circuit 21 are matched to realize 40dB to 80dB total gain. In order to filter noise better and suppress stimulation artifacts to the maximum extent, preferably, the resistances of the adjustable gain resistor Rf1, the adjustable gain resistor Rf2, the resistor Rb1 and the resistor Rb2 are all set to 215 Ω, and at this time, the gain of 0dB is correspondingly realized; or, the resistance values of the adjustable gain resistor Rf1 and the adjustable gain resistor Rf2 are set to 1000 Ω, and the resistance values of the resistor Rb1 and the resistor Rb2 are set to 100 Ω, at this time, the gain of 20dB is correspondingly realized.
The output terminal of the low-pass filter circuit 23 is connected to the P input terminal of the fully-differential amplifier INA2 through a resistor Rb1, and the N input terminal of the fully-differential amplifier INA2 is grounded through a resistor Rb2, so that the single-ended input of the fully-differential amplifier INA2 is realized. A Voc pin of the fully differential amplifier INA2 can be provided with a default output end intermediate power supply reference, and an output reference capacitor Cc is added to the Voc pin to reduce other high output noise of internal high impedance bias; an output differential capacitor Cd is added between a P output end and an N output end of the fully differential amplifier INA2 to filter out high-frequency components and enter a subsequent analog-to-digital converter; because the output end of the rear-end amplifying circuit 24 is configured as differential output, a matching resistor Rt needs to be added at the input end of the rear-end amplifying circuit 24, impedance matching related to actual gain is done by selecting a proper matching resistor Rt, and if the signal has a topping condition or excessive attenuation, mismatching is indicated to result in incorrect gain setting; unlike the previous circuits, the voltage of the fully differential amplifier INA2 needs to be matched to the voltage of the analog-to-digital conversion block 3, in particular to the maximum voltage input range of the analog-to-digital conversion block 3, to prevent the analog-to-digital converter from saturating. Specifically, the full-differential amplifier INA2 is preferably powered by ± 2.5V, and the maximum output voltage of the back-end amplification circuit 24 is determined to be-5 Vpp, so that after a signal passes through the back-end amplification circuit 24, the amplification factor is generally set to be 0 dB-20 dB, and the maximum amplification factor is 20dB, when the amplification factor is set to be higher than 0dB, the peak-to-peak amplitude of the signal needs to be considered in cooperation with the gain of the analog-to-digital conversion module 3, and the peak-to-peak amplitude of the signal cannot exceed the maximum voltage range borne by the analog-to-digital conversion module 3.
After the local field potential signal is amplified by the back-end amplifying circuit 24, the maximum output amplitude is 1000mVpp level, the single-ended signal is converted into a differential signal, and then the differential signal is filtered by an output differential capacitor Cd and output to the next level analog-to-digital conversion module 3.
The analog-to-digital conversion module 3 adopts +/-2.5V power supply, and the maximum output voltage is determined to be-5 Vpp by the power supply voltage, so that the voltage amplitude of the signal amplified by the analog-to-digital conversion module 3 is not larger than 5 Vpp. Before the signal enters the analog-to-digital conversion module 3 for sampling, the gain of the ADC needs to be set, the maximum voltage range of the signal is ensured to be within the acquisition range of the analog-to-digital conversion module 3, and the analog-to-digital conversion module 3 is prevented from being saturated. If the amplification factor of the front-stage circuit (i.e. the rear-end amplification circuit) is set to 0dB, the output local field potential signal is still at the level of-100 mVpp, and the amplification factor of the rear-stage analog-to-digital conversion module 3 can be selected arbitrarily; if the amplification factor of the previous stage circuit (i.e. the rear-end amplification circuit) is set to 20dB, the maximum amplitude of the output local field potential signal is at the level of 1000mVpp, the amplification factor of the next stage analog-to-digital conversion module 3 itself must be set to be less than 5 times, and the maximum output signal voltage is kept to be less than 5 Vpp.
After the gain of the analog-to-digital conversion module 3 is configured, the analog-to-digital conversion module 3 acquires a local field potential signal which greatly inhibits the stimulation artifact signal.
As with the system architecture set forth above, the closed-loop deep brain stimulation artifact suppression system of the present application generally exhibits a fully differential low noise structure of differential inputs and differential outputs. Because the nerve signal is differentially input, the analog-to-digital conversion module 3 is also designed to be differentially input, and the structure of the filter circuit is single-ended input and single-ended output, if the filter circuit with interference removal is used in front of the analog-to- digital conversion module 3, 2 complete filter circuits are added on the N line and the P line. Due to the design, on one hand, two circuits cannot be completely consistent, and on the other hand, more chips are required to be used, power consumption is increased, and occupied space is occupied. In the closed-loop deep brain stimulation artifact suppression system, only 1 circuit is needed for one channel, the problem of inconsistency of N lines and P lines is not considered, and half of the number of chips can be saved when multiple channels are needed, so that power consumption is reduced, and space is saved.
As shown in fig. 7 and 8, the present invention also proposes a closed-loop deep brain stimulation artifact suppression method, including:
s1: applying electrical stimulation to differentially input neural signals;
s2: inhibiting stimulation artifacts in the neural signals and amplifying local field potential signals in the neural signals;
the method specifically comprises the following steps:
s2-1: amplifying the neural signal and outputting in a single-ended manner;
amplifying the nerve signals input in a differential mode by 40 dB-60 dB, and outputting a single-ended signal V1 in a single-ended mode;
s2-2: filtering out low-frequency components in the amplified neural signals, and outputting the high-frequency components in a single-ended mode;
the single-ended signal V1 passes through a 6-order active high-pass filter circuit with the cutoff frequency of 0.5Hz and the gain of 1, so that baseline drift and low-frequency direct-current components are filtered, and high-frequency components are reserved to output the single-ended signal V2 in a single-ended mode.
S2-3: filtering out stimulation artifacts in the high-frequency component, and outputting a local field potential signal in a single-ended mode;
the single-ended signal V2 passes through a 10-order active low-pass filter circuit with the cut-off frequency of 45Hz and the gain of 1, the frequency component of the stimulation artifact in the high-frequency component and the harmonic signals thereof are greatly attenuated, useful local field potential signals are left, and the single-ended signal V3 is output in a single-ended mode.
S2-4: amplifying the local field potential signals and outputting the signals in a differential mode;
the single-ended signal V3 is connected to the input end of the rear-end amplifying circuit in a single-ended mode, the matching resistor Rt of the fully differential amplifier INA2 is reasonably configured to realize the impedance matching of the signal source, the single-ended signal V3 realizes the amplification of 0 dB-20 dB, and two paths of differential signals VoutP and VoutN are output in a differential mode.
S3: and matching the amplified local field potential signals and realizing digitization.
The differential signal V4 is directly connected to the input end of the analog-to-digital conversion module 3 with the differential function, and the analog-to-digital conversion module 3 can realize 1-24 times of gain adjustment, so that the amplified and filtered neural recording signal is maximally matched and digitized.
The closed-loop deep brain stimulation artifact suppression system and the closed-loop deep brain stimulation artifact suppression method have the advantages that the front-end module capable of amplifying interested local field potential signals and suppressing uninteresting stimulation artifacts is arranged behind nerve tissues and before digitization, the front-end module can record microvolt weak-amplitude nerve signals under the condition of stimulating artifacts with strong amplitude of several volts, meanwhile, the acquisition analog-to-digital conversion module is not saturated, synchronous acquisition and synchronous stimulation can be realized in the deep brain stimulation process, the influence of the stimulation artifacts on the nerve signals is effectively suppressed in the synchronous acquisition and stimulation, and therefore the local field potential signals are recorded in real time with higher quality;
furthermore, the front-end module adopts a front-end amplifying circuit, a high-pass filtering circuit, a low-pass filtering circuit and a rear-end amplifying circuit, and configures the specifications of each stage of circuits according to requirements, so that the difference between the acquired stimulation artifact and the signal of interest is reduced from 5-6 orders of magnitude (100 dB-120 dB) to less than 1 order of magnitude (20dB), thereby supporting the closed-loop deep brain stimulation application of real-time synchronous recording and synchronous stimulation, and reliably recording beta low-frequency and beta high-frequency LFP signals during unipolar or bipolar deep brain stimulation.
It is to be understood that the above description is intended to be illustrative, and not restrictive. Many embodiments and many applications other than the examples provided would be apparent to those of skill in the art upon reading the above description. The scope of the present teachings should, therefore, be determined not with reference to the above description, but should instead be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. The disclosures of all articles and references, including patent applications and publications, are hereby incorporated by reference for all purposes. The omission in the foregoing claims of any aspect of subject matter that is disclosed herein is not intended to forego such subject matter, nor should the applicant consider that such subject matter is not considered part of the disclosed subject matter.
Claims (10)
1. A closed-loop deep brain stimulation artifact suppression system, comprising:
the electrode module is in contact with the body surface of a human body to apply electrical stimulation and record corresponding nerve signals;
the front-end module is used for inhibiting stimulation artifacts in the neural signals and amplifying local field potential signals in the neural signals;
the analog-to-digital conversion module is used for matching the local field potential signal and realizing digitization;
the input end of the front-end module is configured as differential input, the output end of the front-end module is configured as differential output, the neural signal is differentially input to the front-end module, and the filtered and amplified local field potential signal is differentially output to the analog-to-digital conversion module.
2. The closed-loop deep brain stimulation artifact suppression system according to claim 1, wherein the front-end module comprises a front-end amplification circuit, a high-pass filtering circuit, a low-pass filtering circuit and a back-end amplification circuit which are connected in sequence, the front-end amplification circuit is connected with the electrode module, and the back-end amplification circuit is connected with the analog-to-digital conversion module.
3. The closed-loop deep brain stimulation artifact suppression system according to claim 2, wherein the input end of the front-end amplification circuit is configured as a differential input and the output end is configured as a single-ended output, and the gain of the front-end amplification circuit is configured to be 40dB to 60 dB.
4. The closed-loop deep brain stimulation artifact suppression system according to claim 2, wherein an input end of the high-pass filter circuit is configured as a single-ended input, an output end of the high-pass filter circuit is configured as a single-ended output, and a cutoff frequency of the high-pass filter circuit is configured to be 0.05-1 Hz.
5. The closed-loop deep brain stimulation artifact suppression system according to claim 2, wherein the input end of the low-pass filter circuit is configured as a single-ended input, the output end of the low-pass filter circuit is configured as a single-ended output, and the cut-off frequency of the low-pass filter circuit is configured to be 40-48 Hz.
6. The closed-loop deep brain stimulation artifact suppression system according to claim 2, wherein an input end of the back-end amplification circuit is configured as a single-ended input, an output end is configured as a differential output, and a gain of the back-end amplification circuit is configured to be 0dB to 20 dB.
7. The closed-loop deep brain stimulation artifact suppression system according to claim 6, wherein a voltage of the back-end amplification circuit matches a voltage of the analog-to-digital conversion module.
8. The closed-loop deep brain stimulation artifact suppression system according to claim 6, wherein a gain of the analog-to-digital conversion module cooperates with a gain of the back-end amplification circuit to cause a maximum voltage range of the local field potential signal to be within an acquisition range of the analog-to-digital conversion module.
9. A closed-loop deep brain stimulation artifact suppression method, comprising:
s1: applying electrical stimulation to differentially input neural signals;
s2: inhibiting stimulation artifacts in the neural signals, amplifying local field potential signals in the neural signals;
s3: and matching the amplified local field potential signals and realizing digitization.
10. The closed-loop deep brain stimulation artifact suppression method according to claim 9, characterized in that said step S2 specifically includes:
s2-1: amplifying the neural signal and outputting in a single-ended manner;
s2-2: filtering out low-frequency components in the amplified neural signals, and outputting the high-frequency components in a single-ended mode;
s2-3: filtering out stimulation artifacts in the high-frequency component, and outputting a local field potential signal in a single-ended mode;
s2-4: and amplifying the local field potential signals and outputting the signals in a differential mode.
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