CN113937743A - Impulse current suppression circuit - Google Patents

Impulse current suppression circuit Download PDF

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Publication number
CN113937743A
CN113937743A CN202111210526.9A CN202111210526A CN113937743A CN 113937743 A CN113937743 A CN 113937743A CN 202111210526 A CN202111210526 A CN 202111210526A CN 113937743 A CN113937743 A CN 113937743A
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China
Prior art keywords
module
power supply
output
electrically connected
input end
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CN202111210526.9A
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Chinese (zh)
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CN113937743B (en
Inventor
刘少彬
植万湖
何伟峰
陈朝飞
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Shenzhen Yingheng Electronics Co ltd
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Shenzhen Yingheng Electronics Co ltd
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Priority to CN202111210526.9A priority Critical patent/CN113937743B/en
Priority claimed from CN202111210526.9A external-priority patent/CN113937743B/en
Publication of CN113937743A publication Critical patent/CN113937743A/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/005—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection avoiding undesired transient conditions

Abstract

The invention discloses an impulse current suppression circuit. The rush current suppression circuit includes: the switch module, current limiting module and switch control module. The switch module is used for responding to the signal of the control end of the switch module to be switched on or switched off; the input end of the current limiting module is electrically connected with the first end of the power supply, and the output end of the current limiting module is electrically connected with the second end of the switch module; a first input end of the switch control module is connected with a delay power supply signal, a second input end of the switch control module is electrically connected with an output end of the current limiting module, a third input end of the switch control module is electrically connected with a second end of the power supply, and an output end of the switch control module is electrically connected with a control end of the switch module; the equivalent impedance of the switch module when the switch module is conducted is smaller than that of the current limiting module; and in the preset time after the power supply is powered on, the delay power supply signal does not reach the preset voltage, and the switch control module responds to the delay power supply signal to control the switch module to be switched off, so that the power supply supplies power to the rear-stage circuit through the current limiting module. The invention can effectively restrain the impact current generated when the power supply is electrified.

Description

Impulse current suppression circuit
Technical Field
The embodiment of the invention relates to the technical field of circuits, in particular to an impact current suppression circuit.
Background
At present, low voltage electricity of electric equipment such as vehicle-mounted products is usually supplied by external power supplies such as batteries, and when the power supplies are electrified, impact current is inevitably generated at the moment of starting the products; due to reasons such as internal resistance of a power supply and the like, the larger impact current can cause the drop of the power supply voltage and influence the normal work of the product. Therefore, how to effectively suppress the inrush current when the product is started is a problem to be solved by those skilled in the art.
Disclosure of Invention
The embodiment of the invention provides an impact current suppression circuit, which is used for effectively suppressing impact current generated when a power supply is electrified.
The embodiment of the invention provides an impact current suppression circuit. The rush current suppression circuit includes:
the switch module comprises a control end, a first end and a second end; the first end of the switch module is electrically connected with the first end of the power supply, and the second end of the switch module is electrically connected with the rear-stage circuit; the switch module is used for responding to the signal of the control end of the switch module to be switched on or switched off;
the current limiting module comprises an input end and an output end; the input end of the current limiting module is electrically connected with the first end of the power supply, and the output end of the current limiting module is electrically connected with the second end of the switch module;
the switch control module comprises a first input end, a second input end, a third input end and an output end; a first input end of the switch control module is connected with a time-delay power supply signal, a second input end of the switch control module is electrically connected with an output end of the current limiting module, a third input end of the switch control module is electrically connected with a second end of the power supply, and an output end of the switch control module is electrically connected with a control end of the switch module;
the equivalent impedance of the switch module when the switch module is conducted is smaller than that of the current limiting module; and in the preset time after the power supply is powered on, the delay power supply signal does not reach the preset voltage, and the switch control module is used for responding to the delay power supply signal to control the switch module to be switched off so that the power supply supplies power to the rear-stage circuit through the current limiting module.
Optionally, the inrush current suppression circuit further includes: the power supply conversion module comprises an input end and an output end; the input end of the power supply conversion module is electrically connected with the first end of the power supply, and the output end of the power supply conversion module is electrically connected with the first input end of the switch control module; the power supply conversion module is used for converting the power supply signal output by the power supply into the delay power supply signal.
Optionally, the switch module comprises: a first transistor; the control electrode of the first transistor is used as the control end of the switch module, the first electrode of the first transistor is used as the first end of the switch module, and the second electrode of the first transistor is used as the second end of the switch module.
Optionally, the current limiting module comprises: a current limiting resistor; and the first end of the current limiting resistor is used as the first end of the current limiting module, and the second end of the current limiting resistor is used as the second end of the current limiting module.
Optionally, the current limiting module further comprises: a diode; the first pole of the diode is used as the first end of the current limiting module, and the second pole of the diode is electrically connected with the first end of the current limiting resistor.
Optionally, the switch control module comprises:
the voltage setting unit comprises a first input end, a second input end and an output end; a first input end of the voltage setting unit is connected to the time-delay power supply signal, and a second input end of the voltage setting unit is electrically connected with a second end of the power supply; the voltage setting unit is used for setting the preset voltage;
the control unit comprises a first input end, a second input end, a third input end and an output end; a first input end of the control unit is electrically connected with an output end of the voltage setting unit, a second input end of the control unit is electrically connected with an output end of the current limiting module, and a third input end of the control unit is electrically connected with a second end of the power supply; the control unit is used for controlling the control unit to output a signal of a first end of the power supply or a signal of a second end of the power supply according to the output signal of the voltage setting unit;
a first output unit including a first input terminal, a second input terminal, and an output terminal; a first input end of the first output unit is electrically connected with an output end of the control unit, a second input end of the first output unit is electrically connected with a second end of the power supply, and an output end of the first output unit is electrically connected with a control end of the switch module; the first output unit is used for being conducted when the control unit outputs a signal of a first end of the power supply and outputting a signal of a second end of the power supply;
a second output unit including an input terminal and an output terminal; the input end of the second output unit is connected to the delayed power supply signal, and the output end of the second output unit is electrically connected with the control end of the switch module; the second output unit is used for outputting the delay power supply signal.
Optionally, the voltage setting unit includes: a first zener diode and a first resistor; a first pole of the first voltage stabilizing diode is used as a first input end of the voltage setting unit; a second pole of the first voltage stabilizing diode is electrically connected with a first end of the first resistor and is used as an output end of the voltage setting unit; a second end of the first resistor is used as a second input end of the voltage setting unit;
alternatively, the voltage setting unit includes: the second voltage stabilizing diode, the second resistor and the third resistor; a first end of the second resistor is used as a first input end of the voltage setting unit; a second end of the second resistor is electrically connected with a first electrode of the second voltage stabilizing diode and is used as an output end of the voltage setting unit; a second pole of the second zener diode is electrically connected to the first end of the third resistor; and a second end of the third resistor is used as a second input end of the voltage setting unit.
Optionally, the control unit comprises: a second transistor and a fourth resistor; a control electrode of the second transistor is used as a first input end of the control unit; a first pole of the second transistor is electrically connected with a second end of the fourth resistor and is used as an output end of the control unit; a second pole of the second transistor is used as a third input end of the control unit; and a first end of the fourth resistor is used as a second input end of the control unit.
Optionally, the first output unit includes: a third transistor; a control electrode of the third transistor is used as a first input terminal of the first output unit, a first electrode of the third transistor is used as an output terminal of the first output unit, and a second electrode of the third transistor is used as a second input terminal of the first output unit.
Optionally, the second output unit includes: a fifth resistor; a first end of the fifth resistor is used as an input end of the second output unit, and a second end of the fifth resistor is used as an output end of the second output unit.
The impulse current suppression circuit provided by the embodiment of the invention is provided with a switch module, a current limiting module and a switch control module; the following process can be implemented: in the preset time after the power supply is powered on, the delay power supply signal does not reach the preset voltage, and the switch control module controls the switch module to be reliably switched off, so that the power supply signal provided by the power supply can only be transmitted through the current limiting module with higher impedance, and the influence of impulse current is effectively reduced; after the delay power supply signal reaches the preset voltage, the switch control module controls the switch module to be conducted, so that the power supply signal is transmitted through the switch module with smaller impedance, and the power consumption is effectively reduced. Therefore, compared with the prior art, the embodiment of the invention can effectively inhibit the impact current generated when the power supply is electrified.
Drawings
Fig. 1 is a schematic structural diagram of an inrush current suppression circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another inrush current suppression circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a surge current suppression circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a surge current suppression circuit according to an embodiment of the present invention;
fig. 5 is a comparison diagram of simulation results with and without a rush current suppression circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
The embodiment of the invention provides an impact current suppression circuit. Fig. 1 is a schematic structural diagram of an inrush current suppression circuit according to an embodiment of the present invention. Referring to fig. 1, the inrush current suppression circuit includes: a switch module 310, a current limit module 320, and a switch control module 330.
The switch module 310 includes a control terminal 33, a first terminal 31, and a second terminal 32; the first terminal 31 of the switch module 310 is electrically connected to the first terminal 11 of the power supply 10, and the second terminal 32 is electrically connected to the post-stage circuit 20; the switch module 310 is used for switching on or off in response to a signal of the control terminal 33. Current limiting module 320 includes an input 34 and an output 35; the input terminal 34 of the current limiting module 320 is electrically connected to the first terminal 11 of the power supply 10, and the output terminal 35 is electrically connected to the second terminal 32 of the switching module 310. The switch control module 330 includes a first input 36, a second input 37, a third input 38, and an output 39; the first input terminal 36 of the switch control module 330 is connected to the delayed power signal Vd, the second input terminal 37 is electrically connected to the output terminal 35 of the current limiting module 320, the third input terminal 38 is electrically connected to the second terminal 12 of the power supply 10, and the output terminal 39 is electrically connected to the control terminal 33 of the switch module 310.
Wherein, the equivalent impedance of the switch module 310 when turned on is smaller than the equivalent impedance of the current limiting module 320; within a preset time after the power supply 10 is powered on, the delayed power signal Vd does not reach a preset voltage, and the switch control module 310 is configured to respond to the delayed power signal Vd to control the switch module 310 to be turned off, so that the power supply 10 supplies power to the subsequent circuit 20 through the current limiting module 320.
For example, the inrush current suppression circuit may be applied to a motor controller of a new energy vehicle, and the power supply 10 may be a dc power supply provided by the outside such as a battery; the second terminal of the power supply 10 may be a ground terminal thereof, and is connected to a ground signal; the subsequent stage circuit 20 may be an electric load in an automobile. The switching module 310 may be formed of a switching device such as a transistor or a relay. The time delay power supply signal Vd is a voltage signal which changes along with time; for example, a voltage signal that continuously increases to a peak value with time, or a voltage signal with a stepped waveform, etc., as long as the preset voltage is not reached within a preset time after the power supply 10 is powered on.
Illustratively, the operation process of the inrush current suppression circuit comprises the following steps:
within a preset time after the power supply 10 is powered on, the delayed power supply signal Vd does not reach a preset voltage. In this period, it can be considered that a large inrush current is likely to be generated when the electric equipment such as an automobile is started and the power supply 10 is just connected. At this time, the power signal output by the first terminal 11 of the power supply 10 may be transmitted through the switch module 310 or the current limiting module 320; the initial state of the switch module 310 is preferably set to an off state to ensure power supply stability. Whether the delayed power signal Vd does not reach the preset voltage so that the conduction of the path between the third input terminal 38 and the output terminal 39 of the switch control module 330 is controlled by the power signal transmitted to the second input terminal 37 of the switch control module 330; at this time, the power signal controls the conduction between the third input end 38 and the output end 39 of the switch control module 330; a signal (ground signal) output by the second end 12 of the power supply 10 is transmitted to the control end of the switch module 33 through the switch control module 330, so as to control the switch module 330 to be turned off, or maintain the switch module 330 in an off state; therefore, the power supply 10 can only supply power to the post-stage circuit 20 through the current limiting module 320 with relatively large equivalent impedance within the preset time, and the impact current can be effectively suppressed.
And after the preset time is reached, the delayed power supply signal Vd reaches a preset voltage. In this period, it can be considered that the operation of the electric equipment such as the automobile and the like is already normal. At this time, the delayed power signal Vd controls the path between the third input terminal 38 and the output terminal 39 of the switch control module 330 to be disconnected; the delayed power signal Vd is transmitted to the control terminal 33 of the switch module 310 through the output terminal 39 of the switch control module 330, and the switch module 310 is controlled to be turned on; because the equivalent impedance of the switch module 310 when turned on is smaller than the equivalent impedance of the current limiting module 320, the power supply 10 supplies power to the back-stage circuit 20 through the switch module 310; to reduce power consumption when the device is operating normally.
The preset voltage may be understood as a critical value that the delayed power signal Vd can control the switch control module 330 to switch from on to off between the third input terminal 38 and the output terminal 39. Alternatively, inside the switch control module 330, there may be a conducting path between the first input terminal 36 and the output terminal 39; in the preset time after the power supply 10 is powered on, the delay power signal Vd is idle or does not reach the preset voltage, and the switch module 310 cannot be turned on, so that the function of the inrush current suppression circuit is not affected by the arrangement. Moreover, when the delayed power signal Vd does not reach the preset voltage, the power signal controls the third input terminal 38 and the output terminal 39 of the switch control module 330 to be turned on, so that the signal of the second terminal 12 of the power supply 10 can be stably transmitted to the control terminal 33 of the switch module 310, thereby ensuring that the switch module 310 is always kept in the off state within the preset time, and ensuring the reliability of the inrush current suppression circuit.
The impulse current suppression circuit provided by the embodiment of the invention is provided with a switch module 310, a current limiting module 320 and a switch control module 330; the following process can be implemented: in the preset time after the power supply 10 is powered on, the delayed power signal Vd does not reach the preset voltage, and the switch control module 330 controls the switch module 310 to be reliably turned off, so that the power signal provided by the power supply 10 can only be transmitted through the current limiting module 320 with higher impedance, thereby effectively reducing the impact current; after the delayed power signal Vd reaches the preset voltage, the switch control module 330 controls the switch module 310 to be turned on, so that the power signal is transmitted through the switch module 310 with smaller impedance, thereby effectively reducing power consumption. Therefore, the embodiment of the invention can effectively suppress the impact current generated when the power supply 10 is powered on.
Fig. 2 is a schematic structural diagram of another inrush current suppression circuit according to an embodiment of the present invention. On the basis of the foregoing embodiments with reference to fig. 2, optionally, the inrush current suppression circuit further includes: a power conversion module 340. The input end of the power conversion module 340 is electrically connected to the first end of the power supply 10, and the output end of the power conversion module 340 is electrically connected to the first input end of the switch control module 330; the power conversion module 340 is configured to convert a power signal output by the power supply 10 into a delayed power signal.
By the arrangement, the delay power supply signal is converted from the power supply signal output by the power supply 10, and the delay power supply signal does not need to be additionally arranged, so that the universality of the impact current suppression circuit is improved.
On the basis of the foregoing embodiments, optionally, the power conversion module 340 is an original conversion module in a control device such as an automobile motor controller that applies an inrush current suppression circuit, where only an output signal of the conversion module is used as a delayed power signal; accordingly, the preset time may be set in a period in which the power conversion module 340 has not converted the power signal into the supply voltage of other functional components of the control device connected to the conversion module. With this arrangement, the structure of the inrush current suppression circuit can be simplified by using the original structure in the control device.
With continued reference to fig. 2, based on the above embodiments, optionally, the switch control module 330 includes: a voltage setting unit 331, a control unit 332, a first output unit 333, and a second output unit 334. A first input end of the voltage setting unit 331 is connected to the delayed power signal, and a second input end is electrically connected to a second end of the power supply 10; the voltage setting unit 331 is used to set a preset voltage. The preset voltage may be understood as a value that the delayed power signal should reach when the voltage setting unit 331 outputs the start-up voltage between the third input terminal and the output terminal of the control unit 332. A first input end of the control unit 332 is electrically connected to an output end of the voltage setting unit 331, a second input end is electrically connected to an output end of the current limiting module 320, and a third input end is electrically connected to a second end of the power supply 10; the control unit 332 is configured to control the control unit 332 to output a signal (power signal) at a first end of the power supply 10 or a signal (ground signal) at a second end of the power supply 10 according to the output signal of the voltage setting unit 331. A first input end of the first output unit 333 is electrically connected to an output end of the control unit 332, a second input end is electrically connected to a second end of the power supply 10, and an output end is electrically connected to a control end of the switch module 310; the first output unit 333 is turned on when the control unit 332 outputs a signal of the first terminal of the power supply 10, and outputs a signal of the second terminal of the power supply 10. The input end of the second output unit 334 is connected to the delayed power signal, and the output end is electrically connected to the control end of the switch module 310; the second output unit 334 is used for outputting a delayed power supply signal.
Illustratively, the operation of the switch control module 330 includes:
when the delayed power signal does not reach the preset voltage, the output signal of the voltage setting unit 331 controls the path between the third input terminal and the output terminal of the control unit 332 to be disconnected; a signal (power signal) at the first end of the power supply 10 is transmitted to the first input end of the first output unit 333 through the second input end and the output end of the control unit 332, so as to control the first output unit 333 to be turned on, and a signal (ground signal) at the second end of the power supply 10 is transmitted to the control end of the switch module 310 through the second input end and the output end of the first output unit 333, so as to control the switch module 310 to be turned off.
When the delayed power signal reaches a preset voltage, the output signal of the voltage setting unit 331 controls a path between the third input terminal and the output terminal of the control unit 332 to be conducted; the ground signal is transmitted to the first input end of the first output unit 333 through the third input end and the output end of the control unit 332, and controls the first output unit 333 to be turned off; the delayed power signal is transmitted to the control terminal of the switch module 310 through the second output unit 334, and controls the switch module 310 to be turned on.
The above embodiments exemplify the module structure of the inrush current suppression circuit, and the following description is made of a specific structure of the inrush current suppression circuit, but the invention is not limited thereto.
Fig. 3 is a schematic structural diagram of another inrush current suppression circuit according to an embodiment of the present invention. Referring to fig. 3, in one embodiment, optionally, the switch module 310 includes: a first transistor Q1; the control electrode of the first transistor Q1 serves as the control terminal of the switch module 310, the first electrode serves as the first terminal of the switch module 310, and the second electrode serves as the second terminal of the switch module 310. This arrangement makes the switch module 310 simple in structure and easy to implement. Illustratively, the first Transistor Q1 may be an Insulated Gate Bipolar Transistor (IGBT). Optionally, the switch module 310 further comprises: a resistor R11 connected as a protection resistor between the control electrode and the second electrode of the first transistor Q1; illustratively, the resistance of the resistor R11 may be relatively large, such as 10k Ω.
With continued reference to fig. 3, in one embodiment, the current limiting module 320 optionally includes: a current limiting resistor Rs; the first terminal of the current limiting resistor Rs serves as the first terminal of the current limiting module 320, and the second terminal serves as the second terminal of the current limiting module 320. Illustratively, the resistance of the current limiting resistor Rs may be set according to the voltage level of the power supply 10. Further, the current limiting module 320 further includes: the diode D1, acting as a rectifying diode, may limit the direction of current transfer. A first pole of the diode D1 serves as a first terminal of the current limiting module 320, and a second pole is electrically connected to a first terminal of the current limiting resistor Rs.
With continued reference to fig. 3, in one embodiment, the voltage setting unit 331 optionally includes: a first zener diode U1 and a first resistor R1; a first pole of the first zener diode U1 is used as a first input terminal of the voltage setting unit 331, and is connected to the delayed power signal Vd; a second pole of the first zener diode U1 is electrically connected to the first end of the first resistor R1 and serves as an output terminal of the voltage setting unit 331; a second terminal of the first resistor R1 serves as a second input terminal of the voltage setting unit 331. Therefore, the matching between the preset voltage of the delayed power signal Vd and the starting voltage of the control unit 332 can be performed through the first zener diode U1 and the first resistor R1, so that the flexibility of the inrush current suppression circuit is improved, and the inrush current suppression circuit is adapted to existing conversion modules in various control devices.
With continued reference to fig. 3, in one embodiment, the control unit 332 optionally includes: a second transistor Q2 and a fourth resistor R4; the control electrode of the second transistor Q2 serves as a first input terminal of the control unit 332; a first pole of the second transistor Q2 is electrically connected to the second end of the fourth resistor R4 and serves as an output terminal of the control unit 332; the second pole of the second transistor Q2 serves as a third input terminal of the control unit 332; a first terminal of the fourth resistor R4 serves as a second input terminal of the control unit 332. Illustratively, the second transistor Q2 may be a triode. Further, the control unit 332 further includes a resistor R6 and a resistor R7 as a protection resistor of the second transistor Q2; the resistor R6 is connected between the output terminal of the voltage setting unit 331 and the control electrode of the second transistor Q2; a resistor R7 is connected between the control electrode and the second electrode of the second transistor Q2.
With continued reference to fig. 3, in one embodiment, the first output unit 333 optionally includes: a third transistor Q3; a control electrode of the third transistor Q3 serves as a first input terminal of the first output unit 333, a first electrode serves as an output terminal of the first output unit 333, and a second electrode serves as a second input terminal of the first output unit 333. This arrangement makes the first output unit 333 simple in structure and easy to implement. Illustratively, the third transistor Q3 may be a triode. Further, the first output unit 333 further includes a resistor R8, a resistor R9, and a resistor R10 as a protection resistor; the resistor R8 is connected between the output terminal of the control unit 332 and the control electrode of the third transistor Q3; the resistor R9 is connected between the control electrode and the second electrode of the third transistor Q3; the resistor R10 is coupled between the first pole of the third transistor Q3 and the control terminal of the switch module 310.
With continued reference to fig. 3, in one embodiment, the second output unit 334 optionally includes: a fifth resistor R5; a first terminal of the fifth resistor R5 serves as an input terminal of the second output unit 334, and a second terminal thereof serves as an output terminal of the second output unit 334. The second output unit 334 is simple in structure and easy to implement.
With continued reference to fig. 3, based on the above embodiments, optionally, the inrush current suppression circuit further includes a capacitor C1, which is a filter capacitor and is connected between the output terminal of the current limiting module 320 and the ground terminal, so as to improve the power supply stability. The power supply 10 may comprise a DC power supply DC, for example a low voltage DC power supply.
The following will specifically describe the working process of the inrush current suppression circuit by taking the output signal of the original conversion module in the control device as an example of the delayed power supply signal Vd with reference to fig. 3:
after the control device is started, in a preset time after the power supply 10 is powered on, because the conversion module does not work normally yet, the delayed power supply signal Vd is 0 or does not reach a preset voltage, and the second transistor Q2 is turned off; the power supply signal is transmitted to the control electrode of the third transistor Q3 through the fourth resistor R4 and the resistor R8, and controls the third transistor Q3 to be turned on; the control electrode of the first transistor Q1 is pulled down to ground through the third transistor Q3 and the resistor R10, so that the control electrode and the second electrode of the first transistor Q1 are reversely biased, the first transistor Q1 is turned off, and the power supply 10 supplies power to the subsequent stage circuit 20 through the diode D1 and the current-limiting resistor R.
After a preset time, the conversion module works normally, and the delayed power supply signal Vd reaches a preset voltage, so that the second transistor Q2 is conducted; the ground signal is transmitted to the control electrode of the third transistor Q3 through the second transistor Q2 and the resistor R8, so that the voltage difference between the control electrode and the second electrode of the third transistor Q3 is 0, and the third transistor Q3 is turned off; at this time, the delayed power signal Vd turns on the first transistor Q1 through the fifth resistor R5, providing a low impedance path, and the power supply 10 supplies power to the subsequent circuit 20 through the first transistor Q1.
In summary, the inrush current suppression circuit reduces the inrush current at the start-up moment of the product by adding the current limiting module 320 to the power supply loop of the power supply 10. That is to say, the current limiting module 320 is activated as a current transmission path to reduce the inrush current in the time period when the product is started and the power supply 10 is powered on to easily generate the inrush current under the control of the switch control module 330 in the present embodiment; when the product normally works after avoiding the start-up period, the current limiting module 320 is bypassed, and the switch module 310 is enabled to be used as a power transmission path to reduce the power consumption of the product when the product normally works.
Fig. 4 is a schematic structural diagram of another inrush current suppression circuit according to an embodiment of the present invention. Referring to fig. 4, in one embodiment, the circuit is optionally similar to the structure of fig. 3, except that: in this embodiment, the voltage setting unit 331 includes: a second zener diode U2, a second resistor R2, and a third resistor R3; a first terminal of the second resistor R2 serves as a first input terminal of the voltage setting unit 331; a second terminal of the second resistor R2 is electrically connected to the first terminal of the second zener diode U2 and serves as an output terminal of the voltage setting unit 331; a second pole of the second zener diode U2 is electrically connected to a first end of the third resistor R3; a second terminal of the third resistor R3 serves as a second input terminal of the voltage setting unit 331. The present embodiment provides another structure of the voltage setting unit 331, which provides more options for the structure of the inrush current suppression circuit.
With reference to fig. 4, based on the above embodiments, optionally, the switch control module 330 further includes a second capacitor C2, which is a filter capacitor and is connected between the delayed power signal terminal and the ground terminal, so as to improve the stability of the inrush current suppression circuit.
Fig. 5 is a comparison diagram of simulation results with and without a rush current suppression circuit according to an embodiment of the present invention. For example, in the simulation experiment, the circuit configuration in fig. 4 was used as the simulation circuit when the inrush current suppression circuit was provided. Referring to fig. 5, the abscissa represents simulation time, and the ordinate represents current transmitted to a subsequent stage circuit, for example; the time t1 is the power supply power-on time when the impact current suppression circuit is not set; and the time t2 is the power supply power-on time when the impact current suppression circuit is arranged. As shown in fig. 5, when the inrush current suppression circuit is not provided, the absolute value of the inrush current peak at the power-on time of the power supply is greater than 9A; when the impact current suppression circuit is arranged, the absolute value of the impact current peak value at the power-on time of the power supply is less than 1A, which shows that the impact current suppression circuit provided by the embodiment of the invention can effectively suppress the impact current generated when the power supply is powered on.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A rush current suppression circuit, comprising:
the switch module comprises a control end, a first end and a second end; the first end of the switch module is electrically connected with the first end of the power supply, and the second end of the switch module is electrically connected with the rear-stage circuit; the switch module is used for responding to the signal of the control end of the switch module to be switched on or switched off;
the current limiting module comprises an input end and an output end; the input end of the current limiting module is electrically connected with the first end of the power supply, and the output end of the current limiting module is electrically connected with the second end of the switch module;
the switch control module comprises a first input end, a second input end, a third input end and an output end; a first input end of the switch control module is connected with a time-delay power supply signal, a second input end of the switch control module is electrically connected with an output end of the current limiting module, a third input end of the switch control module is electrically connected with a second end of the power supply, and an output end of the switch control module is electrically connected with a control end of the switch module;
the equivalent impedance of the switch module when the switch module is conducted is smaller than that of the current limiting module; and in the preset time after the power supply is powered on, the delay power supply signal does not reach the preset voltage, and the switch control module is used for responding to the delay power supply signal to control the switch module to be switched off so that the power supply supplies power to the rear-stage circuit through the current limiting module.
2. The inrush current suppression circuit of claim 1, further comprising: the power supply conversion module comprises an input end and an output end; the input end of the power supply conversion module is electrically connected with the first end of the power supply, and the output end of the power supply conversion module is electrically connected with the first input end of the switch control module; the power supply conversion module is used for converting the power supply signal output by the power supply into the delay power supply signal.
3. The inrush current suppression circuit of claim 1, wherein the switching module comprises: a first transistor; the control electrode of the first transistor is used as the control end of the switch module, the first electrode of the first transistor is used as the first end of the switch module, and the second electrode of the first transistor is used as the second end of the switch module.
4. The inrush current suppression circuit of claim 1, wherein the current limiting module comprises: a current limiting resistor; and the first end of the current limiting resistor is used as the first end of the current limiting module, and the second end of the current limiting resistor is used as the second end of the current limiting module.
5. The inrush current suppression circuit of claim 4, wherein the current limiting module further comprises: a diode; the first pole of the diode is used as the first end of the current limiting module, and the second pole of the diode is electrically connected with the first end of the current limiting resistor.
6. The inrush current suppression circuit of claim 1, wherein the switch control module comprises:
the voltage setting unit comprises a first input end, a second input end and an output end; a first input end of the voltage setting unit is connected to the time-delay power supply signal, and a second input end of the voltage setting unit is electrically connected with a second end of the power supply; the voltage setting unit is used for setting the preset voltage;
the control unit comprises a first input end, a second input end, a third input end and an output end; a first input end of the control unit is electrically connected with an output end of the voltage setting unit, a second input end of the control unit is electrically connected with an output end of the current limiting module, and a third input end of the control unit is electrically connected with a second end of the power supply; the control unit is used for controlling the control unit to output a signal of a first end of the power supply or a signal of a second end of the power supply according to the output signal of the voltage setting unit;
a first output unit including a first input terminal, a second input terminal, and an output terminal; a first input end of the first output unit is electrically connected with an output end of the control unit, a second input end of the first output unit is electrically connected with a second end of the power supply, and an output end of the first output unit is electrically connected with a control end of the switch module; the first output unit is used for being conducted when the control unit outputs a signal of a first end of the power supply and outputting a signal of a second end of the power supply;
a second output unit including an input terminal and an output terminal; the input end of the second output unit is connected to the delayed power supply signal, and the output end of the second output unit is electrically connected with the control end of the switch module; the second output unit is used for outputting the delay power supply signal.
7. The inrush current suppression circuit according to claim 6, wherein the voltage setting unit includes: a first zener diode and a first resistor; a first pole of the first voltage stabilizing diode is used as a first input end of the voltage setting unit; a second pole of the first voltage stabilizing diode is electrically connected with a first end of the first resistor and is used as an output end of the voltage setting unit; a second end of the first resistor is used as a second input end of the voltage setting unit;
alternatively, the voltage setting unit includes: the second voltage stabilizing diode, the second resistor and the third resistor; a first end of the second resistor is used as a first input end of the voltage setting unit; a second end of the second resistor is electrically connected with a first electrode of the second voltage stabilizing diode and is used as an output end of the voltage setting unit; a second pole of the second zener diode is electrically connected to the first end of the third resistor; and a second end of the third resistor is used as a second input end of the voltage setting unit.
8. The inrush current suppression circuit of claim 6, wherein the control unit comprises: a second transistor and a fourth resistor; a control electrode of the second transistor is used as a first input end of the control unit; a first pole of the second transistor is electrically connected with a second end of the fourth resistor and is used as an output end of the control unit; a second pole of the second transistor is used as a third input end of the control unit; and a first end of the fourth resistor is used as a second input end of the control unit.
9. The inrush current suppression circuit of claim 6, wherein the first output unit comprises: a third transistor; a control electrode of the third transistor is used as a first input terminal of the first output unit, a first electrode of the third transistor is used as an output terminal of the first output unit, and a second electrode of the third transistor is used as a second input terminal of the first output unit.
10. The inrush current suppression circuit of claim 6, wherein the second output unit comprises: a fifth resistor; a first end of the fifth resistor is used as an input end of the second output unit, and a second end of the fifth resistor is used as an output end of the second output unit.
CN202111210526.9A 2021-10-18 Impact current suppression circuit Active CN113937743B (en)

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