CN113937503A - Time-delay circuit board and manufacturing method thereof - Google Patents
Time-delay circuit board and manufacturing method thereof Download PDFInfo
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- CN113937503A CN113937503A CN202111197909.7A CN202111197909A CN113937503A CN 113937503 A CN113937503 A CN 113937503A CN 202111197909 A CN202111197909 A CN 202111197909A CN 113937503 A CN113937503 A CN 113937503A
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- layer
- circuit board
- conducting layer
- microstrip transmission
- delay line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q15/00—Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
- H01Q15/0006—Devices acting selectively as reflecting surface, as diffracting or as refracting device, e.g. frequency filtering or angular spatial filtering devices
- H01Q15/0086—Devices acting selectively as reflecting surface, as diffracting or as refracting device, e.g. frequency filtering or angular spatial filtering devices said selective devices having materials with a synthesized negative refractive index, e.g. metamaterials or left-handed materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
- H01P11/003—Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
- H01P3/081—Microstriplines
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The application discloses a time delay circuit board and a manufacturing method thereof. Wherein the time delay circuit board includes: the dielectric plate comprises a first surface and a second surface which are opposite, wherein a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface; the first conducting layer is composed of a microstrip transmission line, and the second conducting layer is a super surface layer formed by a plurality of microstructures periodically arranged on the second surface. According to the technical scheme, the time delay amount can be obviously improved on the premise that the physical size of the circuit board is not changed.
Description
Technical Field
The application relates to the technical field of microwave devices, in particular to a delay circuit board and a manufacturing method thereof.
Background
The existing radio frequency self-interference suppression generally adopts a reconstruction and suppression mechanism, and the specific process is to precisely reconstruct a self-interference signal by adopting a radio frequency self-interference reconstruction circuit and then subtract the self-interference reconstruction signal from a receiving signal at the front end of a receiver so as to realize the radio frequency self-interference suppression. The existing radio frequency self-interference suppression can be divided into two types of radio frequency multi-tap self-interference suppression and digital auxiliary radio frequency self-interference suppression according to the realization position of the self-interference reconstruction module. Compared with digital auxiliary radio frequency self-interference suppression, radio frequency multi-tap self-interference suppression has many advantages, for example, most strong multipath interference can be counteracted, and interference such as noise and nonlinearity caused by a transmitter can be counteracted.
However, the existing radio frequency multi-tap self-interference suppression shows various disadvantages in engineering implementation, for example, a large delay component is difficult to suppress: in the existing radio frequency multi-tap self-interference suppression, a delay line is realized by adopting a coaxial cable or a printed board for wiring, the delay amount is small, and real-time adjustment is difficult, so that the time-varying large delay component in a self-interference signal is difficult to suppress.
Disclosure of Invention
The embodiment of the application provides a delay circuit board capable of prolonging delay time and a manufacturing method thereof.
The embodiment of the application adopts the following technical scheme:
in a first aspect, an embodiment of the present application provides a delay line board, including: the dielectric plate comprises a first surface and a second surface which are opposite, wherein a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface; the first conducting layer is composed of a microstrip transmission line, and the second conducting layer is a super surface layer formed by a plurality of microstructures periodically arranged on the second surface.
In some embodiments, the plurality of microstructures have the same size and the same shape.
In some embodiments, the microstructures are sized according to the operating frequency of the delay line board.
In some embodiments, the shape of the microstructures includes one of a straight line, an L-shape, a T-shape, and a U-shape.
In some embodiments, the delay line board further comprises an isolation layer covering said second conductive layer.
In some embodiments, the first conductive layer is formed by a microstrip transmission line, and the microstrip transmission line is located at a middle position of the first conductive layer.
In some embodiments, the first conductive layer is formed by a plurality of microstrip transmission lines, and the plurality of microstrip transmission lines are uniformly distributed on the first conductive layer at equal intervals.
In some embodiments, the two ends of the microstrip transmission line are respectively welded with connecting pieces to serve as connecting ends of the delay circuit board.
In a second aspect, an embodiment of the present application further provides a method for manufacturing a delay circuit board, including: the method comprises the steps of obtaining a circuit board, wherein the circuit board comprises a dielectric layer, the dielectric layer comprises a first surface and a second surface which are opposite, a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface; processing the first conducting layer to obtain a first conducting layer consisting of a microstrip transmission line; and processing the second conductive layer to obtain a super surface layer consisting of a plurality of microstructures periodically arranged on the second surface.
In some embodiments, further comprising: covering an isolation layer on the second conductive layer; and respectively welding connecting pieces at two ends of the microstrip transmission line to obtain the connecting end of the delay circuit board.
The embodiment of the application adopts at least one technical scheme which can achieve the following beneficial effects:
the second conducting layer arranged on the second surface of the dielectric plate is processed into a plurality of microstructures which are arranged periodically, the equivalent dielectric constant and the equivalent magnetic conductivity of the dielectric plate are increased through the super surface formed by the microstructures, and then the time delay amount of the time delay circuit board is improved on the premise of not increasing the physical length of the microstrip transmission line, namely the time delay amount is obviously improved on the premise of not changing the physical size of the circuit board.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic structural diagram of a delay line board shown in an embodiment of the present application;
fig. 2 is a schematic structural diagram of another delay line board shown in an embodiment of the present application;
FIG. 3 is a diagram illustrating a transmission line delay characteristic of a delay line board with a super-surface structure according to an embodiment of the present application;
FIG. 4 is a diagram illustrating transmission line delay characteristics of a delay line board without a super-surface structure according to an embodiment of the present application;
fig. 5 is a flowchart of a method for manufacturing a delay line board according to an embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the present application more clear, the second side will clearly and completely describe the technical solutions of the present application in conjunction with the specific embodiments of the present application and the corresponding drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments that can be derived by a person skilled in the art from the embodiments given herein without making any creative effort shall fall within the protection scope of the present application.
The technical solutions provided by the embodiments of the present application are described in detail with reference to the second drawing.
The super surface is formed by periodically arranging microstructures with certain pattern shapes on a base material according to a specific mode. The different pattern shapes and arrangement modes of the microstructures enable the super surface to have different dielectric constants and different magnetic conductivities, and the super surface has different electromagnetic responses.
In the above formula, c0Is the speed of light, L is the actual physical length of the transmission line, εrIs the relative dielectric constant, mu, of the dielectric platerIs the relative permeability of the dielectric sheet.
As can be seen from the above equation, when the relative permittivity and the relative permeability are increased, the delay effect of the delay line is improved.
The embodiment of the application designs the delay circuit board by utilizing the principle of the super surface.
Fig. 1 is a schematic structural diagram of a delay line board shown in an embodiment of the present application, and fig. 2 is a schematic structural diagram of another delay line board shown in an embodiment of the present application, and with reference to fig. 1 and fig. 2, the delay line board includes: the dielectric plate comprises a first surface and a second surface which are opposite, wherein a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface.
Referring to fig. 2, the first surface may be an upper surface of a dielectric slab, and the second surface may be a lower surface of the dielectric slab, of course, the first surface may also be a lower surface of the dielectric slab, and the second surface is correspondingly an upper surface of the dielectric slab. The dielectric plate in this embodiment is made of a ceramic material, a polymer material, a ferroelectric material, a ferrite material, or a ferromagnetic material.
The first conducting layer is composed of a microstrip transmission line, and the second conducting layer is a super surface layer formed by a plurality of microstructures periodically arranged on the second surface.
In fig. 2, a plurality of U-shaped microstructures are arranged periodically in a horizontal arrangement manner, and in practical applications, other arrangements may also be adopted, for example, a vertical arrangement, a sagittal arrangement, and the like.
Therefore, in the delay circuit board in the embodiment of the application, the plurality of microstructures arranged periodically are arranged to increase the equivalent dielectric constant and the equivalent magnetic permeability of the dielectric slab, so that the delay amount of the delay circuit board is increased on the premise of not increasing the physical length of the microstrip transmission line.
The delay circuit board of the embodiment of the application can improve the delay amount of the delay circuit board without increasing the physical length of the microstrip transmission line, so the delay circuit board of the embodiment of the application has the advantages of small volume and large delay.
In some embodiments, the plurality of microstructures is formed from a second conductive layer on the second surface in a manner that is related to the conductive material of the second conductive layer, including but not limited to etching, photolithography, chemical etching, and the like.
For example, if the second conductive layer is made of a conductive metal material, metal etching processing may be performed on the second conductive layer to etch the second conductive layer into a plurality of microstructures arranged periodically.
In this embodiment, the plurality of microstructures have the same size and the same shape, that is, the size and the shape of each microstructure are the same. The size of the microstructure can be set according to the working frequency of the delay circuit board, for example, one tenth of the working wavelength corresponding to the working frequency is used as the size of the microstructure, and one fifth of the working wavelength is used as the gap distance between the microstructures. It will be appreciated that the size of the microstructures and the gap distance between the microstructures can be set reasonably by one skilled in the art depending on the operating frequency.
The shape of the microstructure in this embodiment includes, but is not limited to, one of a straight line, an L-shape, a T-shape, and a U-shape. In practical applications, the microstructures may be arranged in other shapes as long as the shapes of the respective microstructures are the same.
In some embodiments, the delay circuit board further comprises an isolation layer covering the second conductive layer, and the microstructure is protected from the environment by the isolation layer. The isolation layer is made of a non-conductive and non-magnetic material which does not affect the electromagnetic parameters of the dielectric plate, such as a plastic material.
In some embodiments, the first conductive layer is formed by a microstrip transmission line, and to avoid the influence of the boundary effect, the microstrip transmission line in this embodiment is located in the middle of the first conductive layer.
In practical application, the first conductive layer may also be formed by a plurality of microstrip transmission lines, and the plurality of microstrip transmission lines are uniformly distributed on the first conductive layer at equal intervals.
It should be noted that, if the area of the first surface of the dielectric slab is small, the first conductive layer is usually prepared into one microstrip transmission line, so as to avoid interference caused by a relatively short distance between multiple microstrip transmission lines. If the area of the first surface of the dielectric plate is large, the first conducting layer can be prepared into a plurality of microstrip transmission lines according to application requirements, and the plurality of microstrip transmission lines do not have intersection points, so that the influence on transmitted electric signals is avoided.
In some embodiments, the two ends of the microstrip transmission line are respectively welded with connecting pieces to serve as connecting ends of the delay circuit board. For example, pads or connectors are respectively welded at two ends of the microstrip transmission line, and the pads or connectors are used as input/output ends of the delay circuit board.
To explain the delay effect of the delay circuit board in the embodiment of the present application in detail, the delay circuit board shown in fig. 2 is taken as an example for explanation.
As shown in fig. 2, a Rogers 4350B plate is used as a dielectric plate of the delay circuit board, an upper conductive layer and a lower conductive layer are respectively arranged on the upper surface and the lower surface of the dielectric plate, a microstrip transmission line located in the middle position is obtained by etching the upper conductive layer, and a plurality of U-shaped microstructures periodically arranged on the lower surface are obtained by etching the lower conductive layer, a transmission line delay characteristic curve of the delay circuit board shown in fig. 2 is shown in fig. 3, fig. 4 shows a transmission line delay characteristic curve of a conventional delay circuit board which is made of the same material and has the same size but the lower conductive layer is not etched to be a super surface, and compared with fig. 3 and 4, the delay of the delay circuit board in the embodiment of the present application is significantly improved.
The embodiment of the application also provides a manufacturing method of the delay circuit board, which is used for manufacturing the delay circuit board in any embodiment.
Fig. 5 is a flowchart of a method for manufacturing a delay line board in an embodiment of the present application, and as shown in fig. 5, the method in this embodiment at least includes steps S510 to S530:
step S510, a circuit board is obtained, where the circuit board includes a dielectric layer, the dielectric layer includes a first surface and a second surface opposite to each other, the first surface is provided with a first conductive layer, and the second surface is provided with a second conductive layer.
In the process of manufacturing the delay circuit boards in batches, the circuit boards to be processed can be obtained through the mechanical arm.
Step S520, the first conductive layer is processed to obtain a first conductive layer formed by a microstrip transmission line.
Step S530, processing the second conductive layer to obtain a super surface layer composed of a plurality of microstructures periodically arranged on the second surface.
The processing mode of the first conducting layer and the second conducting layer is related to the materials of the first conducting layer and the second conducting layer, and if the first conducting layer and the second conducting layer are made of conducting metal materials, metal etching processing can be conducted on the first conducting layer and the second conducting layer.
It can be understood that there is no limitation on the execution sequence of step S520 and step S530 in the embodiment of the present application, and in practical applications, step S520 and step S530 may be executed at the same time, or step S520 may be executed first, and then step S530 is executed; alternatively, step S530 may be executed first, and then step S520 may be executed.
In some embodiments, the above-mentioned manufacturing method in fig. 5 further includes: covering the second conductive layer with an isolation layer; and respectively welding connecting pieces at two ends of the microstrip transmission line to obtain the connecting end of the delay circuit board.
According to the method for manufacturing the delay circuit, the delay effect of the circuit board can be improved under the condition that the physical size of the circuit board is not changed, and therefore the delay circuit board with small submission and large delay is manufactured.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A delay line board, comprising: the dielectric plate comprises a first surface and a second surface which are opposite, wherein a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface;
the first conducting layer is composed of a microstrip transmission line, and the second conducting layer is a super surface layer formed by a plurality of microstructures periodically arranged on the second surface.
2. The delay line board of claim 1, wherein the plurality of microstructures have the same size and the same shape.
3. The delay line of claim 2, wherein the microstructures are sized according to an operating frequency of the delay line.
4. The delay line board of claim 2, wherein the microstructure comprises one of a linear, L-shaped, T-shaped, and U-shaped.
5. The delay line board of claim 1, further comprising an isolation layer covering the second conductive layer.
6. The delay line board of claim 1, wherein the first conductive layer is formed of a microstrip transmission line, and the microstrip transmission line is located at a middle position of the first conductive layer.
7. The delay line board of claim 1, wherein the first conductive layer is formed by a plurality of microstrip transmission lines, and the microstrip transmission lines are uniformly distributed on the first conductive layer at equal intervals.
8. The delay line board of claim 1, wherein the two ends of the microstrip transmission line are respectively soldered with connectors as the connection ends of the delay line board.
9. A method of making the delay line of any of claims 1 to 8, comprising:
obtaining a circuit board, wherein the circuit board comprises a dielectric layer, the dielectric layer comprises a first surface and a second surface which are opposite, a first conducting layer is arranged on the first surface, and a second conducting layer is arranged on the second surface;
processing the first conducting layer to obtain a first conducting layer formed by a microstrip transmission line;
and processing the second conducting layer to obtain a super surface layer consisting of a plurality of microstructures periodically arranged on the second surface.
10. The method of claim 9, further comprising:
covering an isolation layer on the second conductive layer;
and respectively welding connecting pieces at two ends of the microstrip transmission line to obtain the connecting end of the delay circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111197909.7A CN113937503A (en) | 2021-10-14 | 2021-10-14 | Time-delay circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111197909.7A CN113937503A (en) | 2021-10-14 | 2021-10-14 | Time-delay circuit board and manufacturing method thereof |
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| Publication Number | Publication Date |
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| CN113937503A true CN113937503A (en) | 2022-01-14 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202111197909.7A Pending CN113937503A (en) | 2021-10-14 | 2021-10-14 | Time-delay circuit board and manufacturing method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117497990A (en) * | 2024-01-02 | 2024-02-02 | 上海安其威微电子科技有限公司 | Slow wave delay line and chip |
-
2021
- 2021-10-14 CN CN202111197909.7A patent/CN113937503A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117497990A (en) * | 2024-01-02 | 2024-02-02 | 上海安其威微电子科技有限公司 | Slow wave delay line and chip |
| CN117497990B (en) * | 2024-01-02 | 2024-03-08 | 上海安其威微电子科技有限公司 | Slow wave delay line and chip |
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