CN113937010A - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
CN113937010A
CN113937010A CN202111536918.4A CN202111536918A CN113937010A CN 113937010 A CN113937010 A CN 113937010A CN 202111536918 A CN202111536918 A CN 202111536918A CN 113937010 A CN113937010 A CN 113937010A
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China
Prior art keywords
solder
metal
pad
semiconductor device
component
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CN202111536918.4A
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Chinese (zh)
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CN113937010B (en
Inventor
周东旭
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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Priority to CN202111536918.4A priority Critical patent/CN113937010B/en
Publication of CN113937010A publication Critical patent/CN113937010A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80801—Soldering or alloying

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Abstract

The invention provides a method for manufacturing a semiconductor device, which is characterized in that a solder containing groove is reserved on a welding substrate, a solder gasket is arranged on the solder containing groove, and the solder gasket can be bent to the shape capable of clamping a component to be welded, so that the component can be placed on the solder gasket and positioned and temporarily fixed by the clamping force of the solder gasket, and then the solder gasket is melted and reflowed into the solder containing groove by further heating, so that the component is welded on the welding substrate, thereby avoiding the problem that abnormal phenomena such as offset, desoldering and the like are easy to occur in the process of welding the component in the prior art, simultaneously avoiding the problem that the component is fixed by using a jig in the welding process, overcoming the processing difficulty of the jig, avoiding the risks such as equipment abnormity and the like caused by the falling of the jig, and improving the manufacturing yield.

Description

Method for manufacturing semiconductor device
Technical Field
The present invention relates to the field of integrated circuit fabrication technologies, and in particular, to a method for manufacturing a semiconductor device.
Background
Referring to fig. 1, in some semiconductor device manufacturing processes, it is necessary to solder some small-sized components 200 onto the surface metal layer of the substrate 100 through the solder layer 300 to achieve the required functions of the semiconductor device. There may be some cases where the bonding surface of the component 200 is irregular relative to the surface of the substrate 100, that is, the bonding surface of the component 200 cannot be matched with the surface of the substrate 100, so that the bonding surface of the component 200 cannot be completely attached to the surface of the substrate 100 during bonding. Therefore, the device 200 has the characteristics of small size, light weight, and special shape of the bonding surface, which easily causes the abnormal phenomena such as deviation and debonding of the device 200 during the bonding process, thereby causing a problem of a reduction in the manufacturing yield of the semiconductor device.
The current solution is to design a jig matching with the size of the component to fix the component during the component welding process, but the present solution still has the problems of small size of the jig, easy falling, high requirement for the processing precision of the jig, high use cost of the jig, and the risk of abnormal equipment and the like caused by the falling of the jig.
Disclosure of Invention
The invention aims to provide a manufacturing method of a semiconductor device, which can overcome the problems of difficult welding and complex operation of small elements in the manufacturing process of the semiconductor device and further improve the production efficiency and the product yield.
In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device, comprising the steps of:
s1, providing a welding substrate with a metal layer and an isolation groove, wherein the isolation groove penetrates through the metal layer to divide the metal layer into a plurality of oppositely arranged and insulated metal areas to be welded, and each metal area is provided with a solder containing groove which does not penetrate through the metal layer;
s2, arranging the corresponding solder pads on the solder containing grooves in a bending way, arranging the components to be welded on all the solder pads, and clamping the components by the common action of all the solder pads;
and S3, heating each solder pad to melt the solder pad into solder, reflowing the solder to the corresponding solder containing groove and breaking the solder containing groove, and further welding and fixing the corresponding end of the element with each metal area through the solder in each solder containing groove.
Optionally, in step S1, the provided bonding substrate further includes an insulating dielectric layer, the metal layer covers a portion of the surface of the insulating dielectric layer, and the isolation trench penetrates through the metal layer and exposes the surface of the insulating dielectric layer.
Optionally, the bonding substrate provided in step S1 further has a peripheral trench disposed at the periphery of all the metal regions and penetrating through the metal layer and communicating with the isolation trench, so that each of the metal regions has an island shape.
Alternatively, the solder receiving grooves provided in step S1 may be communicated with each other at the isolation groove, and the solder pads provided on the solder receiving grooves in step S2 may be separated from each other or at least some of the solder pads on the solder receiving grooves may be integrally connected.
Optionally, in step S1, the solder receiving grooves in the two metal regions on the two opposite sides of the isolation trench are disposed on the same straight line intersecting the isolation trench and both communicate with the isolation trench.
Optionally, the solder pad set in step S2 extends continuously from the solder receiving groove in the metal area on one side of the isolation trench to the solder receiving groove in the metal area on the other side of the isolation trench, and the solder pad bends along the straight line; alternatively, in step S2, the solder pads disposed on the solder receiving grooves in the two metal regions are separated from each other and respectively bent along the straight line.
Optionally, in step S2, the component provided is a chip, a resistor, a capacitor, a diode, an inductor, a pad, a lead, or a pin.
Optionally, in step S2, first, providing the solder pad in a planar shape, and spreading the solder pad on the solder receiving groove, so that the outer edges of at least two opposite sides of the solder pad are mounted on the metal layer of the metal region at the periphery of the solder receiving groove; the component is then placed on the solder pad and pressed down to deform the solder pad to clamp the component.
Optionally, in step S2, first, the solder pad with a non-planar shape is provided and placed on the solder receiving groove, and then the component is placed on the solder pad, wherein the solder pad is shaped to clamp the component on the solder receiving groove.
Optionally, the length of the solder pad provided in step S2 is smaller than the length of the solder receiving groove corresponding thereto, and the width of the solder pad is larger than the width of the solder receiving groove corresponding thereto.
Compared with the prior art, the technical scheme of the invention has at least one of the following beneficial effects:
1. the welding substrate is provided with a welding flux containing groove, the welding flux containing groove is provided with a welding flux gasket, the welding flux gasket can be bent to the shape capable of clamping an element to be welded, the element can be placed on the welding flux gasket and positioned and temporarily fixed by the clamping force of the welding flux gasket, the welding flux gasket is further melted and reflowed to the welding flux containing groove by heating, and then the element is welded on the welding substrate, so that the problems of abnormal phenomena such as offset, desoldering and the like easily occurring in the process of welding the element in the prior art are avoided, and the manufacturing yield of the semiconductor device is improved.
2. Because the component can be fixed through the bent solder pad arranged on the solder containing groove, the problem that the component needs to be fixed by using a jig in the welding process can be avoided, the processing difficulty of the jig is overcome, and the risk that the equipment is abnormal and the like caused by the falling of the jig is avoided.
3. The solder pad can be melted and reflowed to the solder containing groove by heating, and then the element is welded on the welding substrate, so the scheme of the invention has the advantages of simple operation, easy implementation and low cost.
Drawings
Fig. 1 is a schematic view of a prior art top view and cross-sectional structure for soldering a component to a solder substrate.
Fig. 2 is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention.
Fig. 3 to 8 are schematic diagrams of top views and cross-sectional structures of the device in the manufacturing method shown in fig. 2.
Fig. 9 is a schematic top view of a semiconductor device according to another embodiment of the present invention.
Fig. 10 is a schematic top view of a semiconductor device according to still another embodiment of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention. It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "or" connected to "other elements or layers, it can be directly on, connected to, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …", "directly connected to" other elements or layers, there are no intervening elements or layers present. Although the terms first, second, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention. Spatial relationship terms such as "below … …", "below", "lower", "above … …", "above", "upper", and the like may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" … …, or "beneath" would then be oriented "on" other elements or features. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof.
The technical solution proposed by the present invention will be further described in detail with reference to fig. 2 to 8 and the specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 2, an embodiment of the invention provides a method for manufacturing a semiconductor device, which includes the following steps:
s1, providing a welding substrate with a metal layer and an isolation groove, wherein the isolation groove penetrates through the metal layer to divide the metal layer into a plurality of oppositely arranged and insulated metal areas to be welded, and each metal area is provided with a solder containing groove which does not penetrate through the metal layer;
s2, arranging the corresponding solder pads on the solder containing grooves in a bending way, arranging the components to be welded on all the solder pads, and clamping the components through the combined action of the bending of all the solder pads;
and S3, heating each solder pad to melt the solder pad into solder, reflowing the solder to the corresponding solder containing groove and breaking the solder containing groove, and further welding and fixing the corresponding end of the element with each metal area through the solder in each solder containing groove.
Referring to fig. 3, in step S1, a soldering substrate 400 having a metal layer 402, an isolation trench 400c and a solder receiving groove 400d is provided, wherein the soldering substrate 400 may be any suitable substrate, for example, the soldering substrate 400 includes an insulating dielectric layer 401 and a metal layer 402 covering the insulating dielectric layer 401, the insulating dielectric layer 401 may be a single-layer film or a composite structure formed by laminating multiple layers of material films, and the material of the composite structure may include at least one of ceramic, silicon nitride, silicon oxide and silicon oxynitride, wherein the ceramic may be aluminum oxide (Al)2O3) Or aluminum nitride (AlN). The metal layer 402 may be copper or aluminum or copper aluminum alloy, and the thickness of the metal layer 402 may be 0.3mm to 1.0 mm.
When the semiconductor device to be manufactured is a semiconductor power module having an IGBT (Insulated Gate Bipolar Transistor) or the like, the edge region of the solder substrate 400 may be surrounded by a molding compound (not shown), and the central region is exposed for contacting a heat dissipation member, so as to realize a heat dissipation package of the semiconductor power module.
In other embodiments of the present invention, the soldering substrate 400 may also have a back metal layer (not shown) formed on the lower surface of the insulating dielectric layer 401, the material of the back metal layer may be the same as the metal layer 402, and the back metal layer may be used for soldering corresponding components as the metal layer 402, and the edge regions of the back metal layer and the metal layer 402 are simultaneously surrounded by a molding compound (not shown), and the central region is exposed and is used for contacting a heat dissipation assembly, so as to implement double-sided heat dissipation packaging of the semiconductor power module.
In this embodiment, the metal layer 402 covers a portion of the surface of the insulating dielectric layer 401, the isolation trench 400c penetrates through the metal layer 402 and exposes the surface of the insulating dielectric layer 401, and the isolation trench 400c divides the metal layer 402 into a first metal region 400a and a second metal region 400b which are oppositely disposed and isolated in an insulating manner. The first metal region 400a and the second metal region 400b are used for welding with both ends of the element provided in the subsequent step S2, respectively.
In this embodiment, the first metal area 400a and the second metal area 400b are respectively provided with a solder receiving groove 400d that does not penetrate through the metal layer 402, and the solder receiving grooves 400d in the two metal areas are disposed on the same straight line that is vertically intersected with the isolation trench 400c, and are communicated with each other at the isolation trench 400c to form a continuously extending solder receiving groove 400d that continuously extends from the first metal area 400a to the second metal area 400b, i.e., the depth of the continuously extending solder receiving groove 400d is smaller than the depth of the isolation trench 400c, and the continuously extending solder receiving groove 400d crosses the isolation trench 400c and two ends of the continuously extending solder receiving groove 400d respectively extend into the first metal area 400a and the second metal area 400 b.
The solder receiving grooves 400d in the first and second metal regions 400a and 400b in this embodiment are connected to each other and located on the same straight line, but in other embodiments of the present invention, the solder receiving grooves 400d in the first and second metal regions 400a and 400b are allowed to be disconnected at the isolation trench 400c to be isolated from each other by the isolation trench 400c, and the solder receiving grooves 400d in the first and second metal regions 400a and 400b are also allowed not to be located on the same straight line, as shown in fig. 10.
Further, it should be understood that the solder receiving groove 400d shown in the figures of the present embodiment is a rectangular groove, but in other embodiments of the present invention, the solder receiving groove 400d may be any other suitable shape, which can be adapted to the position to be welded of the component 500, for example, the cross section of the long side wall of the solder receiving groove 400d is a wave-shaped curve, a segment of a circular arc, etc.
Optionally, referring to fig. 8, the bonding substrate 400 provided in step S1 further has a peripheral trench 400e, the peripheral trench 400e is disposed at the periphery of the first metal region 400a and the second metal region 400b and penetrates the metal layer 402 and is communicated with the isolation trench 400c, so that the first metal region 400a and the second metal region 400b are both island-shaped. The shape, the extending length, the extending direction, and the like of the peripheral trench 400e are reasonably set according to the manufacturing requirements of the semiconductor device, and the invention is not particularly limited thereto.
Referring to fig. 4 to 6, in the present embodiment, in step S2, first, a planar solder pad 600 is provided, and the solder pad 600 is laid on the continuously extending solder receiving groove 400d, such that at least two opposite outer edges of the solder pad 600 are mounted on the metal layers 400 of the first metal region 400a and the second metal region 400b at the periphery of the continuously extending solder receiving groove 400 d; then, a semiconductor element 500 is provided and placed on the solder pad 600, where the element 500 may be a chip, a resistor, a capacitor, a diode, an inductor, a pad, a lead, or a pin, and a bonding surface thereof is shaped (e.g., curved such as an arc), and the element 500 cannot be completely attached to the bonding surface (e.g., a plane) of the metal layer 402 without the solder pad 600, so that the element 500 is easily moved during the bonding process without the solder pad 600; next, the element 500 is depressed so that the solder pad 600 is deformed and bent to clamp the element 500. For example, solder pad 600 is bent into a V-shape.
That is, in step S2 of the present embodiment, the solder pads 600 disposed on the solder receiving grooves 400d in the first metal area 400a and the second metal area 400b are connected together and bent into a V shape along the straight line where the solder receiving groove 400d is located, so as to clamp the component 500.
It should be understood that, in other embodiments of the present invention, as shown in fig. 9, the solder pads 600 disposed on the solder receiving grooves 400d in the first metal area 400a and the second metal area 400b may be separated from each other, and may be respectively bent into a V shape along the line where the solder receiving grooves 400d are located, so as to cooperatively clamp the component 500.
Further, it should also be understood that in the present embodiment, the solder pad 600 in each metal region may also be any suitable material and shape, as long as the following two conditions are met: (1) the element 500 can be positioned and temporarily clamped under the common action after being pressed and deformed, so that the problem that abnormal phenomena such as deviation, desoldering and the like are easy to occur in the process of welding the element 500 is solved; (2) the solder can be melted into the solder after being heated, and the solder can automatically reflow to the area of the solder receiving groove where the component 500 is opposite to the metal layer 402 and can be soldered together, so as to solder and fix the one end 500a of the component 500 and the first metal area 400a together, and solder and fix the other end 500b of the component 500 and the second metal area 400b together, on the other hand, the solder is broken at the isolation trench 400c and does not fall into the isolation trench 400c, so that the central area 500c of the component 500 is suspended at the isolation trench 400c, and the first metal area 400a and the second metal area 400b are prevented from being connected together at the isolation trench 400 c.
As an example, the element 500 is in the shape of a cylinder with a large radius as a whole, and both ends 500a, 500b thereof are respectively connected with a central region 500c thereof into a whole by a thin cylinder with a small radius. Before being pressed down, the solder pad 600 is rectangular, the solder receiving groove 400d is also rectangular, and the length extending direction of the solder pad 600 is the same as the length extending direction of the solder receiving groove 400d, the length L2 of the solder pad 600 is smaller than the length L1 of the solder receiving groove 400d, and the width W2 of the solder pad 600 is smaller than the width W1 of the solder receiving groove 400d, so that after the solder pad 600 is tiled on the solder receiving groove 400d in step S2, two wide sides of the solder pad 600 are exposed at two ends of the solder receiving groove 400d, two long sides of the solder pad 600 are mounted on the first metal region 400a and the second metal region 400b, and when the solder pad 600 is pressed down, the solder pad is deformed into a V-shaped structure under the combined action of the component 500 and the solder receiving groove 400d, and an opening of the V-shaped structure formed by the solder pad 600 can hold the component 500. It should be noted that the bottom 600a of the V-shaped structure formed by the solder pad 600 may contact the metal layer 402 at the bottom of the solder receiving groove 400d, or may be suspended above the solder receiving groove 400 d.
It should be noted that, in this embodiment, after the component 500 is placed on the planar solder pad 600, the planar solder pad 600 is pressed down to be deformed into a V shape capable of clamping the component 500, which is only an example, and the technical solution of the present invention is not limited thereto.
For example, in other embodiments of the present invention, when the shape of the component 500 and/or the shape of the solder receiving groove 400d are different from those of the present embodiment, the solder pad 600 is allowed to be adaptively changed into any other shape capable of holding the component 500 according to the shapes of the component 500 and the solder receiving groove 400d during the process of pressing down the component 500.
For another example, in other embodiments of the present invention, the solder pad 600 with a non-planar shape may be designed and manufactured in advance according to the shape of the soldering surface of the component 500, so that after the solder pad 600 is placed on the solder receiving groove 400d, the corresponding component 500 may be directly placed on the solder pad 600, and the non-planar shape of the solder pad 600 may clamp the component 500 on the solder receiving groove 400 d.
Referring to fig. 6 and 7, in step S3, the solder substrate 400 is heated to melt the solder pad 600 into solder 600b, and due to the material characteristics of the fluid solder 600b (e.g., the distance between molecules is very small, the attractive force between molecules is very large, the surface tension is large, etc.), the solder 600b reflows to and solidifies between the component 500 and the first metal region 400a and between the component 500 and the second metal region 400b, so that one end 500a of the component 500 is soldered and fixed to the first metal region 400a via the corresponding solder 600b, the other end 500b of the component 500 is soldered and fixed to the second metal region 400b via the corresponding solder 600b, and the solder 600b is broken at the isolation trench 400c and does not reflow into the isolation metal layer 400c because there is no metal layer 402 at the isolation trench 400 c.
Thus, the components 500 are soldered to the corresponding positions of the solder substrate 400 through the above-described steps S1 to S3.
In the above embodiments, the welding of the element 500 having two welding ends is taken as an example, but the technical solution of the present invention is not limited thereto.
For example, in another embodiment of the present invention, referring to fig. 10, when one soldering component 500 has a plurality of soldering terminals, in step S1, it is necessary to adaptively arrange the solder receiving grooves 400d and the isolation trenches 400c according to the shape of the component to be soldered and the terminals to be soldered thereof, i.e., the shapes and the numbers of the solder receiving grooves 400d and the isolation trenches 400c may be adaptively changed, wherein the arranged isolation trenches 400c may communicate with each other and divide the metal layer 402 into three or more metal regions, one or more solder receiving grooves 400d are provided in each metal region, but whether the solder receiving grooves 400d in adjacent metal regions communicate depends on the positions of the components to be soldered. The solder pads disposed in each solder receiving groove 400d in step S2 may be separated from each other, some of the solder pads on the solder receiving grooves 400d may be connected together, or all of the solder pads on the solder receiving grooves 400d may be connected together. In any case, after the component to be soldered is finally placed on all the solder pads in step S2, the component can be clamped by the bending of all the solder pads. In step S3, after heating, the solder pads on each solder receiving cavity 400d are melted into solder and reflowed to the corresponding solder receiving cavity 400d, and the solder is broken at the isolation trench 400c, so that the corresponding ends of the component are soldered and fixed to the metal regions through the solder in each solder receiving cavity 400 d.
For another example, in other embodiments of the present invention, when it is required to solder different components on the metal layer 402 at a plurality of soldering positions of the soldering substrate 400, it may be possible to provide corresponding isolation trenches to divide the metal layer into a corresponding number of metal regions, provide solder receiving grooves at the soldering positions of the components corresponding to each metal region, and perform the above-mentioned steps S2 and S3 at each solder receiving groove to solder each component on the metal layer 402 at the corresponding position of the soldering substrate 400.
In summary, in the method for manufacturing a semiconductor device according to the present invention, the solder receiving groove is reserved on the soldering substrate, the solder pad is disposed on the solder receiving groove, and the solder pad can be bent to a shape capable of clamping the component to be soldered, so that the component can be placed on the solder pad and positioned and temporarily fixed by the clamping force of the solder pad, and then the solder pad is melted and reflowed into the solder receiving groove by heating, so as to solder the component to the soldering substrate, thereby avoiding the problem of abnormal phenomena such as offset and desoldering in the process of soldering the component in the prior art, and improving the yield of manufacturing the semiconductor device. Meanwhile, the element can be fixed through the bent solder pad arranged on the solder accommodating groove, so that the problem that the element is fixed by using a jig in the welding process can be avoided, the processing difficulty of the jig is overcome, and the risk that the equipment is abnormal and the like due to the fact that the jig falls is avoided. In addition, the solder pad can be melted and reflowed into the solder accommodating groove by heating, so that the element is welded on the welding substrate, and therefore, the scheme of the invention has the advantages of simple operation, easy implementation and low cost, and is suitable for manufacturing any suitable semiconductor device.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art according to the above disclosure are within the scope of the present invention.

Claims (10)

1. A method for manufacturing a semiconductor device, comprising the steps of:
s1, providing a welding substrate with a metal layer and an isolation groove, wherein the isolation groove penetrates through the metal layer to divide the metal layer into a plurality of oppositely arranged and insulated metal areas to be welded, and each metal area is provided with a solder containing groove which does not penetrate through the metal layer;
s2, arranging the corresponding solder pad on the solder containing groove in a bending way, arranging the element to be welded on the solder pad, and clamping the element by the combined action of the bending of the solder pad;
and S3, heating each solder pad to melt the solder pad into solder, reflowing the solder to the corresponding solder containing groove and breaking the solder containing groove, and further welding and fixing the corresponding end of the element with each metal area through the solder in each solder containing groove.
2. The method of manufacturing a semiconductor device according to claim 1, wherein in step S1, the bonding substrate is further provided with an insulating dielectric layer, the metal layer covers a portion of the surface of the insulating dielectric layer, and the isolation trench penetrates the metal layer and exposes the surface of the insulating dielectric layer.
3. The method for manufacturing a semiconductor device according to claim 1, wherein the bonding substrate provided in step S1 further has a peripheral trench provided in the periphery of all the metal regions and penetrating the metal layer and communicating with the isolation trench so that each of the metal regions has an island shape.
4. The method of manufacturing a semiconductor device according to claim 1, wherein the solder receiving grooves provided in step S1 communicate with each other at the isolation groove, and the solder pads provided on the solder receiving grooves in step S2 are spaced apart from each other or at least a part of the solder pads on the solder receiving grooves are integrated.
5. The method of manufacturing a semiconductor device according to claim 4, wherein in step S1, the solder receiving grooves in the two metal regions on opposite sides of the isolation trench are disposed on a same line intersecting the isolation trench and both communicate with the isolation trench.
6. The method for manufacturing a semiconductor device according to claim 5, wherein the solder pad provided in the step S2 extends continuously from the solder receiving groove in the metal region on one side of the isolation trench to the solder receiving groove in the metal region on the other side of the isolation trench, and the solder pad is bent along the straight line; alternatively, in step S2, the solder pads disposed on the solder receiving grooves in the two metal regions are separated from each other and respectively bent along the straight line.
7. The method for manufacturing a semiconductor device according to claim 1, wherein in step S2, the element provided is a chip, a resistor, a capacitor, a diode, an inductor, a pad, a lead, or a pin.
8. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein in step S2, first, the solder pad is provided in a planar shape and is laid flat on the solder receiving groove such that outer edges of at least opposite sides of the solder pad are mounted on the metal layer of the metal region at the periphery of the solder receiving groove; the component is then placed on the solder pad and pressed down to deform the solder pad to clamp the component.
9. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein in step S2, first, the solder pad having a non-planar shape designed in advance is provided and placed on the solder receiving groove, and then the component is placed on the solder pad, wherein the solder pad has a shape capable of clamping the component to the solder receiving groove.
10. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein the length of the solder pad provided in step S2 is smaller than the length of the solder receiving groove corresponding thereto, and the width of the solder pad is larger than the width of the solder receiving groove corresponding thereto.
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JPH09321067A (en) * 1996-05-30 1997-12-12 Nec Kyushu Ltd Manufacture of semiconductor device
JPH10233406A (en) * 1997-02-19 1998-09-02 Rohm Co Ltd Bonding device of ic chip
CN106298714A (en) * 2015-05-27 2017-01-04 南茂科技股份有限公司 Semiconductor structure
JP2019153643A (en) * 2018-03-01 2019-09-12 トヨタ自動車株式会社 Semiconductor device
CN212676254U (en) * 2020-08-28 2021-03-09 中芯集成电路制造(绍兴)有限公司 Semiconductor power module and electronic device
JP2021158158A (en) * 2020-03-25 2021-10-07 株式会社鈴野製作所 Soldering method, soldering device, and sheet solder

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09321067A (en) * 1996-05-30 1997-12-12 Nec Kyushu Ltd Manufacture of semiconductor device
JPH10233406A (en) * 1997-02-19 1998-09-02 Rohm Co Ltd Bonding device of ic chip
CN106298714A (en) * 2015-05-27 2017-01-04 南茂科技股份有限公司 Semiconductor structure
JP2019153643A (en) * 2018-03-01 2019-09-12 トヨタ自動車株式会社 Semiconductor device
JP2021158158A (en) * 2020-03-25 2021-10-07 株式会社鈴野製作所 Soldering method, soldering device, and sheet solder
CN212676254U (en) * 2020-08-28 2021-03-09 中芯集成电路制造(绍兴)有限公司 Semiconductor power module and electronic device

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