CN113921456A - Semiconductor processing equipment and wafer processing method - Google Patents

Semiconductor processing equipment and wafer processing method Download PDF

Info

Publication number
CN113921456A
CN113921456A CN202111163054.6A CN202111163054A CN113921456A CN 113921456 A CN113921456 A CN 113921456A CN 202111163054 A CN202111163054 A CN 202111163054A CN 113921456 A CN113921456 A CN 113921456A
Authority
CN
China
Prior art keywords
wafer
heating
chamber
carrying position
process chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111163054.6A
Other languages
Chinese (zh)
Inventor
蒋秉轩
兰玥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Naura Microelectronics Equipment Co Ltd
Original Assignee
Beijing Naura Microelectronics Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Naura Microelectronics Equipment Co Ltd filed Critical Beijing Naura Microelectronics Equipment Co Ltd
Priority to CN202111163054.6A priority Critical patent/CN113921456A/en
Publication of CN113921456A publication Critical patent/CN113921456A/en
Priority to TW111136551A priority patent/TW202316603A/en
Priority to PCT/CN2022/121573 priority patent/WO2023051496A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

The application discloses semiconductor process equipment and wafer processing method, this semiconductor process equipment include the process chamber, still include with the heating cavity of process chamber intercommunication, be provided with the base that is used for bearing the weight of the wafer in the process chamber, be provided with the bearing frame that is used for bearing the weight of the wafer in the heating cavity, still be provided with in the process chamber and pass the piece, pass the piece be used for the base with transmit the wafer between the bearing frame, still be provided with the heating member in the heating cavity, the heating member be used for heating bear in wafer on the bearing frame. The technical scheme can improve the processing efficiency of semiconductor process equipment.

Description

Semiconductor processing equipment and wafer processing method
Technical Field
The application belongs to the technical field of semiconductor processing, and particularly relates to semiconductor processing equipment and a processing method of a wafer.
Background
In the processing process of a semiconductor, magnetron sputtering is a common film preparation process, and particles in a target material are sputtered out and deposited on the surface of a substrate to form a film through bombardment of the target material. As the size of semiconductors is getting smaller, copper is currently mostly used as a material for forming interconnection lines in order to ensure reliability of the interconnection lines.
In the formation of copper interconnects, it is usually necessary to form trenches and vias on a substrate by photolithography, then form barrier layers and copper layers in the vias by physical vapor deposition, and finally fill the trenches and vias by electroplating. However, as the size of the semiconductor is gradually reduced, the aspect ratio of the through hole is gradually increased, so that during the process of depositing and forming the copper layer, the growth efficiency of the deposited copper layer at the opening of the through hole is too fast, the opening of the through hole is easily blocked, a void phenomenon is generated, and the semiconductor is discarded.
In order to solve the problem, the copper reflow technology attracts attention, the surface mobility and the grain agglomeration force of the physical vapor deposition copper at a low temperature are enhanced under the action of a high temperature (generally over 300 ℃), and under the diffusion action and the capillary action of an etched pore channel, copper atoms on the surface of a deposited copper film are migrated and flow into the bottom of an etched deep hole, so that the generation of a cavity in a channel can be avoided. The entire reflow process can be combined from multiple cycles, depending on the fill structure, until the deep hole is completely filled.
The heating device arranged for realizing copper reflux at present has a complex structure and lower processing efficiency.
Disclosure of Invention
The present application discloses a semiconductor processing apparatus and a method for processing a wafer, which at least solves one of the above technical problems.
The embodiment of the application provides a semiconductor process equipment, including the process chamber, still include with the heating cavity of process chamber intercommunication, be provided with the base that is used for bearing the weight of the wafer in the process chamber, be provided with the bearing frame that is used for bearing the weight of the wafer in the heating cavity, still be provided with the biography piece in the process chamber, the biography piece be used for the base with transmit the wafer between the bearing frame, still be provided with heating member in the heating cavity, heating member be used for the heating bear in bear the weight of the wafer on the frame.
In a second aspect, an embodiment of the present application discloses a method for processing a wafer, which is applied to the above semiconductor processing equipment, and the method includes:
transmitting a first wafer to the heating chamber to perform a heating process on the first wafer when the first wafer completes a first process on the pedestal of the process chamber;
and under the condition that the first wafer is removed from the base of the process chamber, transmitting a second wafer to the base of the process chamber so as to perform the first process on the second wafer, wherein the time period of performing the first process on the second wafer and the time period of performing the heating process on the first wafer at least partially overlap in time sequence.
In the technical scheme disclosed in the embodiment of the application, the heating chamber is arranged to install the heating element, the process chamber and the heating chamber can respectively provide a first process space and a second process space for the wafer, the base arranged in the process chamber can bear the wafer, the bearing frame arranged in the heating chamber can also bear the wafer, the heating element can heat the wafer borne on the bearing frame, the process chamber is also internally provided with the wafer transmission element, and the wafer transmission element can transmit the wafer between the base and the bearing frame. In the working process of the semiconductor process equipment, corresponding processes can be carried out in the first process space and the second process space, so that the processing efficiency of the semiconductor process equipment can be improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
FIG. 1 is a schematic diagram of a semiconductor processing apparatus according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a portion of a semiconductor processing apparatus disclosed in an embodiment of the present application;
FIG. 3 is an electron micrograph of a semiconductor processed using the semiconductor processing apparatus disclosed in the embodiments of the present application at different temperatures;
fig. 4 is a flowchart of a method for processing a wafer according to an embodiment of the present disclosure.
Description of reference numerals:
101-a first process space, 102-a second process space, 110-a process chamber, 120-a heating chamber, 130-a cover plate, 140-a top cover, 150-a base, 160-a magnetron sputtering assembly, 170-a target, 180-a screw,
200-a sheet-conveying piece,
310-a first carrying position, 320-a second carrying position,
400-heating element,
510-driver, 520-connecting shaft,
610-water inlet, 620-water outlet,
700-wafer.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Technical solutions disclosed in the embodiments of the present application are described in detail below with reference to the accompanying drawings.
As shown in fig. 1 and 2, the embodiment of the present application discloses a semiconductor processing apparatus, which includes a process chamber 110, and a heating chamber 120, wherein the heating chamber 120 is in communication with the process chamber 110. Of course, the semiconductor processing apparatus may further include structures such as a wafer carrier 200, a loading frame, a heating element 400, a top cover 140, and a base 150, and when the semiconductor processing apparatus is used to provide a sputtering process, the semiconductor processing apparatus may further include a magnetron sputtering assembly 160, and a target 170 is disposed between the magnetron sputtering assembly 160 and the base 150.
The process chamber 110 is a structure for accommodating the wafer 700 and other devices in the semiconductor processing equipment, the process chamber 110 has an inner cavity, the wafer 700 and the susceptor 150 can be accommodated in the inner cavity, and the susceptor 150 is used for carrying the wafer 700. As described above, in the semiconductor processing apparatus disclosed in this embodiment, the heating chamber 120 is disposed in communication with the processing chamber 110, the processing chamber 110 is configured to provide the first processing space 101 for the wafer 700, the heating chamber 120 is configured to provide the second processing space 102 for the wafer 700, both the two processing spaces may provide accommodating spaces for the wafer 700 to perform processes, and the sizes of the first processing space 101 and the second processing space 102, that is, the sizes of the processing chamber 110 and the heating chamber 120, may be determined according to actual requirements, and are not limited herein.
The first process space 101 and the second process space 102 are communicated with each other, in which case the wafer 700 can be switched between the first process space 101 and the second process space 102, which allows the wafer 700 to be moved to one of the first process space 101 and the second process space 102 to continue another process after the corresponding process is completed in the other of the first process space 101 and the second process space 102. In the process, the whole process environment of the semiconductor process equipment cannot be damaged, and the processing efficiency can be improved. In addition, in the working process of the semiconductor processing equipment, the first process space 101 and the second process space 102 may respectively perform corresponding processes, so that the processes in the first process space 101 and the second process space 102 are not interfered with each other, which may further improve the processing efficiency of the wafer 700.
A carrier is disposed in the heating chamber 120, and the carrier is capable of carrying the wafer 700, thereby providing a carrying function for the wafer 700 to perform a corresponding process in the second process space 102. The carrier may be a support, or the carrier may further include a plurality of pins, which may ensure the capability of the carrier to carry the wafer 700. The carrier may be fixedly mounted to the bottom or side of the heating chamber 120, or the carrier may be capable of moving relative to the process chamber 110 such that the carrier moves the wafer 700 carried thereon.
The wafer transfer 200 is installed in the process chamber 110, and the wafer transfer 200 can move the wafer 700 for transferring the wafer 700 between the susceptor 150 and the carrier, thereby enabling the wafer 700 to perform corresponding processes in the process chamber 110 and the heating chamber 120, respectively. The wafer transfer device 200 may be a robot, and the wafer 700 may be changed in position by the wafer transfer device 200. More specifically, the wafer 700 may be switched between the first process space 101 and the second process space 102 using the wafer transfer device 200. The wafer transfer device 200 may be installed at the bottom or the side of the process chamber 110, and the wafer transfer device 200 may fix the wafer 700 by grabbing or holding, and change the position of the wafer 700 by rotating or moving.
The heating chamber 120 is further provided with a heating element 400, the heating element 400 may be a resistance wire or other device having a heating capability, and the heating element 400 may be fixed at a top, a side or a bottom of the heating chamber 120 to provide a heating effect for the wafer 700 carried on the carrier, so as to raise the temperature of the wafer 700.
In the technical solution disclosed in the embodiment of the present application, the heating chamber 120 is disposed to mount the heating element 400, the process chamber 110 and the heating chamber 120 may respectively provide the first process space 101 and the second process space 102 for the wafer 700, the susceptor 150 disposed in the process chamber 110 may bear the wafer 700, the bearing frame disposed in the heating chamber 120 may also bear the wafer 700, the heating element 400 may heat the wafer 700 borne on the bearing frame, the process chamber 110 is further disposed with the wafer transferring element 200, and the wafer 700 may be transferred between the susceptor 150 and the bearing frame by the wafer transferring element 200. In the working process of the semiconductor process equipment, corresponding processes can be performed in both the first process space 101 and the second process space 102, which can improve the processing efficiency of the semiconductor process equipment.
Optionally, after the wafer 700 is processed by the semiconductor processing equipment, and a barrier layer and a copper layer are formed in the wafer 700 in the first process space 101, the wafer 700 after the previous process is completed is moved to the carrier of the second process space 102 under the action of the wafer transfer member 200, and a copper reflow process is performed under the heating action of the heating member 400, so that the copper material on the upper surface of the wafer 700 flows to the bottoms of the sink and the through hole on the wafer 700 under a high temperature condition, thereby preventing the occurrence of a void phenomenon and improving the yield of the wafer 700.
As described above, in the process of forming the interconnection line by using the semiconductor processing equipment, a deposition process may be performed in the first process space 101, then the wafer 700 in the first process space 101 is moved to the carrier of the second process space 102 by using the wafer transferring member 200, and then the next wafer 700 may be continuously introduced into the first process space 101, and meanwhile, the heating member 400 in the second process space 102 operates to perform the copper reflow process on the wafer 700, obviously, the processes between the first process space 101 and the second process space 102 do not interfere with each other, which may improve the processing efficiency of the semiconductor processing equipment; thereafter, when the wafer 700 in the second process space 102 completes the copper reflow process, the wafer 700 may be transferred back to the first process space 101 by the transfer device 200 for cooling, or the wafer 700 may be transferred out of the process chamber 110 and transferred into the process chamber 110 of another semiconductor process equipment for cooling, and accordingly, the wafer 700 that was previously deposited in the first process space 101 may be continuously transferred into the second process space 102 and heated for performing the copper reflow process. Of course, the above-mentioned process is only one of the processes that can be performed by the semiconductor processing equipment disclosed in the embodiments of the present application, and other processes, such as other reflow processes, can also be performed by using the above-mentioned semiconductor processing equipment, and are not listed here.
In the above process, in order to enable the positions of the wafers 700 in the first process space 101 and the second process space 102 to be interchanged, optionally, the number of the wafer conveying pieces 200 is multiple, and the multiple wafer conveying pieces 200 respectively provide a shifting effect for the wafers 700 in the first process space 101 and the second process space 102, so as to shorten the process interval and improve the processing efficiency.
In another embodiment of the present application, optionally, as shown in fig. 1, the number of the wafer transferring members 200 may be one, and the carrier is provided with a first carrying position 310 and a second carrying position 320, and both the first carrying position 310 and the second carrying position 320 can carry the wafer 700. In this case, at least two wafers 700 can be carried by the carrier, so that the wafer 700 can be exchanged between the first process space 101 and the second process workpiece under the action of one wafer transfer member 200. Under the condition that the number of the wafer transmission pieces 200 is one, on one hand, the cost and the control difficulty of semiconductor process equipment can be reduced, and on the other hand, the occupation amount of the wafer transmission pieces 200 to the space in the semiconductor process equipment can be reduced, so that the size of the process chamber 110 is reduced.
Specifically, the first carrying positions 310 and the second carrying positions 320 may be distributed in various directions, and optionally, the first carrying positions 310 and the second carrying positions 320 are arranged flush in the carrying direction, in which case the heating member 400 may be arranged on the top wall of the heating chamber 120, in which case the heating member 400 can ensure that the wafer 700 can be reliably and efficiently heated regardless of whether the wafer 700 is carried at the first carrying positions 310 or the second carrying positions 320.
In another embodiment of the present application, optionally, the first carrying positions 310 and the second carrying positions 320 are distributed along a vertical direction, in which case, the planar space occupied by the first carrying positions 310 and the second carrying positions 320 may be reduced, and the sheet conveying distance of the sheet conveying member 200 may be shortened to some extent. Specifically, the first bearing position 310 and the second bearing position 320 may each include a bracket, and the two brackets form a preset distance in the vertical direction. Correspondingly, during the operation of the semiconductor processing equipment, the wafer transfer device 200 can transfer the wafer 700 on the pedestal 150 to the first loading position 310 or the second loading position 320, and transfer the wafer 700 on the first loading position 310 or the second loading position 320 to the pedestal 150.
It should be noted that the wafer 700 on the base 150 can be transferred to the first carrying position 310 and also can be transferred to the second carrying position 320, and similarly, the wafer 700 carried on the first carrying position 310 and the second carrying position 320 can be transferred to the base 150 by the sheet transferring device 200, only the wafer 700 on the base 150 can be transferred to one of the first carrying position 310 and the second carrying position 320 at the same time point, and correspondingly, the wafer 700 on one of the first carrying position 310 and the second carrying position 320 can be transferred to the base 150.
In the above technical solution, in order to ensure that the wafer transfer device 200 has the capability of transferring the wafer 700 to the first carrying position 310 and the second carrying position 320, the wafer transfer device 200 may have a lifting capability, that is, the wafer transfer device 200 may move in a vertical direction, so that when the wafer transfer device 200 transfers the wafer 700 to the first carrying position 310 and the second carrying position 320 having different heights, the wafer transfer device 200 may enable the transferred wafer 700 to correspond to the heights of the corresponding carrying structures (including the first carrying position 310 and the second carrying position 320) in a lifting or lowering manner, and then, with the rotation of the wafer transfer device 200, the wafer 700 may be transferred to the upper side of the corresponding carrying structure, and then, the wafer transfer device 200 descends to enable the wafer 700 to be carried on the corresponding carrying structure.
Alternatively, the semiconductor processing equipment provided by the embodiment of the present application may further include a driver 510, and the carrier is connected to the driver 510, so that the carrier is driven by the driver 510 to move in the vertical direction. In the case of this configuration, the sheet-conveying member 200 may be provided with only a rotation capability. By engaging the carrier with the wafer transfer device 200, the wafer 700 on the susceptor 150 can be transferred to the first loading position 310 or the second loading position 320 by the wafer transfer device 200. In this case, the movement of the sheet conveying member 200 can be made more simple, thereby reducing the difficulty in controlling the sheet conveying member 200 and improving the reliability of the sheet conveying member 200. Specifically, the driver 510 may be a linear motor, etc., the driver 510 may be installed outside the process chamber 110, and the driver 510 and the carrier may be connected together by a connecting shaft 520, etc., so as to ensure that the driver 510 can drive the carrier to move along the carrying direction.
In the case that the first and second carrying positions 310 and 320 are distributed in the vertical direction, optionally, the heating members 400 are disposed above and below the carrying frame in the vertical direction, and the heating members 400 are fixed on the inner sidewall of the heating chamber 120. With the above-described solution, the heat generated by the heating element 400 can act on the wafer 700 regardless of whether the wafer 700 is carried at the first carrying position 310 or the second carrying position 320. In addition, the upper surface of the wafer 700 supported on the supporting frame can be directly heated by the heating element 400 above the supporting frame, so that the heating efficiency of the copper material on the upper surface of the wafer 700 is further improved, the heating time of the wafer 700 can be shortened, and the processing efficiency is improved. Under the action of the heating element 400 positioned below the bearing frame, the wafer 700 can be heated at the bottom surface of the wafer 700, so that the temperature of the whole wafer 700 is ensured to be more uniform, and the process effect of copper reflow is further improved. More specifically, in the vertical direction, the distance between the heating element 400 located above the carriage and the first carrying position 310 and the distance between the heating element 400 located below the carriage and the second carrying position 320 may be 20mm to 30mm, respectively.
Further, as shown in fig. 1, a plurality of heating members 400 are provided on a sidewall of the heating chamber 120 to be spaced apart from each other in a vertical direction, wherein an interval between the adjacent heating members 400 may be determined according to practical circumstances and is not limited herein. For example, the heating members 400 above and below the carriers may be distributed in a vertical direction. In this case, the thermal uniformity of the wafer 700 carried on the first carrying position 310 and the second carrying position 320 may be relatively better.
Further, as shown in fig. 2, a plurality of heating members 400 are disposed at intervals in the vertical direction on opposite sides of the carrier in a direction perpendicular to the vertical direction, or in a direction perpendicular to the carrying direction of the carrier. In this case, the opposite sides of the wafer 700 supported by the first supporting portion 310 and the second supporting portion 320 may be heated by the heating element 400, so that the heating efficiency of the wafer 700 may be further improved, the uniformity of the wafer 700 being heated may be improved, and the process effect may be improved when the wafer 700 is heated from the opposite sides of the wafer 700.
In more detail, the heating element 400 may be fixed on an inner sidewall of the heating chamber 120, and specifically, the heating element 400 may be a heating lamp which may be fixed on the inner sidewall of the heating chamber 120 through a lamp socket, and by externally connecting a power source to the lamp socket, a heating effect may be provided to the wafer 700 supported on the first supporting position 310 and the second supporting position 320 by the heating element 400 mounted on the inner sidewall of the heating chamber 120.
In order to further improve the uniformity of the heating of the wafer 700 carried on the carrier, optionally, the semiconductor processing apparatus disclosed in this embodiment of the present application may further include a driver 510, wherein the carrier is connected to the driver 510, and the driver 510 can drive the carrier to rotate around a central axis of the carrier, so that in the case that the wafer 700 is carried on the carrier, the driver 510 can be used to drive the carrier to rotate, so as to further improve the uniformity of the heating of the wafer 700. In particular, the driver 510 may be a rotating motor, which may be installed outside the heating chamber, and the driver 510 may be connected with the carrier by a connecting shaft 520, ensuring that the driver 510 has the capability of driving the carrier to rotate.
In the process of promoting the copper material on the upper surface of the wafer 700 to flow into the bottom of the through hole and the sink by using a heating manner, as shown in fig. 3, the temperature of the wafer 700 is increased, and the effect of the copper reflow process is relatively better, based on which, the heated temperature of the wafer 700 may specifically exceed 150 ℃, and further, since the top agglomeration phenomenon is more obvious under the condition that the heated temperature of the wafer 700 is increased, the heating temperature can be controlled between 175 ℃ and 225 ℃, so as to ensure that the copper reflow process has the best process effect.
As described above, the process chamber 110 and the heating chamber 120 are communicated with each other, specifically, the process chamber 110 and the heating chamber 120 may be formed by integral molding, or the process chamber 110 and the heating chamber 120 may also be formed by separate molding, and the process chamber 110 and the heating chamber 120 are fixedly connected into a whole by welding or the like, in this technical solution, an opening is provided on a sidewall of the process chamber 110, and the heating chamber 120 is in sealed connection with the process chamber 110 at the opening, so as to ensure that the semiconductor processing equipment can form a sealed process environment.
In addition, the top wall of the heating chamber 120 is provided with an access hole, so that in the use process of the semiconductor processing equipment, devices such as the bearing frame, the heating element 400 and the like which are arranged in the heating chamber 120 and the heating chamber 120 can be overhauled by using the access hole, and the overhauling difficulty can be reduced. Meanwhile, the access opening is detachably covered with a cover plate 130, so as to provide the wafer 700 with a second process space 102 meeting the requirements. Specifically, the shape and size of the cover plate 130 may be designed correspondingly according to the shape and size of the access opening of the heating chamber 120, and the cover plate 130 and the heating chamber 120 may form a detachably fixed connection relationship through a connector such as a screw 180.
As described above, the heating member 400 is installed on the heating chamber 120, and the heating member 400 may be installed on the inner sidewall of the heating chamber 120, in which case the heat of the heating member 400 can be transferred to the inner wall of the heating chamber 120, and based on this, the semiconductor process apparatus provided in the embodiment of the present application may further include a cooling mechanism, which is optionally disposed outside the sidewall of the heating chamber 120 to cool the outer wall of the heating chamber 120 by means of the cooling mechanism, thereby preventing workers from being burned due to contact with the outer wall of the heating chamber 120. Specifically, the cooling mechanism may be a water cooling mechanism, which may include a water inlet 610 and a water outlet 620, and the heating chamber 120 may be cooled by cooling water by attaching a cooling pipeline of the cooling mechanism to an outer wall of the heating chamber 120.
Based on the semiconductor process equipment disclosed by the above embodiment, the embodiment of the application further discloses a semiconductor heating method, which comprises the following steps:
s1, transferring the first wafer to the heating chamber to perform the heating process on the first wafer when the first wafer completes the first process on the susceptor of the process chamber. As described above, after the wafer is subjected to the conventional processes such as deposition, i.e., the first process, the wafer needs to be heated, so that the processing effect of the wafer is relatively better. Specifically, based on the semiconductor processing equipment disclosed in the above embodiment, the process chamber is provided with the pedestal, and the pedestal can provide a bearing and supporting effect for the wafer, so that the wafer can be borne on the pedestal when the process chamber performs the first process. The semiconductor processing equipment further comprises a wafer transfer piece, the wafer transfer piece can transfer the wafer so as to transfer the first wafer into the heating chamber, correspondingly, a bearing frame is arranged in the heating chamber, the first wafer transferred into the heating chamber can be borne on the bearing frame, and the wafer transfer piece can transfer the wafer between the base and the bearing frame.
Based on the step S1, as shown in fig. 4, the processing method disclosed in this embodiment further includes:
s2, transferring the second wafer on the susceptor of the process chamber under the condition that the first wafer is removed from the susceptor of the process chamber, so that the second wafer is supported on the susceptor, providing a basic condition for the second wafer to perform the first process, and accordingly, after the second wafer is supported on the susceptor, considering that the first process can be performed on the second wafer.
As described above, the first wafer originally carried on the susceptor of the process chamber is transferred to the heating chamber, and after the first wafer is removed from the susceptor, the second wafer may be continuously transferred onto the susceptor, at this time, the first wafer and the second wafer are respectively disposed in the heating chamber and the process chamber, and both of them respectively need to perform the heating process and the first process, and based on this, in the above step S2, the time period of performing the first process by the second wafer and the time period of performing the heating process by the first wafer at least partially overlap in time sequence. In short, in the process of performing the first process on the second wafer in the process chamber, the heating process on the first wafer in the heating chamber is also performed correspondingly, the start time point and the end point of the two processes may be the same or different, and the start sequence of the two processes may also be selected according to the actual situation, which is not limited herein. By adopting the technical scheme, the processing efficiency of the wafer is relatively higher.
Further, the first carrying position and the second carrying position are arranged on the carrying frame along the vertical direction, and since the technical scheme that the carrying frame comprises the first carrying position and the second carrying position is described in detail above, the text is concise, and therefore the detailed description is omitted here. Based on the foregoing technical solution, in the processing method disclosed in the embodiment of the present application, the step S1 includes:
s11, when the first wafer completes the first process on the susceptor of the process chamber, the first wafer is transferred to the first loading position of the loading frame in the heating chamber to perform the heating process on the first wafer. That is, in a case that the carrier includes the first carrying location and the second carrying location, when the first wafer of the first process is transferred, the first wafer may be transferred onto the first carrying location of the carrier, so that the first wafer is heated at the first carrying location.
Moreover, based on the technical solution that the carrier includes the first carrying location and the second carrying location, when the first wafer is transferred onto the first carrying location, the second processing location of the carrier is still in a vacant state, and further, in the processing method, after the step S2, the method further includes:
s3, transferring the second wafer to a second loading position of the loading frame in the heating chamber to perform a heating process on the second wafer when the first process is completed on the susceptor of the process chamber. That is, the second wafer having completed the first process is also transferred to the heating chamber, and the second wafer is supported by the second support position, so that the pedestal of the process chamber is vacant again, and after the first wafer has completed the heating process, the pedestal of the process chamber can be used to support the first wafer again, and the process chamber is used to provide an environment for performing the second process for the first wafer, specifically, in the processing method disclosed in the embodiment of the present application, the step S3 is followed by:
s4, transferring the first wafer to a susceptor of the process chamber to perform a second process on the first wafer when the first wafer completes the heating process on the first carrying position of the heating chamber. As described above, when the second wafer is transferred to the second loading position, the first wafer may be transferred back to the susceptor of the empty process chamber, and the second process may be performed on the first wafer by using the process chamber.
In step S4, the time period during which the first wafer is subjected to the second process and the time period during which the second wafer is subjected to the heating process at least partially overlap in time sequence. That is, during the second process performed on the first wafer, the second wafer may also be subjected to the heating process, the start time point and the end time point of the two processes may be the same or different, and the sequence of the start of the two processes may be selected according to actual situations, which is not limited herein. Under the condition of adopting the technical scheme, the processing efficiency of the semiconductor processing equipment can be further improved.
In the embodiments of the present application, the difference between the embodiments is described in detail, and different optimization features between the embodiments can be combined to form a better embodiment as long as the differences are not contradictory, and further description is omitted here in view of brevity of the text.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (10)

1. The semiconductor processing equipment comprises a process chamber and is characterized by further comprising a heating chamber communicated with the process chamber, wherein a base used for bearing a wafer is arranged in the process chamber, a bearing frame used for bearing the wafer is arranged in the heating chamber, a wafer conveying piece is further arranged in the process chamber, the wafer conveying piece is used for conveying the wafer between the base and the bearing frame, a heating piece is further arranged in the heating chamber, and the heating piece is used for heating the wafer borne on the bearing frame.
2. The semiconductor processing apparatus of claim 1, wherein the carrier has a first carrying position and a second carrying position vertically disposed thereon, and the wafer transfer device is configured to transfer the wafer on the susceptor to the first carrying position or the second carrying position and to transfer the wafer on the first carrying position or the second carrying position to the susceptor.
3. The semiconductor processing apparatus of claim 2, wherein the heating elements are disposed above and below the carrier in the vertical direction, the heating elements being fixed to an inner sidewall of the heating chamber.
4. The semiconductor processing apparatus of claim 2, further comprising a drive coupled to the carrier for driving the carrier to move in a vertical direction and/or rotate about a central axis of the carrier.
5. The semiconductor processing apparatus of claim 2, wherein the heating chamber has a plurality of heating elements spaced apart from each other along the vertical direction on a sidewall thereof.
6. The semiconductor processing apparatus of any one of claims 2-5, wherein the heating element is a heating lamp.
7. The semiconductor processing equipment according to claim 1, wherein an opening is provided on a side wall of the process chamber, the heating chamber is hermetically connected with the process chamber at the opening, the heating chamber is communicated with the process chamber through the opening, an access opening is provided on a top wall of the heating chamber, and a cover plate is detachably covered on the access opening.
8. The semiconductor processing apparatus of claim 1, wherein a cooling mechanism is further provided outside the heating chamber for cooling an outer wall of the heating chamber.
9. A method for processing a wafer, which is applied to the semiconductor process equipment according to any one of claims 1 to 8, wherein the method comprises:
transmitting a first wafer to the heating chamber to perform a heating process on the first wafer when the first wafer completes a first process on the pedestal of the process chamber;
and under the condition that the first wafer is removed from the base of the process chamber, transmitting a second wafer to the base of the process chamber so as to perform the first process on the second wafer, wherein the time period of performing the first process on the second wafer and the time period of performing the heating process on the first wafer at least partially overlap in time sequence.
10. The processing method as claimed in claim 9, wherein the carrier has a first carrying position and a second carrying position arranged vertically thereon, the wafer transfer device is used for transferring the wafer on the pedestal to the first carrying position or the second carrying position and transferring the wafer on the first carrying position or the second carrying position to the pedestal,
the transferring the first wafer to the heating chamber to perform a heating process on the first wafer upon completion of the first process on the pedestal of the process chamber includes:
transferring a first wafer to the first loading position of the loading frame in the heating chamber to perform the heating process on the first wafer when the first wafer completes the first process on the base of the process chamber;
the method further comprises, after transferring a second wafer on the pedestal of the process chamber to perform the first process on the second wafer while the first wafer is removed from the pedestal of the process chamber, further comprising:
transferring the second wafer to the second loading position of the loading frame in the heating chamber to perform the heating process on the second wafer when the second wafer completes the first process on the susceptor of the process chamber;
and under the condition that the first wafer completes the heating process on the first bearing position of the heating chamber, transmitting the first wafer to the base of the process chamber so as to perform a second process on the first wafer, wherein the time period of performing the second process on the first wafer and the time period of performing the heating process on the second wafer at least partially overlap in time sequence.
CN202111163054.6A 2021-09-30 2021-09-30 Semiconductor processing equipment and wafer processing method Pending CN113921456A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202111163054.6A CN113921456A (en) 2021-09-30 2021-09-30 Semiconductor processing equipment and wafer processing method
TW111136551A TW202316603A (en) 2021-09-30 2022-09-27 Semiconductor process equipment and wafer processing method
PCT/CN2022/121573 WO2023051496A1 (en) 2021-09-30 2022-09-27 Semiconductor processing device and wafer processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111163054.6A CN113921456A (en) 2021-09-30 2021-09-30 Semiconductor processing equipment and wafer processing method

Publications (1)

Publication Number Publication Date
CN113921456A true CN113921456A (en) 2022-01-11

Family

ID=79237616

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111163054.6A Pending CN113921456A (en) 2021-09-30 2021-09-30 Semiconductor processing equipment and wafer processing method

Country Status (3)

Country Link
CN (1) CN113921456A (en)
TW (1) TW202316603A (en)
WO (1) WO2023051496A1 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114927461A (en) * 2022-07-01 2022-08-19 北京北方华创微电子装备有限公司 Wafer bearing device and semiconductor process equipment
WO2023051496A1 (en) * 2021-09-30 2023-04-06 北京北方华创微电子装备有限公司 Semiconductor processing device and wafer processing method
CN116695086A (en) * 2023-06-30 2023-09-05 北京北方华创微电子装备有限公司 Process chamber, semiconductor process equipment and thin film deposition method
CN117867454A (en) * 2024-03-12 2024-04-12 无锡尚积半导体科技有限公司 PVD improves device of metal film backward flow efficiency
CN117867454B (en) * 2024-03-12 2024-06-04 无锡尚积半导体科技有限公司 Device for improving metal film reflow efficiency by PVD

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102560373B (en) * 2010-12-16 2014-12-17 北京北方微电子基地设备工艺研究中心有限责任公司 Substrate heating chamber, method using same, and substrate processing equipment
CN105088151A (en) * 2014-04-15 2015-11-25 北京北方微电子基地设备工艺研究中心有限责任公司 Pore deposition process on substrate, and semiconductor processing equipment
CN105441876B (en) * 2014-09-02 2019-04-23 北京北方华创微电子装备有限公司 A kind of film deposition equipment
CN111986976B (en) * 2019-05-22 2022-04-22 北京北方华创微电子装备有限公司 Process chamber and semiconductor processing equipment
US11205589B2 (en) * 2019-10-06 2021-12-21 Applied Materials, Inc. Methods and apparatuses for forming interconnection structures
CN113921456A (en) * 2021-09-30 2022-01-11 北京北方华创微电子装备有限公司 Semiconductor processing equipment and wafer processing method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023051496A1 (en) * 2021-09-30 2023-04-06 北京北方华创微电子装备有限公司 Semiconductor processing device and wafer processing method
CN114927461A (en) * 2022-07-01 2022-08-19 北京北方华创微电子装备有限公司 Wafer bearing device and semiconductor process equipment
CN114927461B (en) * 2022-07-01 2023-08-18 北京北方华创微电子装备有限公司 Wafer carrying device and semiconductor process equipment
CN116695086A (en) * 2023-06-30 2023-09-05 北京北方华创微电子装备有限公司 Process chamber, semiconductor process equipment and thin film deposition method
CN116695086B (en) * 2023-06-30 2024-04-16 北京北方华创微电子装备有限公司 Process chamber, semiconductor process equipment and thin film deposition method
CN117867454A (en) * 2024-03-12 2024-04-12 无锡尚积半导体科技有限公司 PVD improves device of metal film backward flow efficiency
CN117867454B (en) * 2024-03-12 2024-06-04 无锡尚积半导体科技有限公司 Device for improving metal film reflow efficiency by PVD

Also Published As

Publication number Publication date
WO2023051496A1 (en) 2023-04-06
TW202316603A (en) 2023-04-16

Similar Documents

Publication Publication Date Title
CN113921456A (en) Semiconductor processing equipment and wafer processing method
TWI606542B (en) Process chamber and semiconductor processing apparatus
KR102498550B1 (en) Process chambers and semiconductor processing devices
KR100778958B1 (en) Stacked annealing system
KR100818044B1 (en) Substrate pedestal and substrate transfer equipment and substrate processing system and method using the same
KR101930555B1 (en) Substrate processing system, substrate processing method and storage medium for computer
CN113981416B (en) Multifunctional wafer pretreatment cavity and chemical vapor deposition equipment
KR101932777B1 (en) Substrate processing apparatus and substrate processing method
CN112397418A (en) Support unit, substrate processing apparatus including the same, and substrate processing method
CN214313127U (en) Film growth system, substrate tray and carrier ring assembly
KR101035828B1 (en) Chamber for uniform substrate heating
KR102584511B1 (en) Supproting unit and substrate treating apparutus including the same
JP4933409B2 (en) Semiconductor manufacturing apparatus and semiconductor manufacturing method
US20110039410A1 (en) Apparatus and Method for Substrate Electroless Plating
KR20220166758A (en) Substrate treating system with substrate transporting apparatus
CN108470704B (en) Pass piece cavity and semiconductor processing equipment
KR101394109B1 (en) Substrate processing apparatus and Substrate processing system
CN108611615B (en) Substrate table for magnetron sputtering coating
CN114686858B (en) Film growth system, substrate tray and carrier ring assembly
CN116695086B (en) Process chamber, semiconductor process equipment and thin film deposition method
KR102099109B1 (en) Apparatus for treating substrate and methods of treating substrate
KR20100093994A (en) Wafer processing system
JP4410152B2 (en) Substrate processing system
CN103794533B (en) Buanch unit and control method thereof and utilize it to process the apparatus and method of substrate
JP2006339227A (en) Processing system and processing method of substrate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination