CN113904998A - Switch state indication method and device - Google Patents
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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Abstract
The present specification provides a method and an apparatus for indicating a switch status, where the method includes: receiving level signals sent by a plurality of universal interfaces of a switching chip; determining a target switch interface plug-in card indicated by a level signal sent by the plurality of universal interfaces, wherein the target switch interface plug-in card is at least one of the plurality of interface plug-in cards connected in the switch; receiving a clock signal and a data signal of the exchange chip, and obtaining a lighting signal according to the clock signal and the data signal; and the lighting signal is utilized to control an indicator lamp of the target switch interface card. According to the switch state indicating method and device, the level signals sent by the universal interfaces are used for indicating the target switch interface plug-in card, and when the plug-in cards work on the same switch, the port indicating lamp of the plug-in card can still work normally.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for indicating a switch status.
Background
The interface card of the switch equipment is a flexible switch port configuration scheme, and users can select different types of cards according to own requirements, for example: 8 or 4 optical fiber interface plug-in cards; 8 or 4 electrical interface cards, etc. Each port on the plug-in card is provided with an indicator light to indicate the state of the data interaction link, the indicator light is lightened to indicate that the link is communicated, and the indicator light is extinguished to indicate that the link is not connected.
In the related art, the implementation manner of card-inserted lighting is as follows: the switching chip of the exchanger sends out clock signals and data signals, the clock signals and the data signals are sent to the CPLD of the plug-in card through the connector, the CPLD processes and analyzes the signals and converts the signals into level signals to control the plug-in card port indicator lamp. However, as the number of the clock signals output by the switch is increased along with the continuous upgrading and improvement of the switch and the increase of the number of the ports of the switch, a single card is difficult to meet the requirement, and a plurality of cards are required to meet the processing work of the clock signals in the same switch; in addition, the number of clock signals output by switches of different models is also different, and when the number of the plug-in cards is increased or the switches are replaced, the CPLD logic of the plug-in cards needs to be updated and maintained to adapt to different switch models, or the hardware design of the plug-in cards needs to be performed again.
In the existing scheme, under the condition that a plurality of plug-in cards are simultaneously placed into one switch, a port indicator lamp cannot normally work, and CPLD (complex programmable logic device) logic or plug-in card hardware needs to be newly designed, so that inconvenience is brought to a user.
Disclosure of Invention
In view of the above, the present application provides a method and an apparatus for indicating a switch status.
Specifically, the method is realized through the following technical scheme:
the application provides a switch state indication method, which comprises the following steps:
receiving level signals sent by a plurality of universal interfaces of a switching chip;
determining a target switch interface plug-in card indicated by a level signal sent by the plurality of universal interfaces, wherein the target switch interface plug-in card is at least one of the plurality of interface plug-in cards connected in the switch;
receiving a clock signal and a data signal of the exchange chip, and obtaining a lighting signal according to the clock signal and the data signal;
and the lighting signal is utilized to control an indicator lamp of the target switch interface card.
The present application further provides a switch status indication device, the device includes:
the level receiving module is used for receiving level signals sent by a plurality of universal interfaces of the switching chip;
a card insertion determining module, configured to determine a target switch interface card indicated by a level signal sent by the multiple general interfaces, where the target switch interface card is one of multiple interface cards connected in a switch;
the signal analysis module is used for receiving a clock signal and a data signal of the exchange chip and obtaining a lighting signal according to the clock signal and the data signal;
and the signal output module is used for controlling an indicator lamp of the interface card of the target switchboard by utilizing the lighting signal.
According to the switch state indicating method and device, the level signals sent by the universal interfaces are used for indicating the target switch interface plug-in card, and when the plug-in cards work on the same switch, the port indicating lamp of the plug-in card can still work normally.
Drawings
In order to more clearly illustrate the technical solutions in the present specification, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments described in one or more embodiments of the present specification, and it is obvious for a person skilled in the art to obtain other drawings based on these drawings without any creative effort.
Fig. 1 is a flow chart of a method for indicating a switch status according to an exemplary embodiment of the present application;
fig. 2 is a flow chart illustrating a method for determining a card insertion for a switch according to an exemplary embodiment of the present application;
FIG. 3 is a flow chart of a method for indicating lamp fault detection in accordance with an exemplary embodiment of the present application;
FIG. 4 is a flow chart of a clock signal counting method according to an exemplary embodiment of the present application;
fig. 5 is a schematic diagram illustrating a switch status indication structure according to an exemplary embodiment of the present application;
fig. 6 is a schematic diagram of a switch status indication apparatus according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present specification. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the specification, as detailed in the appended claims.
The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the description. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, the first information may also be referred to as second information, and similarly, the second information may also be referred to as first information, without departing from the scope of the present specification. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
Embodiments of the present application will be described in detail below with reference to the accompanying drawings.
At present, the configuration of the switch ports is usually realized by using interface cards of the switch equipment, and each port on the card has an indicator light to indicate the status of the data interaction link. The prior art realizes the operation of inserting cards in the following way: the clock signal and the DATA signal sent by the two pins (LED _ CLK and LED _ DATA) of the exchange chip are received and processed and analyzed, the analyzed level signal is output through the pins from the LED0 to the LED7, and the operation of the plug-in card port indicator lamp is controlled according to the high and low levels. However, according to the scheme, because the lighting signal distribution function is not provided, when a plurality of plug-in cards are simultaneously put into one switchboard, the port indicator lamps of the plug-in cards cannot work normally; meanwhile, when the port indicator lamp of the plug-in card is not on, whether the hardware fault problem exists in the plug-in card indicator lamp cannot be automatically detected; in addition, when the number of the clock signals output by the switching chip is increased to exceed the maximum number which can be received by the plug-in card, the register overflows, and the port indicator light cannot work normally.
An exemplary embodiment of the present application shows a flow chart of a switch card determination method as shown in fig. 1, and an execution subject of the method may be a logic device.
In step S101, level signals sent by a plurality of general interfaces of the switch chip are received.
In the present application, the switching chip outputs a plurality of level signals through a general-purpose interface. The number of the level signals can be set according to needs. In an alternative aspect of the present application, the switch and the logic device may be connected by a connector.
In step S102, a target switch interface card indicated by a level signal sent by the plurality of universal interfaces is determined, where the target switch interface card is at least one of a plurality of interface cards connected in a switch.
The signal receiving ports on the logic device correspond to the universal interfaces of the switching chip one by one, and after receiving the level signal sent by the switching chip, the insertion card indicated by the switching chip can be determined according to the level signal.
For example, in the case where the cards include a first card and a second card, the first card may be determined to be targeted according to a level signal output from the plurality of common interfaces.
In step S103, a clock signal and a data signal of the switch chip are received, and a lighting signal is obtained according to the clock signal and the data signal.
The above signals can be obtained through the LED serial interface of the switching chip, which typically includes two pins: and the two pins respectively output a clock signal and a DATA signal as LED state information. After receiving the signals, the logic device analyzes the signals into corresponding level signals to serve as port indicator lamp lighting signals of the switch card.
In step S104, the lighting signal is used to control an indicator of the target switch interface card:
and after the corresponding level signal is obtained and used as a port indicator lamp signal of the switch card, the LED corresponding to each port is driven to realize the work of lighting, extinguishing or flickering and the like.
By the method, the level signals sent by the universal interfaces are used for indicating the target switch interface card, so that when a plurality of cards work on the same switch, the port indicator lamps of the cards can still work normally.
In some embodiments, a target switch card determination method is shown in flowchart form in fig. 2, and includes steps S102-1 through S102-3.
In step S102-1, a level sequence corresponding to the level signal is obtained according to the level signal sent by the plurality of general interfaces of the switch chip.
In one example, the switch chip may send two level signals, a first high level signal and a second low level signal, respectively, through two general interfaces, and the logic device may obtain a sequence of the level signals and a level high-low state. In this example, the logic device may determine that its first universal interface receive signal is high and its second universal interface receive signal is low.
In step S102-2, the level sequence is converted into a binary data signal.
In one example, the determined sequence of levels may be: the first general interface receives signals with high level, and the second general interface receives signals with low level, and then the level sequence is converted into binary data signals, and the specific implementation mode is as follows: the high electrical level corresponds to binary digit 1, the low electrical level corresponds to binary digit 0, and after conversion, the obtained binary data signal is: 10.
in step S102-3, the data register address of the target switch interface card is obtained according to the binary data signal.
In one example, a switch chip may issue level signals from two general purpose interfaces, and a logic device may receive signals through two signal receiving ports: the level sequences obtained by the first general interface and the second general interface coexist in four situations: low level signals, low level signals; low level signals, high level signals; high level signals, low level signals; high level signal, high level signal. The binary data signals into which the level sequence is converted are: 00. 01, 10, 11. Each binary data signal corresponds to the data register address of one switch interface card, that is, the level signal sent by the switch chip through two general interfaces can be used for supporting the normal operation of the port indicator lamps of 4 cards.
By the method, the data register address of the interface card of the switchboard is determined by acquiring the level signal of the exchange chip.
It is understood that in the specific implementation, the number of level signals sent by the switch chip is not limited, and the larger the number of level signals, the larger the number of plug-in cards that can be supported by the switch chip. For example, when the switch chip sends 3 level signals at the same time, a total of 8 corresponding level sequences and 8 binary data signals can be obtained, and at this time, the switch chip can be used to support the normal operation of the port indicator lamps of 8 plug-in cards. That is, if n level signals sent by the switch chip are received, the 2^ n plug-in cards can work on the same switch at most.
In one example, the present application further provides a method for indicating a fault condition of the indicator light through an illumination state, which includes the following specific steps:
and receiving a set detection clock signal.
The logic device receives a detection clock signal with a fixed frequency sent by the switching chip or any other port, and the clock signal can be input into the logic device through the connector. It is to be understood that the frequency value is not particularly limited, and in one example of the present application, a detection clock signal with a fixed frequency of 25M is selected.
The detection clock signal is divided into setting clock signals.
The logic device divides the frequency of the received detection clock signal. The frequency dividing step can be realized by arranging a clock frequency divider circuit in the logic device, the clock frequency divider circuit can be divided into a digital frequency divider, an analog frequency divider, a radio frequency divider and the like, and the specific design mode and the set frequency of the frequency dividing circuit are not limited in the application. In one example of the present application, a set clock signal of 1Hz is generated by dividing a detection clock signal of a fixed frequency of 25M.
And controlling the indicator lamps to alternately light on and light off at the frequency of the set clock signal.
And outputting the setting clock signal obtained by frequency division from a pin of the switchboard plug-in card to indicate the plug-in card port indicator lamp to alternately turn on and off at the frequency of the setting clock signal. At this time, whether the indicator lamp has a hardware fault can be directly judged by observation: under the condition that the indicator lamp is normally and alternately turned on and off at the frequency of the set clock signal, the indicator lamp can be determined to be in a good state, and no hardware fault exists; in the case where the indicator lamp cannot be alternately turned on or off at the frequency of the set clock signal or even is normally off, it can be determined that there is a hardware failure in the indicator lamp.
In one example, the present application further includes a method for triggering execution of the above-mentioned fault condition indicating the indicator light through the lighting state by receiving the detection signal, and the specific steps are as follows:
and receiving a detection signal sent by a universal interface of the exchange chip, wherein the detection signal is a first state electric signal or a second state electric signal.
The logic device is provided with a universal interface which is independently corresponding to the universal interface of the exchange chip and is used for receiving a detection signal sent by the exchange chip, the detection signal can be divided into a first state electric signal and a second state electric signal, in one example of the application, different states of the electric signals can be distinguished through level, the high level signal is the first state electric signal, the low level signal is the second state electric signal, and specific voltage values of the high level and the low level can be specifically set according to actual needs.
Under the condition that the detection signal is a first state electric signal, the indicator lamp indicates the fault condition of the indicator lamp through the lighting state; and/or the presence of a gas in the gas,
and under the condition that the detection signal is a second state electric signal, the indicator light indicates the working state of the target switch interface card.
Confirming the specific state of the received electric signal, if the logic device confirms that the detection signal is the first state electric signal, triggering the method for indicating the fault condition of the indicator lamp through the lighting state, and starting to receive the set detection clock signal; if the detection signal is confirmed to be the second state electric signal, the logic device maintains the normal operation state, namely, the LED corresponding to the driving port realizes the work of lighting, extinguishing or flickering and the like.
In one example, the present application further includes a function of receiving a power supply detection signal.
And receiving a set power supply detection signal.
The Power detection signal, also called Power Good (PG) signal, is used for pointing out and exchanging the chip to Power on normally, after the Power is put through, under the situation that the voltage input to exchanging the chip is within the rated working range, and each way of direct current output voltage has already reached their lowest detection level too, after short time delay, P.G circuit send "the Power is normal signal", represent as the high level state; when the voltage input to the switching chip is reduced to be below the safe working range, the PG circuit sends out a power failure signal, the PG circuit is in a low level state, the waveform of a falling edge is steep, and no self-oscillation phenomenon occurs. The state of the power detection signal may be determined by detecting a falling edge.
When the power detection signal has a falling edge, the voltage input to the exchange chip is reduced to be below the safe working range, the exchange chip is electrified to have an abnormal condition, and when the power detection signal has no falling edge, the voltage input to the exchange chip is within the rated working range.
Fig. 3 shows a flowchart of a method for indicating lamp fault detection according to an exemplary embodiment of the present application.
When the logic device receives that the detection signal is the first state electric signal, the step of indicating the fault condition of the indicator lamp through the lighting state is started to be executed, specifically: receiving a set detection clock signal, dividing the frequency of the detection clock signal into a set clock signal, and controlling the indicator lamp to alternately turn on and off at the frequency of the set clock signal.
In an example of the present application, different states of the electrical signal can be distinguished by levels, a high level signal is a first state electrical signal, a low level signal is a second state electrical signal, and specific voltage values of the high level and the low level can be specifically set according to the actual situation. That is, when the received detection signal is at a high level, the step of indicating a failure condition of the indicator lamp by a lighting state is started; and when the received detection signal is at a low level, the logic device maintains a normal operation state, namely, the logic device drives the LEDs corresponding to the ports to realize the work of lighting, extinguishing or flickering and the like.
By the method, the triggering condition of the indicator lamp for hardware fault detection is increased, and a large amount of repeated detection is avoided under the condition that the indicator lamp normally operates.
In an example, the present application further includes a method for limiting the number of lighting signals by recording the number of lighting signals through a clock counter, and a flowchart of a clock signal counting method according to an exemplary embodiment of the present application is shown in fig. 4:
in step S401, the number of clock signals sent by the switch chip is recorded by a clock counter, and when a rising edge of a clock signal is detected, 1 is added to the number of clocks of the clock counter, and the data of the data signal is stored in the data register.
In the scheme provided by the application, when a logic device detects a rising edge of a clock signal, the logic device adds 1 to the clock counter once, and by the method, the accumulated oscillation frequency of the clock signal can be recorded in time. It can be understood that, the present application does not specifically limit the corresponding relationship between the number of times of the upper edge of the clock signal and the number of clock increments of the clock counter, and the setting method of the clock counter capable of recording the accumulated oscillation number of the clock signal is within the protection scope of the present application.
In step S402, when the number of clock signals sent by the switch chip is equal to the maximum number that can be received by the switch interface card, the storage of the lighting signal into the data register is stopped:
the accumulated oscillation times of the clock signals recorded by the method is compared with the maximum number of the interface cards of the switchboard capable of receiving the clock signals. Under the condition that the number of the clock signals sent by the switch chip is detected to be equal to the maximum number which can be received by the switch interface card, the number of the clock signals output by the LED _ CLK is increased again, the LED _ DATA is stopped, and lighting DATA is stored into the DATA register, so that the clock signals added by the LED _ CLK have no influence on the lighting DATA, and the register overflow condition cannot occur.
An exemplary embodiment of the present application illustrates a switch status indication structure, which is shown in fig. 5:
in this embodiment, the CPLD is provided with general purpose ports GPIO0 and GPIO1 for simultaneously receiving two level signals from the switch chip. The method can be used for obtaining four level sequence conditions, and the converted binary data signals are respectively as follows: 00. 01, 10, 11. Wherein each binary data signal corresponds to a data register address of a switch interface card. That is, in this embodiment, the switch can simultaneously support the normal operation of the port indicator lights of 4 cards.
In addition, the CPLD receives a detection clock signal with a fixed frequency of 25M, divides the detection clock signal into a set clock signal with 1Hz, and outputs the clock signal with 1Hz from the LED0 to the LED7 port for indicating the plug-in card port indicator lamp to be alternately turned on and off at the frequency of the set clock signal. At this time, whether the indicator lamp has a hardware fault can be directly judged by observation: under the condition that the indicator lamp is normally and alternately turned on and off at the frequency of the set clock signal, the indicator lamp can be determined to be in a good state, and no hardware fault exists; in the case where the indicator lamp cannot be alternately turned on or off at the frequency of the set clock signal or even is normally off, it can be determined that there is a hardware failure in the indicator lamp.
In this embodiment, the port CPIO2 is used for receiving the detection signal from the switch chip generic interface, and the CPLD receives the PG signal at the same time. Starting to execute a step of indicating a failure condition of the indicator lamp by a lighting state when the received detection signal is at a high level; and when the received detection signal is at a low level, the logic device maintains a normal operation state, namely, the logic device drives the LEDs corresponding to the ports to realize the work of lighting, extinguishing or flickering and the like.
In addition, the CPLD in this embodiment is further provided with a clock counter for recording the number of clocks emitted by the switch chip. The switch in the embodiment can simultaneously support the normal operation of the port indicator lamps of 4 cards, and each card has 8 pin ports from the LED0 to the LED7 for outputting the lighting signal, so that the interface card of the switch can obtain 32 lighting data at most. When the number of the clock signals output by the LED _ CLK is equal to 32, the number of the clock signals output by the LED _ CLK is increased again, the LED _ DATA is stopped and the lighting DATA is stored in the DATA register, so that the clock signals of the LED _ CLK are increased again, the lighting DATA is not influenced, and the register overflow condition cannot occur.
Through the scheme that this application provided, can provide following beneficial effect:
one switch can simultaneously support that the port indicator lamp can still work normally under the condition that a plurality of plug-in cards are put in; whether a port indicator lamp of a switch card has a hardware fault or not can be detected through software operation, maintenance cost is reduced, and when detection is carried out is judged to reduce performance waste; after the switch is upgraded, the register overflow caused by the increase of the number of the LED _ CLK clocks output by the switching chip can be avoided, and the normal work of the port indicator lamp can not be influenced.
Corresponding to the embodiment that the switch state is only the method, the application also provides a switch state indicating device.
Fig. 6 is a schematic diagram of a switch status indication apparatus according to an exemplary embodiment of the present application, which specifically includes:
the level receiving module 601 is configured to receive level signals sent by a plurality of general interfaces of the switch chip;
a card insertion determining module 602, configured to determine a target switch interface card indicated by a level signal sent by the multiple universal interfaces, where the target switch interface card is one of multiple interface cards connected in a switch;
the signal analysis module 603 is configured to receive a clock signal and a data signal of the switch chip, and obtain a lighting signal according to the clock signal and the data signal;
and a signal output module 604, configured to control an indicator light of the interface card of the target switch by using the lighting signal.
In one example, the card insertion determination module determines a target switch interface card indicated by a level signal sent by the plurality of universal interfaces, and is specifically configured to:
obtaining a level sequence corresponding to the level signal according to the level signal sent by a plurality of universal interfaces of the exchange chip;
converting the level sequence into a binary data signal;
and obtaining the data register address of the interface card of the target switch according to the binary data signal.
In one example, the apparatus further includes a fault detection module, specifically configured to:
receiving a set detection clock signal;
dividing the detection clock signal into a set clock signal;
and controlling the indicator lamps to alternately light on and light off at the frequency of the set clock signal.
In an example, the apparatus specifically further includes a detection indication module specifically configured to:
receiving a detection signal sent by a universal interface of a switching chip, wherein the detection signal is a first state electric signal or a second state electric signal;
under the condition that the detection signal is a first state electric signal, the indicator lamp indicates the fault condition of the indicator lamp through the lighting state; and/or the presence of a gas in the gas,
and under the condition that the detection signal is a second state electric signal, the indicator light indicates the working state of the target switch interface card.
In one example, the apparatus further includes a power detection module, specifically configured to:
receiving a set power supply detection signal, wherein the power supply detection signal is used for indicating the power supply state of the exchange chip;
in one example, the apparatus further includes a signal counting module, specifically configured to:
recording the number of clock signals sent by the switching chip through a clock counter, increasing 1 to the number of clocks of the clock counter under the condition of detecting the rising edge of the clock signals, and simultaneously storing data of the data signals into the data register;
and under the condition that the number of the clock signals sent by the switching chip is equal to the maximum number which can be received by the interface plug-in card of the switch, stopping storing the lighting signal into the data register.
Since it basically corresponds to the method embodiment, it is relatively simple to describe, and reference may be made to the partial description of the method embodiment for relevant points, which is not described herein again.
Embodiments of the subject matter and the functional operations described in this specification can be implemented in: digital electronic circuitry, tangibly embodied computer software or firmware, computer hardware including the structures disclosed in this specification and their structural equivalents, or a combination of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a tangible, non-transitory program carrier for execution by, or to control the operation of, data processing apparatus.
The processes and logic flows described in this specification can be performed by one or more programmable computers executing one or more computer programs to perform corresponding functions by operating on input data and generating output. The processes and logic flows can be performed by, and implemented as, special purpose logic circuitry.
While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features specific to particular embodiments of particular inventions. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. In other instances, features described in connection with one embodiment may be implemented as discrete components or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Claims (12)
1. A switch state indication method, the method comprising:
receiving level signals sent by a plurality of universal interfaces of a switching chip;
determining a target switch interface plug-in card indicated by a level signal sent by the plurality of universal interfaces, wherein the target switch interface plug-in card is at least one of the plurality of interface plug-in cards connected in the switch;
receiving a clock signal and a data signal of the exchange chip, and obtaining a lighting signal according to the clock signal and the data signal;
and the lighting signal is utilized to control an indicator lamp of the target switch interface card.
2. The method of claim 1, wherein said determining a target switch interface card indicated by the level signals from the plurality of generic interfaces comprises:
obtaining a level sequence corresponding to the level signal according to the level signal sent by a plurality of universal interfaces of the exchange chip;
converting the level sequence into a binary data signal;
and obtaining the data register address of the interface card of the target switch according to the binary data signal.
3. The method according to claim 1, further comprising indicating a fault condition of the indicator light by an illuminated state, specifically comprising:
receiving a set detection clock signal;
dividing the detection clock signal into a set clock signal;
and controlling the indicator lamps to alternately light on and light off at the frequency of the set clock signal.
4. The method of claim 3, further comprising:
receiving a detection signal sent by a universal interface of a switching chip, wherein the detection signal is a first state electric signal or a second state electric signal;
under the condition that the detection signal is a first state electric signal, the indicator lamp indicates the fault condition of the indicator lamp through the lighting state; and/or the presence of a gas in the gas,
and under the condition that the detection signal is a second state electric signal, the indicator light indicates the working state of the target switch interface card.
5. The method of claim 4, further comprising:
and receiving a set power supply detection signal, wherein the power supply detection signal is used for indicating the power supply state of the exchange chip.
6. The method of claim 1, further comprising:
recording the number of clock signals sent by the switching chip through a clock counter, increasing 1 to the number of clocks of the clock counter under the condition of detecting the rising edge of the clock signals, and simultaneously storing data of the data signals into the data register;
and under the condition that the number of the clock signals sent by the switching chip is equal to the maximum number which can be received by the interface plug-in card of the switch, stopping storing the lighting signal into the data register.
7. A switch status indication apparatus, the apparatus comprising:
the level receiving module is used for receiving level signals sent by a plurality of universal interfaces of the switching chip;
a card insertion determining module, configured to determine a target switch interface card indicated by a level signal sent by the multiple general interfaces, where the target switch interface card is one of multiple interface cards connected in a switch;
the signal analysis module is used for receiving a clock signal and a data signal of the exchange chip and obtaining a lighting signal according to the clock signal and the data signal;
and the signal output module is used for controlling an indicator lamp of the interface card of the target switchboard by utilizing the lighting signal.
8. The apparatus of claim 7, wherein the add-in card determining module determines a target switch interface add-in card indicated by the level signals sent by the plurality of generic interfaces, and is specifically configured to:
obtaining a level sequence corresponding to the level signal according to the level signal sent by a plurality of universal interfaces of the exchange chip;
converting the level sequence into a binary data signal;
and obtaining the data register address of the interface card of the target switch according to the binary data signal.
9. The apparatus according to claim 7, further comprising a fault detection module, specifically configured to:
receiving a set detection clock signal;
dividing the detection clock signal into a set clock signal;
and controlling the indicator lamps to alternately light on and light off at the frequency of the set clock signal.
10. The apparatus according to claim 9, wherein the apparatus further includes a detection indication module, which is specifically configured to:
receiving a detection signal sent by a universal interface of a switching chip, wherein the detection signal is a first state electric signal or a second state electric signal;
under the condition that the detection signal is a first state electric signal, the indicator lamp indicates the fault condition of the indicator lamp through the lighting state; and/or the presence of a gas in the gas,
and under the condition that the detection signal is a second state electric signal, the indicator light indicates the working state of the target switch interface card.
11. The apparatus of claim 10, further comprising a power detection module, specifically configured to:
and receiving a set power supply detection signal, wherein the power supply detection signal is used for indicating the power supply state of the exchange chip.
12. The apparatus of claim 7, further comprising a signal counting module, specifically configured to:
recording the number of clock signals sent by the switching chip through a clock counter, increasing 1 to the number of clocks of the clock counter under the condition of detecting the rising edge of the clock signals, and simultaneously storing data of the data signals into the data register;
and under the condition that the number of the clock signals sent by the switching chip is equal to the maximum number which can be received by the interface plug-in card of the switch, stopping storing the lighting signal into the data register.
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