CN113890405A - Pulse forward connection carrier phase-shifting sine pulse width modulation method for eliminating MMC common-mode voltage - Google Patents

Pulse forward connection carrier phase-shifting sine pulse width modulation method for eliminating MMC common-mode voltage Download PDF

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CN113890405A
CN113890405A CN202110955314.7A CN202110955314A CN113890405A CN 113890405 A CN113890405 A CN 113890405A CN 202110955314 A CN202110955314 A CN 202110955314A CN 113890405 A CN113890405 A CN 113890405A
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CN113890405B (en
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李虹
王佳信
褚召义
王作兴
邵天骢
李志君
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Beijing Jiaotong University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/505—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M7/515—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
    • H02M7/525—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with automatic control of output waveform or frequency
    • H02M7/527—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with automatic control of output waveform or frequency by pulse width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/505—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M7/515—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
    • H02M7/521—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
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Abstract

The application provides a pulse forward-connected carrier phase-shifting sine pulse width modulation method for eliminating MMC common-mode voltage, and relates to the technical field of power electronics, wherein the method comprises the following steps: step S1: comparing the modulated wave with a carrier wave to obtain a pulse signal; step S2: capturing a pulse falling edge of the pulse signal; step S3: and grouping the sub-modules and generating a driving pulse of the switching tube by the captured pulse falling edge. By adopting the scheme, the MMC system common mode voltage can be eliminated, the system leakage current and common mode noise are effectively reduced, and the technical problems that the high-frequency common mode voltage existing in the existing MMC generates leakage current and common mode interference through stray capacitance and harms a motor bearing, a communication system and the like are effectively solved.

Description

Pulse forward connection carrier phase-shifting sine pulse width modulation method for eliminating MMC common-mode voltage
Technical Field
The application relates to the technical field of power electronics, in particular to a pulse forward connection carrier phase-shifting sine pulse width modulation method and device for eliminating MMC common-mode voltage.
Background
As a power electronic converter with wide application prospect, the MMC has been applied in the fields of medium and high voltage, and has many advantages: low loss, low step voltage, low electromagnetic interference, etc. The MMC circuit structure is shown in fig. 3, and the modulation modes of the MMC mainly include two types: (1) low switching frequency modulation, such as: nearest level approximation modulation and selective harmonic elimination modulation; (2) high switching frequency modulation, such as: carrier phase-shift sinusoidal pulse width modulation, carrier stacked sinusoidal pulse width modulation.
However, in the current MMC research, there is little research on the common mode voltage. In fact, there is a common mode voltage with high frequency jumps in the MMC, where the amplitude of each jump is about U when using carrier phase shifted sinusoidal pulse width modulationdc6N, its presence is not negligible. The high-frequency common-mode voltage can generate leakage current and common-mode interference through stray capacitance, endangers a motor bearing, a communication system and the like, and needs to be solved urgently.
Disclosure of Invention
The present application is directed to solving, at least to some extent, one of the technical problems in the related art.
Therefore, a first objective of the present application is to provide a pulse direct-connection carrier phase-shift sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC, which solves the technical problems that a high-frequency common-mode voltage generates a leakage current and a common-mode interference through a stray capacitor, and harms a motor bearing, a communication system, and the like in the existing MMC, eliminates high-frequency jump of the common-mode voltage, and effectively reduces a system leakage current and a common-mode noise.
The second purpose of the present application is to provide a pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation device for eliminating the common-mode voltage of the MMC.
A third object of the present application is to propose a non-transitory computer-readable storage medium.
In order to achieve the above object, an embodiment of the first aspect of the present application provides a pulse-forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC, including step S1: comparing the modulated wave with a carrier wave to obtain a pulse signal; step S2: capturing a pulse falling edge of the pulse signal; step S3: and grouping the sub-modules and generating a driving pulse of the switching tube by the captured pulse falling edge.
Optionally, in an embodiment of the present application, the modulated wave is compared with a carrier to obtain a pulse signal, specifically, based on pulse width modulation, an isosceles triangle carrier is used, carriers corresponding to the sub-modules are arranged in a phase-shifting manner, and a pulse signal corresponding to each sub-module is obtained by comparing the modulated wave signal with the carrier signal, where when the modulated wave signal is greater than the carrier signal, a high-level signal is output, and when the modulated wave signal is smaller than the carrier signal, a low-level signal is output.
Optionally, in an embodiment of the present application, when the pulse signal changes from high level to low level, the falling edge capture signal outputs high level for one clock cycle, and at other times, the falling edge capture signal output is always low level, which is expressed as:
Figure BDA0003220265570000021
wherein u isneg,jkl0Representing the falling edge capture signal, ujkl0The pulse signal obtained by comparing the modulation wave with the carrier wave is shown, j represents the phase unit of the MMC, k represents the upper bridge arm and the lower bridge arm, l represents the serial number of the sub-module, and T represents the clock period of the digital circuit.
Optionally, in an embodiment of the present application, the sub-modules are grouped, specifically, the upper and lower bridge arms are divided into a predetermined number of sequential sub-module groups, and the driving pulses of six sub-modules in one sub-module group are sequentially represented as:
Figure BDA0003220265570000022
Figure BDA0003220265570000023
Figure BDA0003220265570000024
Figure BDA0003220265570000025
Figure BDA0003220265570000031
Figure BDA0003220265570000032
wherein u isaklRepresents the drive signal of the l-th submodule of the a-phase k-leg ubklRepresents the drive signal u of the l-th submodule of the b-phase k-bridge armcklRepresents the drive signal of the l-th submodule of the c-phase k-bridge arm, uak(N/2+l)Represents the drive signal of the N/2+ l sub-module of the phase-a-k bridge arm, ubk(N/2+l)Represents the drive signal of the N/2+ l sub-module of the b-phase k-bridge arm, uck(N/2+l)Represents the N/2+ l sub-module of the c-phase k bridge arm, uneg,akl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the a-phase k bridge arm with the carrier waveneg,bkl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the b-phase k bridge arm with the carrier waveneg,ckl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the c-phase k bridge arm with the carrier waveneg,ak(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of an a-phase k bridge arm with a carrier waveneg,bk(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of a b-phase k bridge arm with a carrier waveneg,ck(N/2+l)0Representing the N/2+ l sub-module modulation wave of a c-phase k bridge armAnd a falling edge capturing signal of the pulse signal obtained by comparing with the carrier wave, wherein N represents the number of the sub-modules, and T represents the clock period of the digital circuit.
Optionally, in an embodiment of the present application, the obtained sub-module driving pulse has the following characteristics:
the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase b are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the first sub-module of the upper bridge arm of the phase c are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase a are at the same time, and the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase c are at the same time.
In order to achieve the above object, a second aspect of the present invention provides a pulse forward carrier phase-shifted sinusoidal pulse width modulation apparatus for eliminating a common-mode voltage of an MMC, comprising a comparing module, a capturing module, and a generating module, wherein,
the comparison module is used for comparing the modulation wave with the carrier wave to obtain a pulse signal;
the capturing module is used for capturing a pulse falling edge of the pulse signal;
and the generating module is used for grouping the sub-modules and generating the driving pulse of the switching tube through the captured pulse falling edge.
To achieve the above object, a non-transitory computer readable storage medium is provided in a third aspect of the present application, wherein instructions in the storage medium when executed by a processor can perform a pulse-forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC.
The pulse direct-connection carrier phase-shifting sine pulse width modulation method for eliminating the MMC common-mode voltage, the pulse direct-connection carrier phase-shifting sine pulse width modulation device for eliminating the MMC common-mode voltage and the non-transitory computer readable storage medium solve the technical problems that high-frequency common-mode voltage generates leakage current through stray capacitance, common-mode interference, damage to motor bearings, communication systems and the like in the existing MMC, eliminate high-frequency jumping of the common-mode voltage in real time by optimizing a sub-module switching sequence, effectively reduce leakage current and common-mode noise of the MMC and improve the working performance of the MMC.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
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The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a flowchart of a pulse forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC according to an embodiment of the present disclosure;
FIG. 2 is another flowchart of a pulse forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating MMC common mode voltage according to an embodiment of the present application;
fig. 3 is a schematic circuit structure diagram of an MMC according to an embodiment of the present application, in a pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of the MMC;
FIG. 4 is a schematic diagram of a carrier and a modulated wave of a pulse-forward carrier phase-shifted sinusoidal pulse width modulation according to an embodiment of the present application;
FIG. 5 is a timing diagram illustrating a forming process of a driving pulse of one sub-module of the pulse forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common-mode voltage according to the embodiment of the present application;
fig. 6 is a schematic diagram of driving pulses of all sub-modules of a sub-module group of a pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC according to an embodiment of the present application;
fig. 7 is a schematic diagram of a common-mode voltage realized by an MMC with a bridge arm submodule number of 4 according to carrier phase-shift sinusoidal pulse width modulation under a working condition of a bus voltage of 800V, a load current effective value of 11.3A, and a modulation ratio of 0.8 in the embodiment of the present application;
fig. 8 is a schematic diagram of a common-mode voltage realized by an MMC with a bridge arm submodule number of 4 according to the embodiment of the present application under a working condition of a bus voltage of 800V, a load current effective value of 11.3A, and a modulation ratio of 0.8 according to the present application;
fig. 9 is a schematic structural diagram of a pulse forward carrier phase-shifted sinusoidal pulse width modulation device for eliminating a common-mode voltage of an MMC according to a second embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present application and should not be construed as limiting the present application.
The following describes a pulse forward carrier phase-shifting sinusoidal pulse width modulation method and device for eliminating MMC common mode voltage according to an embodiment of the present application with reference to the accompanying drawings.
Fig. 1 is a flowchart of a pulse forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC according to an embodiment of the present disclosure.
As shown in fig. 1, the pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common mode voltage includes the following steps:
step 101, comparing the modulation wave with a carrier wave to obtain a pulse signal;
step 102, capturing a pulse falling edge of a pulse signal;
and 103, grouping the sub-modules and generating a driving pulse of the switching tube through the captured pulse falling edge.
According to the pulse forward-connection carrier phase-shifting sine pulse width modulation method for eliminating the MMC common-mode voltage, a pulse signal is obtained by comparing a modulation wave with a carrier; capturing a pulse falling edge of the pulse signal; and grouping the sub-modules and generating a driving pulse of the switching tube by the captured pulse falling edge. Therefore, the technical problems that high-frequency common-mode voltage generates leakage current and common-mode interference through stray capacitance and endangers a motor bearing, a communication system and the like in the existing MMC can be solved, the high-frequency hopping of the common-mode voltage is eliminated in real time by optimizing a submodule switching sequence, the leakage current and the common-mode noise of the MMC are effectively reduced, and the working performance of the MMC is improved.
Further, in this embodiment of the present application, the modulated wave is compared with the carrier to obtain a pulse signal, specifically, based on pulse width modulation, an isosceles triangle carrier is used, the carriers corresponding to the sub-modules are arranged in a phase-shifting manner, and a pulse signal corresponding to each sub-module is obtained by comparing the modulated wave signal with the carrier signal, where when the modulated wave signal is greater than the carrier signal, a high-level signal is output, and when the modulated wave signal is smaller than the carrier signal, a low-level signal is output.
If the number of the submodules of each bridge arm of the MMC is N (N is usually an even number), the carrier u corresponding to the submodules in the upper bridge armcar,plThe phase difference between the two is 360 DEG/N, and the carrier u corresponding to the sub-module in the lower bridge armcar,nlThe phase difference between the first and second sub-modules is 360 °/N, and the phase difference between the first sub-module in the upper bridge arm and the first sub-module in the lower bridge arm is 360 °/2N, wherein l is 1, 2. Three-phase upper bridge arm modulation wave uref,ap、uref,bpAnd uref,cpPhase difference of 120 degrees, three-phase lower bridge arm modulation wave uref,an、uref,bnAnd uref,cnThe phase difference is 120 degrees, and the modulation waves u corresponding to the upper bridge arm and the lower bridge arm in each phaseref,jpAnd uref,jnBy 180 ° (j ═ a, b, c).
The present application does not use the generated pulse directly as a sub-module drive pulse, but uses this pulse as a control signal for the drive pulse. The pulse expression obtained by comparing the modulated wave with the carrier wave is as follows:
Figure BDA0003220265570000061
further, in this embodiment of the present application, when the pulse signal changes from high level to low level, the falling edge capture signal outputs high level for one clock cycle, and at other times, the falling edge capture signal output is always low level, which is expressed as:
Figure BDA0003220265570000062
wherein u isneg,jkl0Representing the falling edge capture signal, ujkl0The pulse signal obtained by comparing the modulation wave with the carrier wave is shown, j represents the phase unit of the MMC, k represents the upper bridge arm and the lower bridge arm, l represents the serial number of the sub-module, and T represents the clock period of the digital circuit.
Further, in the embodiment of the present application, the sub-modules are grouped, specifically, the upper and lower bridge arms are divided into a predetermined number of sub-module groups in sequence, and the driving pulses of six sub-modules in one sub-module group are sequentially represented as:
Figure BDA0003220265570000063
Figure BDA0003220265570000064
Figure BDA0003220265570000065
Figure BDA0003220265570000066
Figure BDA0003220265570000071
Figure BDA0003220265570000072
wherein u isaklRepresents the drive signal of the l-th submodule of the a-phase k-leg ubklRepresenting a b-phase k bridge armDrive signal of the first submodule, ucklRepresents the drive signal of the l-th submodule of the c-phase k-bridge arm, uak(N/2+l)Represents the drive signal of the N/2+ l sub-module of the phase-a-k bridge arm, ubk(N/2+l)Represents the drive signal of the N/2+ l sub-module of the b-phase k-bridge arm, uck(N/2+l)Represents the N/2+ l sub-module of the c-phase k bridge arm, uneg,akl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the a-phase k bridge arm with the carrier waveneg,bkl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the b-phase k bridge arm with the carrier waveneg,ckl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the c-phase k bridge arm with the carrier waveneg,ak(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of an a-phase k bridge arm with a carrier waveneg,bk(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of a b-phase k bridge arm with a carrier waveneg,ck(N/2+l)0And the falling edge capturing signal of the pulse signal obtained by comparing the N/2+ l sub-module modulation wave of the c-phase k bridge arm with the carrier wave is represented, N represents the number of the sub-modules, and T represents the clock period of the digital circuit.
The upper and lower bridge arms can be divided into N/2 sub-module groups with sequence. When N is 4, all sub-modules of the upper bridge arm may be divided into 2 sub-module groups:
the 1 st submodule group of the upper bridge arm:
SMap1→SMbp3→SMcp1→SMap3→SMbp1→SMcp3
upper bridge arm 2 nd submodule group:
SMap2→SMbp4→SMcp2→SMap4→SMbp2→SMcp4
further, in the embodiment of the present application, the obtained sub-module driving pulse has the following characteristics:
the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase b are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the first sub-module of the upper bridge arm of the phase c are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase a are at the same time, and the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase c are at the same time.
This is true for the upper leg for both the N/2 sub-module groups and the lower leg. Thus, one submodule group always has three submodules in the input state.
The sum of the number of the submodules of the three upper bridge arms in the input state and the sum of the number of the submodules of the three lower bridge arms in the input state are both 3N/2, namely:
Figure BDA0003220265570000081
fig. 2 is another flowchart of a pulse forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC according to an embodiment of the present application.
As shown in fig. 2, the pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common mode voltage includes obtaining a pulse signal corresponding to each sub-module according to a comparison between a sinusoidal wave and a carrier; capturing a drive pulse falling edge for each sub-module; and obtaining new driving pulse falling edges of each submodule in a grouping mode according to the falling edges.
Fig. 4 is a schematic diagram of a carrier wave and a modulation wave of pulse-sequential carrier phase-shift sinusoidal pulse width modulation according to an embodiment of the present application.
As shown in fig. 4, the pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common mode voltage is based on carrier phase-shifted sinusoidal pulse width modulation, and generates the driving pulse of each sub-module, for example, three sub-modules with the number N of 4 for each bridge arm, in a manner of comparing an isosceles triangle carrier with a sinusoidal modulation wavePhase MMC, the carriers corresponding to the submodules are arranged in a phase-shifting mode, and the carrier u corresponding to the submodules in the upper bridge armcar,p1、ucar,p2、ucar,p3、ucar,p4The phase difference is 90 degrees, and the carrier u corresponding to the sub-module in the lower bridge armcar,n1、ucar,n2、ucar,n3、ucar,n4The phase difference between the first and second sub-modules is also 90 °, and the phase difference between the first sub-module in the upper bridge arm and the first sub-module in the lower bridge arm is 45 °, where l is 1,2,3, 4. Three-phase upper bridge arm modulation wave uref,ap、uref,bpAnd uref,cpPhase difference of 120 degrees, three-phase lower bridge arm modulation wave uref,an、uref,bnAnd uref,cnThe phase difference is 120 degrees, and the modulation waves u corresponding to the upper bridge arm and the lower bridge arm in each phaseref,jpAnd uref,jnBy 180 ° (j ═ a, b, c).
Fig. 5 is a timing diagram illustrating a forming process of a driving pulse of one sub-module of the pulse-forward carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common mode voltage according to the embodiment of the present application.
As shown in FIG. 5, u of the pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating the MMC common-mode voltagebk(N/2+l)The sub-modules are generated as follows, uapl0For modulating a wave uref,apAnd carrier ucar,plComparing the resulting pulses ubp(N/2+l)0For modulating a wave uref,bpAnd carrier ucar,p(N/2+l)Comparing the resulting pulses uneg,apl0To capture uapl0Pulse obtained at falling edge, uneg,bp(N/2+l)0To capture ubp(N/2+l)0The falling edge resulting in a pulse.
Fig. 6 is a schematic diagram of driving pulses of all sub-modules of a sub-module group of a pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation method for eliminating a common-mode voltage of an MMC according to an embodiment of the present application.
As shown in fig. 6, the sub-module driving pulses of the l sub-module group of the pulse-in-line carrier phase-shift sinusoidal pulse width modulation method for eliminating the MMC common-mode voltage are as follows, as can be seen, the falling edge of the driving pulse of the l sub-module of the a-phase upper bridge arm and the rising edge of the driving pulse of the N/2+ l sub-module of the b-phase upper bridge arm are at the same time, the falling edge of the driving pulse of the N/2+ l sub-module of the b-phase upper bridge arm and the rising edge of the driving pulse of the l sub-module of the c-phase upper bridge arm are at the same time, the falling edge of the driving pulse of the N/2+ l sub-module of the a-phase upper bridge arm and the rising edge of the driving pulse of the l sub-module of the b-phase upper bridge arm are at the same time, the driving pulse falling edge of the first sub-module of the b-phase upper bridge arm and the driving pulse rising edge of the N/2+ l sub-module of the c-phase upper bridge arm are at the same time, and the driving pulse falling edge of the N/2+ l sub-module of the c-phase upper bridge arm and the driving pulse rising edge of the first sub-module of the a-phase upper bridge arm are at the same time. This is true for the upper leg for both the N/2 sub-module groups and the lower leg. Thus, a submodule forward group always has three submodules in the input state.
Fig. 7 is a schematic diagram of a common-mode voltage realized by an MMC with a bridge arm submodule number of 4 according to carrier phase-shift sinusoidal pulse width modulation under a working condition of a bus voltage of 800V, a load current effective value of 11.3A, and a modulation ratio of 0.8 in the embodiment of the present application.
Fig. 8 is a schematic diagram of a common-mode voltage realized by an MMC with a bridge arm submodule number of 4 according to the embodiment of the present application under a working condition of a bus voltage of 800V, a load current effective value of 11.3A, and a modulation ratio of 0.8 according to the present application.
As shown in fig. 7 and 8, both the two diagrams are schematic diagrams of common-mode voltage of an MMC with a bridge arm submodule number of 4 under the working conditions of a bus voltage of 800V and a load current effective value of 11.3A, the former is realized by using a modulation method commonly used by the MMC and carrier phase-shift sinusoidal pulse width modulation, and the latter is realized by using the modulation method of the present application. The modulation ratio is 0.8, and the load is a resistive load. When the modulation method is used, the MMC common mode voltage is close to zero, so that the leakage current of the MMC is reduced, the common mode noise is reduced, the performance of the MMC is improved, and the technical problems that the high-frequency common mode voltage in the existing MMC can generate the leakage current and the common mode interference through stray capacitance, and the motor bearing, a communication system and the like are damaged are effectively solved.
Fig. 9 is a schematic structural diagram of a pulse forward carrier phase-shifted sinusoidal pulse width modulation device for eliminating a common-mode voltage of an MMC according to a second embodiment of the present application.
As shown in fig. 9, the pulse forward-connected carrier phase-shifted sinusoidal pulse width modulation apparatus for eliminating the MMC common mode voltage includes a comparison module, a capture module, and a generation module, wherein,
a comparison module 10, configured to compare the modulated wave with a carrier to obtain a pulse signal;
a capturing module 20, configured to capture a pulse falling edge of the pulse signal;
and the generating module 30 is used for grouping the sub-modules and generating the driving pulse of the switching tube through the captured pulse falling edge.
The pulse forward-connection carrier phase-shifting sine pulse width modulation device for eliminating the MMC common-mode voltage comprises a comparison module, a capture module and a generation module, wherein the comparison module is used for comparing a modulation wave with a carrier to obtain a pulse signal; the capturing module is used for capturing a pulse falling edge of the pulse signal; and the generating module is used for grouping the sub-modules and generating the driving pulse of the switching tube through the captured pulse falling edge. Therefore, the technical problems that high-frequency common-mode voltage generates leakage current and common-mode interference through stray capacitance and endangers a motor bearing, a communication system and the like in the existing MMC can be solved, the high-frequency hopping of the common-mode voltage is eliminated in real time by optimizing a submodule switching sequence, the leakage current and the common-mode noise of the MMC are effectively reduced, and the working performance of the MMC is improved.
In order to implement the foregoing embodiments, the present application further proposes a non-transitory computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method for pulse-forward carrier phase-shift sinusoidal pulse width modulation for eliminating the MMC common-mode voltage according to the foregoing embodiments is implemented.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.

Claims (7)

1. A pulse forward connection carrier phase shift sine pulse width modulation method for eliminating MMC common mode voltage is characterized by comprising the following steps:
step S1: comparing the modulated wave with a carrier wave to obtain a pulse signal;
step S2: capturing a pulse falling edge of the pulse signal;
step S3: and grouping the sub-modules and generating a driving pulse of the switching tube by the captured pulse falling edge.
2. The method according to claim 1, wherein the modulated wave is compared with a carrier wave to obtain a pulse signal, and specifically, based on pulse width modulation, an isosceles triangle carrier wave is used, the carrier waves corresponding to the sub-modules are arranged in a phase-shifting manner, and the pulse signal corresponding to each sub-module is obtained by comparing the modulated wave signal with the carrier wave signal, wherein when the modulated wave signal is greater than the carrier wave signal, a high level signal is output, and when the modulated wave signal is less than the carrier wave signal, a low level signal is output.
3. The method of claim 1, wherein the falling edge capture signal is output at a high level for one clock cycle when the pulse signal changes from a high level to a low level, and at other times, the falling edge capture signal output is always at a low level, which is expressed as:
Figure FDA0003220265560000011
wherein u isneg,jkl0Representing the falling edge capture signal, ujkl0The pulse signal obtained by comparing the modulation wave with the carrier wave is shown, j represents the phase unit of the MMC, k represents the upper bridge arm and the lower bridge arm, l represents the serial number of the sub-module, and T represents the clock period of the digital circuit.
4. The method of claim 1, wherein the sub-modules are grouped, in particular, the upper and lower bridge arms are divided into a predetermined number of sequential sub-module groups, and the driving pulses of six sub-modules in a sub-module group are sequentially expressed as:
Figure FDA0003220265560000012
Figure FDA0003220265560000021
Figure FDA0003220265560000022
Figure FDA0003220265560000023
Figure FDA0003220265560000024
Figure FDA0003220265560000025
wherein u isaklRepresents the drive signal of the l-th submodule of the a-phase k-leg ubklRepresents the drive signal u of the l-th submodule of the b-phase k-bridge armcklRepresents the drive signal of the l-th submodule of the c-phase k-bridge arm, uak(N/2+l)Represents the drive signal of the N/2+ l sub-module of the phase-a-k bridge arm, ubk(N/2+l)Represents the drive signal of the N/2+ l sub-module of the b-phase k-bridge arm, uck(N/2+l)Represents the N/2+ l sub-module of the c-phase k bridge arm, uneg,akl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the a-phase k bridge arm with the carrier waveneg,bkl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the b-phase k bridge arm with the carrier waveneg,ckl0Represents the falling edge capture signal u of the pulse signal obtained by comparing the first sub-module modulation wave of the c-phase k bridge arm with the carrier waveneg,ak(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of an a-phase k bridge arm with a carrier waveneg,bk(N/2+l)0Represents a falling edge capture signal u of a pulse signal obtained by comparing an N/2+ l sub-module modulation wave of a b-phase k bridge arm with a carrier waveneg,ck(N/2+l)0And the falling edge capturing signal of the pulse signal obtained by comparing the N/2+ l sub-module modulation wave of the c-phase k bridge arm with the carrier wave is represented, N represents the number of the sub-modules, and T represents the clock period of the digital circuit.
5. The method of claim 4, wherein the resulting sub-module drive pulses are characterized by:
the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase b are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the first sub-module of the upper bridge arm of the phase c are at the same time, the driving pulse falling edge of the N/2+ l sub-module of the upper bridge arm of the phase a and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase a are at the same time, and the driving pulse falling edge of the first sub-module of the upper bridge arm of the phase b and the driving pulse rising edge of the N/2+ l sub-module of the upper bridge arm of the phase c are at the same time.
6. A pulse forward connection carrier phase shift sine pulse width modulation device for eliminating MMC common mode voltage is characterized by comprising a comparison module, a capture module and a generation module, wherein,
the comparison module is used for comparing the modulation wave with the carrier wave to obtain a pulse signal;
the capturing module is used for capturing a pulse falling edge of the pulse signal;
and the generating module is used for grouping the sub-modules and generating the driving pulse of the switching tube through the captured pulse falling edge.
7. A non-transitory computer-readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the method of any one of claims 1-5.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114865935A (en) * 2022-02-25 2022-08-05 上海电力大学 Carrier hybrid pulse width modulation strategy control method of modular multilevel converter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3142236A1 (en) * 2015-09-11 2017-03-15 ABB Technology AG Optimized pulse patterns for mmc control
CN109412442A (en) * 2018-10-31 2019-03-01 华中科技大学 A kind of zero common mode modulator approach suitable for MMC
CN111900868A (en) * 2020-08-19 2020-11-06 华中科技大学 Nearest zero common mode vector modulation method and system for inhibiting three-phase MMC common mode voltage
CN112039322A (en) * 2020-09-18 2020-12-04 华中科技大学 MMC common-mode voltage suppression modulation method and system suitable for even number of sub-modules

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3142236A1 (en) * 2015-09-11 2017-03-15 ABB Technology AG Optimized pulse patterns for mmc control
CN109412442A (en) * 2018-10-31 2019-03-01 华中科技大学 A kind of zero common mode modulator approach suitable for MMC
CN111900868A (en) * 2020-08-19 2020-11-06 华中科技大学 Nearest zero common mode vector modulation method and system for inhibiting three-phase MMC common mode voltage
CN112039322A (en) * 2020-09-18 2020-12-04 华中科技大学 MMC common-mode voltage suppression modulation method and system suitable for even number of sub-modules

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
王全东;常天庆;李方正;闫之峰;陈军伟;: "T型逆变器的共模干扰与共模电压抑制算法", 电工技术学报, no. 23 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114865935A (en) * 2022-02-25 2022-08-05 上海电力大学 Carrier hybrid pulse width modulation strategy control method of modular multilevel converter
CN114865935B (en) * 2022-02-25 2024-05-24 上海电力大学 Carrier mixed pulse width modulation strategy control method of modularized multi-level converter

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