CN113889495A - 降低前馈效应的psd型传输栅图像传感器及制作方法 - Google Patents

降低前馈效应的psd型传输栅图像传感器及制作方法 Download PDF

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CN113889495A
CN113889495A CN202111037987.0A CN202111037987A CN113889495A CN 113889495 A CN113889495 A CN 113889495A CN 202111037987 A CN202111037987 A CN 202111037987A CN 113889495 A CN113889495 A CN 113889495A
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徐江涛
王倩
聂凯明
高志远
高静
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Abstract

本发明涉及模拟集成电路设计,为实现大满阱、低漏电,提升图像的信噪比以及动态范围。为此,本发明采取的技术方案是,降低前馈效应的PSD型传输栅图像传感器,含感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST,当光照射半导体上时,一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集;读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,其中,通过对传输栅TG进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度。本发明主要应用于CMOS图像传感器设计制造场合。

Description

降低前馈效应的PSD型传输栅图像传感器及制作方法
技术领域
本发明涉及模拟集成电路设计领域,特别涉及图像传感器像素电路的设计领域。
背景技术
随着CMOS图像传感器的快速发展,其应用覆盖相机、工业、医学、军事等领域,人们越来越关注CMOS图像传感器的性能。其中,信噪比(Signal-to-Noise Ratio,SNR)和动态范围(Dynamic Range,DR)是评估传感器成像性能的重要参数。信噪比是信号与噪声的比值,而最大的信噪比则由满阱以及噪声决定,提高满阱可以达到提高信噪比的作用。动态范围是同一帧中检测到的最大信号与最小信号之比,对于线性传感器,最大信号对应像素的满阱容量,而最小信号对应像素的本底噪声,因而提高满阱容量可以提高动态范围。光电二极管(Photodiode,PD)所能积累的最大电荷量被称之为满阱。满阱主要是取决于PD的掺杂以及传输栅的特性,通过许多学者的大量研究发现,存储在PD中的光生电子会通过热电子发射的方式进入到存储节点(Floating diffusion,FD),从而降低了PD的满阱容量,这一效应称为feedforward效应,通过抑制feedforward效应可以有效提高像素的满阱容量,从而提高SNR以及DR。而影响feedforward效应的主要原因有:光电二极管与传输栅的势垒高度、工作的温度以及积分的时间。工作的温度以及积分时间可以根据指标的要求调整,因此,现在研究的重点主要是通过改变传输栅及栅下电势分布来调整光电二极管与传输栅的势垒高度,现有的减小feedforward效应的方法是通过在传输栅(Transfer gate,TG)上加负压或者改变TG栅下沟道的掺杂从而调整电势分布,加入负压能够直接拉低栅下电势,从而增加PD和TG栅下沟道的势垒高度,从而有效抑制feedforward效应,但是也增加了芯片的功耗,调整TG栅下的掺杂增加了工艺的复杂度。因此,如果能够通过简单的工艺步骤就能调节TG沟道的表面电势分布,增大PD与TG栅的势垒高度,那么就能够降低芯片功耗和工艺复杂度。
发明内容
为克服现有技术的不足,针对于CMOS图像传感器中存在的feedforward效应,本发明旨在提出一种适用于传输栅的重掺杂的P型注入工艺条件,P型重掺杂的栅在此被称作PSD TG。该方法相比于N型传输栅具有更低的沟道关闭电势,从而实现大满阱、低漏电,提升图像的信噪比以及动态范围。为此,本发明采取的技术方案是,降低前馈效应的PSD型传输栅图像传感器,含感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST,当光照射半导体上时,一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集;读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,其中,通过对传输栅TG进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度。
通过对传输栅TG进行重掺杂的P型掺杂具体指,在传输栅TG表层设置有重掺杂的P型掺杂掩模版,所述掩模版距传输栅TG边沿的距离为L;P型扩散到整个传输栅TG。
当对多晶硅栅进行P型重掺杂时,多晶硅栅的费米能级接近价带顶,其功函数大于P型衬底的功函数:
Figure BDA0003248000440000021
Figure BDA0003248000440000022
EFpp、EFpb分别为P型掺杂多晶硅的费米能级以及P型衬底的费米能级,NA为衬底掺杂浓度,多晶硅与衬底的功函数的差异一部分降落在多晶硅与衬底的表面的电势差Vms,一部分降落在衬底表面的空间电荷区,使得衬底表面与体内的电势差为Vs。电子从P型衬底流向多晶硅栅极,因此,在P型硅表面内层形成带正电的空间电荷区,多晶硅栅表面形成负电荷,形成由半导体体内指向表面的电场,
Figure BDA0003248000440000025
表面势Vs<0。
降低前馈效应的PSD型传输栅图像传感器制作方法,设置感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST,当光照射半导体上时,一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集;读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,其中,通过对传输栅TG进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度。
本发明的特点及有益效果是:
本发明描述的P型重掺杂的传输栅适用于CMOS图像传感器像素,能够在标准CMOS工艺、标准工作电压条件下有效降低feedforward效应,提升PD的满阱容量,从而提升图像的SNR、DR。
附图说明:
图1P型掺杂掩模版位置示意图。
图2像素电路示意图。
图3PD、TG势垒高度示意图。
具体实施方式
本方案主要是通过对传输栅TG进行重掺杂的P型注入,根据半导体物理基本原理,传输栅沟道电势与传输栅掺杂有关,具体可以通过以下功函数来进行分析:
当对多晶硅栅进行P型重掺杂时,多晶硅栅的费米能级接近价带顶,其功函数大于P型衬底的功函数:
Figure BDA0003248000440000023
Figure BDA0003248000440000024
EFpp、EFpb分别为P型掺杂多晶硅的费米能级以及P型衬底的费米能级,NA为衬底掺杂浓度。多晶硅与衬底的功函数的差异一部分降落在多晶硅与衬底的表面的电势差Vms,一部分降落在衬底表面的空间电荷区,使得衬底表面与体内的电势差为Vs。电子从P型衬底流向多晶硅栅极,因此,在P型硅表面内层形成带正电的空间电荷区,多晶硅栅表面形成负电荷,形成由半导体体内指向表面的电场,
Figure BDA0003248000440000032
表面势Vs<0。
当对多晶硅栅进行N型重掺杂时,多晶硅栅的费米能级接近导带底,其功函数小于P型衬底的功函数:
Figure BDA0003248000440000031
EFpn为N型掺杂多晶硅的费米能级。电子从多晶硅栅极流向P型衬底,因此,在P型硅表面内层形成带负电的空间电荷区,多晶硅栅表面形成正电荷,形成由表面指向半导体体内的电场,
Figure BDA0003248000440000033
表面势Vs>0。
以体内的电势
Figure BDA0003248000440000034
作为比较基准,可以得出P型掺杂的传输栅表面电势
Figure BDA0003248000440000035
型传输栅的表面电势
Figure BDA0003248000440000036
两者相对PD的势垒高度如图3所示,P型掺杂的传输栅的势垒高度高于n型掺杂的传输栅的势垒高度,使得热电子发射的泄漏电流减小,最终当光电流、热电子发射的电流以及PN结产生电流达到平衡时,P型掺杂的传输栅像素具有更高的满阱容量,从而得到更大的SNR以及DR。
为了更直观地表达本发明的实施条件、优点等,下面结合实例对本发明的实施方式进行描述。本发明并不局限于该具体实施例,本领域内的技术人员所熟知的一般替换也涵盖在发明的保护范围内。
发明的核心思想是:通过对传输栅进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度,从而实现大满阱、低漏电,提升图像的信噪比以及动态范围。
具体实施案例以图1的像素结构为例,图1中包含感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST。本电路的工作原理是:当光照射半导体上时,一部分光被反射,另一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集。读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,通过后续的电路传输到总线上进行处理。
通过上述分析可知,TG栅的性质影响PD的满阱容量。本发明对TG栅进行重P型掺杂,以负光刻胶为例,注入的位置如图1所示,TG栅的结构以长方形为例,为了工艺的准确性,在栅的四个顶角进行切角处理。被掩模版覆盖的位置是不被光照的位置,利用负胶在受到光照时不溶,不受光照易溶的特性,掩膜覆盖的位置为P型注入的位置,如上图1所示,P型掩模版的位置距离栅的两侧存在一定的距离L,是考虑了工艺的对准偏差,防止高浓度的P型掺杂对PD和FD造成影响,且注入的能量E不宜过高,防止击穿多晶硅栅,对沟道产生影响。本案例将该步骤放在了FD源漏自对准掺杂之后,通过快速热退火工艺使得P型扩散到整个传输栅,实现对传输栅沟道电势的调节。
像素的电路连接如图2所示,均以衬底为对照,通过外部电路将多晶硅栅和衬底连接,提供多晶硅栅与衬底的电子通路。原理是利用对多晶硅栅进行P型重掺杂,改变多晶硅栅与P型衬底的功函数差,从而调整TG沟道表面电势,增大PD与传输栅TG的势垒高度,当PD积累相同电荷时,P型掺杂的传输栅向FD的泄露电流减小,在经过一段时间的曝光后,光生电流、PN结产生电流以及泄漏电流达到平衡,PD达到满阱,此时,PSD型掺杂传输栅的PD满阱容量比N型掺杂传输栅的大,从而通过简单的P型掺杂工艺就能使得SNR、DR得到提升。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明披露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。

Claims (4)

1.一种降低前馈效应的PSD型传输栅图像传感器,其特征是,含感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST,当光照射半导体上时,一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集;读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,其中,通过对传输栅TG进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度。
2.如权利要求1所述的降低前馈效应的PSD型传输栅图像传感器,其特征是,通过对传输栅TG进行重掺杂的P型掺杂具体指,在传输栅TG表层设置有重掺杂的P型掺杂掩模版,所述掩模版距传输栅TG边沿的距离为L;P型扩散到整个传输栅TG。
3.如权利要求1所述的,其特征是,当对多晶硅栅进行P型重掺杂时,多晶硅栅的费米能级接近价带顶,其功函数大于P型衬底的功函数:
Figure FDA0003248000430000011
Figure FDA0003248000430000012
EFpp、EFpb分别为P型掺杂多晶硅的费米能级以及P型衬底的费米能级,NA为衬底掺杂浓度,多晶硅与衬底的功函数的差异一部分降落在多晶硅与衬底的表面的电势差Vms,一部分降落在衬底表面的空间电荷区,使得衬底表面与体内的电势差为Vs。电子从P型衬底流向多晶硅栅极,因此,在P型硅表面内层形成带正电的空间电荷区,多晶硅栅表面形成负电荷,形成由半导体体内指向表面的电场,
Figure FDA0003248000430000013
表面势Vs<0。
4.一种降低前馈效应的PSD型传输栅图像传感器制作方法,其特征是,设置感光区PD,控制PD到存储节点FD电荷转移的传输栅TG以及复位管RST,当光照射半导体上时,一部分光被半导体吸收,当吸收的能量高于硅禁带宽度时,会产生电子空穴对,在内建电场的作用下,光生电子被PD中的耗尽区收集;读出时,TG开启,TG栅下沟道处于导通状态,PD中的光生电荷转移到存储节点FD中,其中,通过对传输栅TG进行重掺杂的P型掺杂,得到低的沟道关闭电势,增大PD与沟道的势垒高度。
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