CN113889415A

CN113889415A - Mask plate, driving back plate, manufacturing method of driving back plate, display panel and spliced screen

Info

Publication number: CN113889415A
Application number: CN202111142997.0A
Authority: CN
Inventors: 赵雪; 谢晓冬; 何敏; 徐文结; 张新秀; 桑华煜; 杜兆宜
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Ruisheng Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Ruisheng Technology Co Ltd
Priority date: 2021-09-28
Filing date: 2021-09-28
Publication date: 2022-01-04

Abstract

The invention relates to the technical field of display, in particular to a mask plate, a driving back plate, a manufacturing method of the driving back plate, a display panel and a spliced screen. The mask plates of the display panels with different sizes can be shared. A method of making a driving back plate, comprising: manufacturing a reference mask plate according to patterns of second circuit routing lines on a reference back plate, wherein the size of the reference back plate is larger than that of a driving back plate, and the second circuit routing lines comprise a plurality of first patterns which are periodically arranged along a first direction; according to the size of the driving back plate, splicing and exposing the mother plate by using a reference mask plate to obtain a third circuit wire, wherein the size of the area where the third circuit wire is located along the first direction is equal to the size of the area where the first circuit wire is located along the first direction, the size of the area where the third circuit wire is located along the second direction is equal to the size of the area where the second circuit wire is located along the second direction, and the first direction is perpendicular to the second direction; and cutting the spliced and exposed mother board to obtain the driving back board.

Description

Mask plate, driving back plate, manufacturing method of driving back plate, display panel and spliced screen

Technical Field

The invention relates to the technical field of display, in particular to a mask plate, a driving back plate, a manufacturing method of the driving back plate, a display panel and a spliced screen.

Background

At present, the demands of minileds (Mini Light Emitting diodes) and Micro leds (Micro Light Emitting diodes) with high brightness and high contrast in the market are on a remarkable trend, and compared with the minileds and Micro leds based on PCBs (Printed Circuit boards), the glass-based minileds and Micro leds can achieve thinner line width and more dense wiring arrangement mode, and have great development potential.

However, glass-based MiniLED and micro led products limit the market competitiveness of glass-based MiniLED and micro led products due to the high cost of the mask used for their preparation.

Disclosure of Invention

The invention mainly aims to provide a mask plate, a driving back plate, a manufacturing method of the driving back plate, a display panel and a spliced screen. The mask plates of the display panels with different sizes can be shared.

In order to achieve the purpose, the invention adopts the following technical scheme:

on one hand, a manufacturing method of a driving back plate is provided, wherein the driving back plate is provided with a first circuit wire; the preparation method comprises the following steps:

manufacturing a reference mask plate according to a pattern of a second circuit wire of a reference back plate, wherein the size of the reference back plate is larger than that of the driving back plate, and the second circuit wire comprises a plurality of first patterns which are periodically arranged along a first direction; according to the size of the driving back plate, splicing and exposing a mother plate by using the reference mask plate to obtain a third circuit trace, wherein the size of the area where the third circuit trace is located along the first direction is equal to the size of the area where the first circuit trace is located along the first direction, the size of the area where the third circuit trace is located along the second direction is equal to the size of the area where the second circuit trace is located along the second direction, and the first direction is perpendicular to the second direction; and cutting the spliced and exposed mother board to obtain the driving back board.

In some embodiments, the performing a stitching exposure on the motherboard by using the reference mask plate according to the size of the driving backplane comprises:

dividing the motherboard into a splicing exposure area according to the size of the area where the first circuit trace is located along the first direction, wherein the size of the splicing exposure area along the first direction is equal to the size of the area where the first circuit trace is located along the first direction, and the size of the splicing exposure area along the second direction is equal to the size of the area where the second circuit trace is located along the second direction; and moving the reference mask plate in the first direction, splicing and exposing different positions of the splicing and exposing area corresponding to the first direction, and forming patterns of the first circuit wiring corresponding to different positions of the splicing and exposing area.

In some embodiments, the performing the stitching exposure on different positions of the stitching exposure area corresponding to the first direction by moving the reference mask plate in the first direction includes:

dividing the splicing exposure area into a first exposure area and a second exposure area which are sequentially arranged along the first direction, wherein the first exposure area and the second exposure area are adjacent, the edges close to each other are overlapped to form a splicing line, and the first circuit routing comprises a second pattern corresponding to the first exposure area and a third pattern corresponding to the second exposure area; and exposing the first exposure area by using the first part of the reference mask plate corresponding to the second pattern, and exposing the second exposure area by using the second part of the reference mask plate corresponding to the third pattern.

In some embodiments, the exposing the first exposure region with the first portion of the reference mask corresponding to the second pattern and the exposing the second exposure region with the second portion of the reference mask corresponding to the third pattern includes:

dividing the reference mask plate into a first area and a second area along the first direction, wherein the size of the first area along the second direction is larger than that of an area where the second pattern is located along the second direction, and the size of the second area along the second direction is larger than that of an area where the third pattern is located along the second direction; placing the reference mask plate on the mother plate, enabling the first area to be opposite to the first exposure area, covering the rest areas except the first area in the reference mask plate, and exposing the first exposure area; and translating the reference mask plate to ensure that the second area is just opposite to the second exposure area, covering the rest areas except the second area in the reference mask plate, and exposing the second exposure area.

In some embodiments, before performing the tile exposure on the motherboard by using the reference mask plate according to the size of the driving backplane, the method further includes:

and mutually connecting the first part and the second part of the reference mask plate along the first direction, and thickening the first pattern part close to the splicing line in the second direction.

In some embodiments, the first pattern portion and the second pattern portion of the mask reference plate are connected to each other along the first direction, and the first pattern portion near the stitching line is thickened in the second direction, which occurs during the process of manufacturing the mask reference plate according to the size of the reference back plate.

In some embodiments, the thickening of the first pattern portion of the reference mask plate, which is connected to the second pattern portion of the reference mask plate along the first direction and is close to the stitching line, in the second direction includes:

and increasing the size of the first pattern part along the second direction, so that two edges of the first pattern part in the second direction respectively move to two sides by the same size.

In some embodiments, a dimension of each of two edges of the first pattern part in the second direction moving to both sides is greater than or equal to 10 micrometers.

In some embodiments, the plurality of first patterns comprises a plurality of rows of coupling portions arranged periodically along the first direction; the splicing line is formed between two adjacent rows of coupling portions.

In some embodiments, each first pattern includes at least two rows of coupling portions; the splicing line is formed between two adjacent first patterns.

In some embodiments, the dicing the spliced exposed mother board includes:

and cutting a part of the motherboard, which exceeds the first circuit trace, in a part corresponding to the third circuit trace according to the size of the area of the first circuit trace along the second direction.

In some embodiments, the cutting, according to a size of an area where the first circuit trace is located along the second direction, a portion of the motherboard corresponding to the third circuit trace, which exceeds the first circuit trace, includes:

and respectively cutting the two sides of the area where the third circuit wire is located along the second direction to the same size according to the size difference of the area where the first circuit wire is located and the area where the third circuit wire is located along the second direction.

In another aspect, a driving back plate is provided, including: the circuit board comprises a substrate and a first circuit wire arranged on the substrate, wherein the first circuit wire comprises a plurality of first patterns which are periodically arranged along a first direction; the plurality of first patterns include a second pattern part extending in a first direction; the second pattern part comprises at least one group of first thickened patterns along the extension direction of the second pattern part, each group of first thickened patterns comprises a plurality of first thickened patterns, the size of each first thickened pattern along the second direction is larger than that of a first reference pattern along the second direction, and the first reference pattern is a part which is contacted with the first thickened patterns along the extension direction of the second pattern part; the first direction and the second direction are perpendicular.

In some embodiments, the plurality of first patterns includes a plurality of rows of coupling portions arranged periodically along the first direction, and any one of the first thickening patterns is located between two adjacent rows of coupling portions. Or, each first pattern includes at least two rows of coupling portions, and any one group of the first thickened patterns is located between two adjacent first patterns.

In another aspect, there is provided a display panel including: the driving back plate is provided with a plurality of light emitting devices, and the light emitting devices are arranged on the driving back plate.

On the other hand, a spliced screen is provided, the spliced screen is formed by splicing a plurality of display panels, wherein at least one display panel is the display panel.

In still another aspect, there is provided a mask including: a plurality of first patterns arranged periodically along a third direction; the plurality of first patterns includes a third pattern part extending in a third direction; the third pattern part comprises at least two groups of second thickened patterns along the extension direction of the third pattern part, each group of second thickened patterns comprises a plurality of second thickened patterns, the size of each second thickened pattern along the fourth direction is larger than that of a second reference pattern along the second direction, and the second reference pattern is a part which is contacted with the second thickened patterns along the extension direction of the third pattern part; the third direction and the fourth direction are perpendicular.

The embodiment of the invention provides a mask plate, a driving back plate, a manufacturing method of the driving back plate, a display panel and a spliced screen, which can realize the manufacturing of a set of common mask plates for display panels with different sizes by only changing an exposure mode on the basis of not changing the existing process and circuit design, do not additionally increase the process difficulty under the condition of realizing self-adaptive size, and are beneficial to realizing the mass production of products.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1A is a top view of a tiled screen according to an embodiment of the present invention;

fig. 1B is a cross-sectional view of a display panel according to an embodiment of the invention;

fig. 1C is a cross-sectional view of another display panel according to an embodiment of the invention;

FIG. 2A is a comparison of a tiled screen with 90 inch, 98 inch and 110 inch display panels according to an embodiment of the present invention;

FIG. 2B is a comparison of the dimensions of a 90 inch, 98 inch and 110 inch display panel and a mask panel provided by an embodiment of the present invention;

fig. 3A is a flowchart of steps S10 and S20 in a method for manufacturing a driving back plate according to an embodiment of the present invention;

fig. 3B is a flowchart of steps S10 and S20 in another method for manufacturing a driving back plate according to an embodiment of the invention;

fig. 3C is a flowchart of step S20 according to the present invention;

fig. 3D is a top view of the mask and the third circuit trace corresponding to step S202 according to the embodiment of the present invention;

fig. 3E is a top view of the mask and the third circuit trace corresponding to step S202 according to the embodiment of the present invention;

fig. 3F is a pattern comparison diagram of the exposed mask before and after the mask is thickened at the position corresponding to the splicing line in the first circuit trace according to the embodiment of the present invention;

fig. 3G is a structural diagram of line numbers of reference masks corresponding to two exposures of a 90-inch, 98-inch and 110-inch display panel according to an embodiment of the present invention;

fig. 3H is a structural diagram of a pattern of a mask plate exposed after being thickened at a position corresponding to a splicing line in another first circuit trace according to an embodiment of the present invention;

fig. 3I is a circuit diagram corresponding to a lamp area according to an embodiment of the present invention;

fig. 3J is a flowchart of step S30 in the method for manufacturing a driving back plate according to the embodiment of the present invention;

FIG. 4A is a top view of a second conductive layer of a 100 inch MiniLED display panel according to an embodiment of the present invention;

FIG. 4B is a top view of a second conductive layer of a 90 inch MiniLED display panel according to an embodiment of the present invention;

fig. 5 is a structural diagram of a mask according to an embodiment of the present invention.

Detailed Description

Technical solutions in some embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided by the present disclosure belong to the protection scope of the present disclosure.

Unless the context requires otherwise, throughout the description and the claims, the term "comprise" and its other forms, such as the third person's singular form "comprising" and the present participle form "comprising" are to be interpreted in an open, inclusive sense, i.e. as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified.

In describing some embodiments, expressions of "coupled" and "connected," along with their derivatives, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, some embodiments may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents herein.

"at least one of A, B and C" has the same meaning as "A, B or at least one of C," each including the following combination of A, B and C: a alone, B alone, C alone, a and B in combination, a and C in combination, B and C in combination, and A, B and C in combination.

"A and/or B" includes the following three combinations: a alone, B alone, and a combination of A and B.

The use of "adapted to" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted to or configured to perform additional tasks or steps.

Additionally, the use of "based on" means open and inclusive, as a process, step, calculation, or other action that is "based on" one or more stated conditions or values may in practice be based on additional conditions or values beyond those stated.

As used herein, "about" or "approximately" includes the stated values as well as average values within an acceptable deviation range for the particular value, as determined by one of ordinary skill in the art in view of the measurement in question and the error associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

Example embodiments are described herein with reference to cross-sectional and/or plan views as idealized example figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

Some embodiments of the present disclosure provide a tiled screen 200, as shown in fig. 1A, the tiled screen 200 is tiled from a plurality of display panels 100. Illustratively, the tiled display screen 200 can further include a driving circuit configured to drive the plurality of display panels 100 for display.

The tiled screen 200 can be: any one of a display, a television, a billboard, a laser printer with a display function, a household appliance, a large-area wall, an information inquiry apparatus (such as a business inquiry apparatus in the departments of e-government, bank, hospital, electric power, etc.), a mobile phone, a Personal Digital Assistant (PDA), a Digital camera, a portable video camera, a navigator, etc.; it may also be a microdisplay, or a product containing a microdisplay, such as a near-eye Display or a wearable device, etc., in particular an AR/VR system, smart glasses, a Head Mounted Display (HMD for short) and a heads Up Display (HUD for short).

In some embodiments, the Display panel 100 may be an OLED (Organic Light Emitting Diode) panel, a QLED (Quantum Dot Light Emitting Diode) panel, an LCD (Liquid Crystal Display) Display panel, an LED (including Mini LED or Micro LED) panel, or the like.

In some embodiments, as shown in fig. 1A and 1B, the display panel 100 may include: the driving device comprises a driving backboard 1 and a plurality of light emitting devices 2, wherein the driving circuit is used for providing a driving signal to the driving backboard 1, and the driving backboard 1 is used for driving the plurality of light emitting devices 2 to emit light under the control of the driving signal.

Here, the display panel 100 is taken as an LED panel, and the driving backplane is taken as an LED driving backplane.

Some embodiments of the present disclosure provide a driving backplane, as shown in fig. 1C, comprising: the circuit trace 12 may include a plurality of

conductive layers

121 and 124, and a plurality of insulating layers, which may include a first passivation layer 122 and a flat layer 123 disposed between the first conductive layer 121 and the second conductive layer 124, and a second passivation layer 125 and a protective layer 126 disposed on a side of the second conductive layer 124 away from the substrate 11. Each layer of conductive pattern and each layer of insulating layer can be prepared by adopting a mask plate.

The first conductive layer 121 is generally used to arrange various signal lines, such as a common voltage line GND, a driving voltage line VLED, a source power line PWR, a source address line DI, and the like. Optionally, the first conductive layer 121 has a film thickness of about 1.5 μm to about 7 μm, and the material thereof includes copper, for example, the material may be copperForming a laminated material such as MoNb/Cu/MoNb by sputtering, the bottom layer of MoNb

For improving adhesion, an intermediate Cu layer for transmitting electrical signals and a top MoNb layer

Used for preventing oxidation. The film layer can also be formed by electroplating, wherein a seed layer 121a (MoNiTi) is formed to increase the nucleation density of crystal grains, and an oxidation-proof layer 121b (MoNiTi) is formed after electroplating.

The second conductive layer 124 is generally used for providing various pads, such as a pad for mounting a functional element or a pad for mounting a functional element driving chip; the second conductive layer 124 may also be provided with leads for connection. Optionally, the second conductive layer 124 has a film thickness of about

The material can be a laminated material of MoNb/Cu/CuNi, the bottom MoNb layer is used for improving the adhesion, the middle Cu layer is used for transmitting electric signals, and the top CuNi layer can achieve both oxidation resistance and crystal solidification firmness.

In some embodiments, the material of the first passivation layer 122 may be an inorganic material, such as silicon nitride, silicon oxide, or silicon oxynitride. The material of the planarization layer 123 may be an organic material, such as polyimide, epoxy, phenolic, or other organic materials. Vias are disposed on the first passivation layer 122 and the planarization layer 123 for coupling the second conductive layer 124 and the first conductive layer 121. The material of the second passivation layer 125 may be an inorganic material, such as silicon nitride, silicon oxide, or silicon oxynitride. The material of the protective layer 126 may be an inorganic-organic composite material. The second passivation layer 125 and the protection layer 126 may be provided thereon with a via hole for connecting the light emitting device 2 and the second conductive layer 124.

In order to increase the stress between the first conductive layer 121 and the substrate 11, a buffer layer 13 may be further disposed between the substrate 11 and the first conductive layer 121. The buffer layer 13 is made of an inorganic material such as silicon nitride or silicon oxide.

In some embodiments, substrate 11 may be a glass substrate. The LED display panel based on the PCB (Printed Circuit Board) base is not superior to a product requiring a thinner line width due to the limitation of copper thickness, line width, and Board, such as an AM MiniLED (Active Matrix Mini Light Emitting Diode) product. The glass-based back plate can be thinner in line width and more dense in wiring arrangement mode, and has great development potential. Meanwhile, the glass substrate has advantages on large-size products, the PCB is limited by the influence of various factors such as plates and equipment, the splicing number is large when the large-size products are involved, the splicing seams are obvious, the size of the glass substrate is large enough, the splicing times can be reduced, and the visual effect is effectively improved.

However, in the related art, for the display panels with different sizes, the patterns of the circuit traces 12 of the driving back plate 1 are different according to the different pitches of the light emitting devices 2 (such as LEDs), so that the display panels with different sizes need mask plates M' with different patterns for manufacturing, which undoubtedly increases the production cost, and especially for the glass-based MiniLED display panel, the display panels are not favorable for quickly opening the market, thereby being unfavorable for improving the market competitiveness.

In addition, in the prior art, for example, 90-inch, 98-inch and 110-inch MiniLED display panels are manufactured on a glass substrate of a 6.5 generation production line, as shown in fig. 2A and 2B, on one hand, for different sizes of tiled screens, 4 MiniLED display panels are required to be tiled to form a complete product size. On the other hand, during manufacturing, the mask M 'itself has a limited size, such as 752mm 1100mm, while the 90-inch display panel has a size of 500mm (short side direction) 1200mm (long side direction), the 98-inch display panel has a size of 540mm 1220mm, and the 110-inch display panel has a size of 600mm 1370mm, so that the display panels of the same size (such as 90 inches, 98 inches, or 110 inches) that are not placed on one mask M' all need to be spliced and exposed in the long side direction.

Based on the above, some embodiments of the present disclosure provide a method for manufacturing a driving backplane 1 capable of realizing the sharing of a mask plate M ', so that the mask plate M' can be shared when manufacturing display panels of different sizes, the manufacturing cost of a glass-based large-size MiniLED is reduced, and the market can be opened quickly.

For example, as shown in fig. 2A and fig. 2B, the driving backplane 1 may be a 90-inch MiniLED backplane, that is, the driving backplane 1 has a dimension of 500mm (short side direction) × 1200mm (long side direction), and the driving backplane 1 has first circuit traces.

As shown in fig. 3A to 3I, the preparation method includes:

s10, manufacturing a reference mask M according to the pattern of the second circuit trace 12_2 of the reference backplate 1 ', wherein the size of the reference backplate 1' is larger than that of the driving backplate 1, and the second circuit trace 12_2 includes a plurality of first patterns periodically arranged along a first direction (as shown by arrow a in fig. 3B).

Wherein, the reference back plate 1' may be exemplified by a 110 inch MiniLED back plate or a 98 inch MiniLED back plate. The plurality of first patterns may exemplify a pattern in which the second circuit trace 12_2 is located in the display area a.

An example of the size of the reference mask M may be 752mm 1100 mm. By using the reference mask M, the second circuit trace 12_2 can be manufactured by performing splicing exposure in the long side direction (i.e. the first direction a) of the reference back plate 1'.

Therefore, according to the size of the reference back plate 1', the pattern drawing is carried out on the reference mask plate M, and then the reference mask plate M can be manufactured according to the drawn pattern.

Here, taking the example that the display panel 100 to which the reference backplane 1' belongs includes a plurality of LEDs arranged in an array, and a pitch of the LEDs (that is, a pitch between every two adjacent LEDs) is 8mm, a pattern of the second circuit trace 12_2 in the display area may be a plurality of first patterns periodically arranged along a first direction, and a pattern of the second circuit trace 12_2 in the binding area B is different from the plurality of first patterns, at this time, when the reference mask M is manufactured, the reference mask M may include a portion of the patterns corresponding to the plurality of first patterns periodically arranged along the first direction, and a pattern corresponding to the second circuit trace 12_2 in the binding area B, so that the reference mask M is used to perform splicing exposure on the motherboard, and a pattern identical to the second circuit trace 12_2 can be obtained.

S20, as shown in fig. 3A and 3B, according to the size of the driving backplane 1, performing a splicing exposure on the motherboard W by using a reference mask M to obtain a third circuit trace 12_3, where a size of a region where the third circuit trace 12_3 is located along the first direction is equal to a size of a region where the first circuit trace is located along the first direction (that is, a size of the region where the first circuit trace is located along the long side direction of the driving backplane 1), a size of the region where the third circuit trace 12_3 is located along the second direction (as shown by an arrow B in fig. 3B) is equal to a size of a region where the second circuit trace 12_2 is located along the second direction, and the first direction is perpendicular to the second direction.

That is, the reference mask plate M for manufacturing the reference backplate 1 'is used to perform the splicing exposure on the motherboard W, and at this time, similarly to the reference backplate 1' manufactured by performing the splicing exposure on the motherboard W by using the reference mask plate M, the reference mask plate M is used to perform the splicing exposure in the long side direction (i.e., the first direction) of the driving backplate 1, and with reference to fig. 3B and 3C, the method specifically includes:

s201, dividing the motherboard W into a splicing exposure area Q according to the size of the area where the first circuit trace is located along the first direction, wherein the size of the splicing exposure area Q along the first direction is equal to the size of the area where the first circuit trace is located along the first direction, and the size of the splicing exposure area Q along the second direction is equal to the size of the area where the second circuit trace 12_2 is located along the second direction.

That is, the dimension of the splicing exposure area Q along the second direction is greater than the dimension of the area of the driving backplane 1 where the first circuit traces are located along the second direction, and the dimension of the splicing exposure area Q along the first direction defines the dimension of the area of the driving backplane 1 where the first circuit traces are located along the first direction.

S202, moving the reference mask plate M in the first direction, splicing and exposing different positions of the splicing and exposing area Q corresponding to the first direction, and forming patterns of first circuit routing lines corresponding to different positions of the splicing and exposing area Q.

Specifically, the reference mask M and the portions of the first circuit trace corresponding to the patterns of the different regions in the first direction may be used to expose the respective regions, so as to obtain the pattern of the first circuit trace.

In some embodiments, the stitching exposure is performed on different positions of the stitching exposure area corresponding to the first direction by moving the reference mask M in the first direction, as shown in fig. 3C, including:

the splicing exposure area Q is divided into a first exposure area Q1 and a second exposure area Q2 which are sequentially arranged along a first direction, the first exposure area Q1 is adjacent to the second exposure area Q2, the two adjacent edges are overlapped to form a splicing line L, and the first circuit wiring comprises a second pattern corresponding to the first exposure area Q1 and a third pattern corresponding to the second exposure area Q2.

The first exposure region Q1 is exposed using a first portion of the reference mask M corresponding to the second pattern, and the second exposure region Q2 is exposed using a second portion of the reference mask M corresponding to the third pattern.

That is, the splice exposure area Q is divided into two exposure areas for splice exposure, and the patterns of the two exposure areas may be the same or different.

Here, referring to fig. 3B and fig. 3C, still taking as an example that the second circuit trace 12_2 includes a plurality of first patterns located in the display area a and patterns located in the bonding area B, the second pattern may include a plurality of first patterns periodically arranged along the first direction, and the third pattern at least includes the patterns located in the bonding area B.

For example, as shown in fig. 3D, taking a MiniLED display panel whose display panel the driving backplane 1 belongs to is 90 inches as an example, the driving backplane 1 may include a pattern corresponding to a circuit diagram connected to 45 rows of LEDs and a pattern of a binding region B, since the reference mask M has a pattern corresponding to a circuit diagram connected to 35 rows of LEDs therein and a pattern corresponding to a binding region B, the second pattern may be a circuit diagram connected to N rows of LEDs, N is greater than or equal to 1 and less than or equal to 35, the third pattern may be a pattern of a binding region B and a circuit diagram connected to M rows of LEDs, and M + N is equal to 45. At this time, the first portion of the reference mask M corresponding to the second pattern may be a portion corresponding to a circuit pattern connected to n rows of LEDs, and the second portion of the reference mask M corresponding to the third pattern may be a portion corresponding to the binding region B and a circuit pattern connected to M rows of LEDs.

Specifically, referring to fig. 3C and 3D, taking the second pattern corresponding to the patterns corresponding to the 14 th row (Z14) to the 35 th row (Z35) in the reference mask M as an example, the third pattern corresponds to the pattern corresponding to the binding region B in the reference mask M and corresponds to the patterns corresponding to the 1 st row (Z1) to the 23 th row (Z23) in the reference mask M, so that the first exposure region Q1 may be exposed using the portion corresponding to the 14 th row to the 35 th row in the reference mask M, and the second exposure region Q2 may be exposed using the portion corresponding to the 1 st row to the 23 th row in the reference mask M, that is, in the first exposure, the stitching line L is located between the 13 th row and the 14 th row in the reference mask M, in the second exposure, the stitching line L is located between the 23 th row and the 24 th row in the reference mask M, or, in the first exposure, the stitching line L is located between the 23 th row and the 24 th row in the reference mask M, in the second exposure, the splicing line L is located between the 13 th line and the 14 th line in the reference mask M, so that the pattern of the first circuit trace corresponding to the LEDs in the 35-14+1+ 23-45 th line can be obtained.

Similarly to the above, in conjunction with fig. 3C and 3E, taking as an example that the display panel to which the driving back plate belongs includes 50 rows of LEDs, the first exposure region Q1 may be exposed using the portions corresponding to the 12 th row (Z12) to the 35 th row (Z35) in the reference mask plate M, and the second exposure region Q2 may be exposed using the portions corresponding to the 1 st row (Z1) to the 26 th row (Z26) in the reference mask plate M, so that the pattern of the first circuit traces 12 corresponding to the LEDs of 35-12+1+26 — 50 rows may be obtained.

In some embodiments, exposing the first exposure region Q1 with a first portion of the reference mask M corresponding to the second pattern and exposing the second exposure region Q2 with a second portion of the reference mask M corresponding to the third pattern includes:

as shown in fig. 3C, 3D, and 3E, the reference mask M is divided into a first region P1 and a second region P2 in the first direction, a size of the first region P1 in the second direction is larger than a size of a region where the second pattern is located in the second direction, and a size of the second region P2 in the second direction is larger than a size of a region where the third pattern is located in the second direction.

The reference mask M is placed on the master W with the first region P1 facing the first exposure region Q1, and the remaining regions of the reference mask M except for the first region P1 are masked to expose the first exposure region Q1.

The mask blank M except the first region P1 may be masked with a mask, for example, to expose the first exposure region Q1.

The reference mask M is translated so that the second region P2 is aligned with the second exposure region Q2, and the remaining regions of the reference mask M except the second region P2 are covered to expose the second exposure region Q2.

For example, the mask M may be translated in the first direction such that the second region P2 is aligned with the second exposure region Q2.

It should be noted that, in the process of exposing the first exposure region Q1 by using the first portion of the reference mask M corresponding to the second pattern and exposing the second exposure region Q2 by using the second portion of the reference mask M corresponding to the third pattern, the alignment precision difference of the two exposures may cause poor splicing between the patterns connected along the first direction, and cause poor connection or even disconnection of the patterns at the splicing line.

As in the above example, taking the second pattern and the pattern corresponding to the 14 th row to the 35 th row in the reference mask M as an example, the stitching line L formed by two exposures is located between the circuit diagrams corresponding to the 23 rd row and the 24 th row in the first circuit trace, as shown in the enlarged view in the dashed line frame on the right side in fig. 3F, in the case that there is a deviation in the alignment precision of the two exposures, a deviation occurs between the patterns R which are close to the stitching line L and are connected to each other along the first direction, which is not favorable for the effective connection of the patterns R.

Based on this, in some embodiments, before performing the stitching exposure on the motherboard W by using the reference mask M according to the size of the driving backplane 1, the method further includes:

and mutually connecting the first part and the second part of the reference mask plate M along the first direction, and thickening the first pattern part close to the splicing line L in the second direction.

Through in the first part and the second part to reference mask board M along first direction interconnect, and be close to the first pattern portion of concatenation line L and add thick processing in the second direction, when the counterpoint precision of twice exposure exists the deviation, can compensate the deviation that the counterpoint appears through the first pattern portion that adds thick to can prevent to appear concatenation and connect the problem bad between the pattern R of connecting, even take place the broken string.

In some embodiments, the first and second portions of the mask reference M are connected to each other along a first direction, and the first pattern portion near the stitching line L is subjected to a thickening process in a second direction, which occurs during the process of manufacturing the mask reference M according to the size of the reference backplate 1'.

Specifically, in the process of manufacturing the reference mask plate M according to the size of the reference backplate 1', the drawing patterns corresponding to the first pattern portions can be thickened in the process of drawing the patterns of the reference mask plate M according to the size of the reference backplate, so that the thickened first pattern portions can be obtained in the subsequent manufacturing of the reference mask plate M.

In some embodiments, the thickening of the first pattern portion, which is close to the stitching line L, in the second direction, of the first portion and the second portion of the reference mask M, which are connected to each other along the first direction, includes:

and increasing the size of the first pattern part along the second direction to ensure that two edges of the first pattern part in the second direction respectively move towards two sides by the same size.

That is, both sides of the first pattern portion in the second direction are thickened, so that when the second exposure is performed, the problem that one part of the connection in the first pattern portion is deviated to the thickened side along the second direction relative to the other part of the connection, and the deviation caused by the deviation is not compensated is avoided.

Based on the above, in some embodiments, in the driving backplane 1, the first circuit trace 12_1 includes a plurality of first patterns periodically arranged along the first direction. The plurality of first patterns include a second pattern part extending in a first direction. The second pattern part comprises at least one group of first thickened patterns along the extending direction of the second pattern part, each group of first thickened patterns comprises a plurality of first thickened patterns, the size of each first thickened pattern along the second direction is larger than that of the first reference pattern along the second direction, and the first reference pattern is a part which is contacted with the first thickened patterns along the extending direction of the second pattern part. The first direction and the second direction are perpendicular.

That is, by performing thickening processing on the first pattern portion of the reference mask M close to the splicing line L during exposure, the reference mask M may be thickened at multiple positions, and thus, in the two exposure processes, at positions other than the region corresponding to the splicing line L, the thickened portion may be left in the finally manufactured product, which makes the first circuit trace 12_1 include at least one set of first thickened patterns (the first thickened patterns are thickened portions left on the driving backplane 1 at positions other than the region corresponding to the splicing line L). As shown by the left dashed box in fig. 3F, the case of the pattern R (i.e., the first bold pattern) where the bold portion remains on the driving back plate is shown.

In some embodiments, in the case of using the reference mask M for 90 inch, 98 inch and 110 inch display panels, see table 1 and fig. 3G, taking the example of the pattern between the 13 th row and the 14 th row, the pattern between the 23 th row and the 24 th row, the pattern between the 11 th row and the 12 th row, the pattern between the 26 th row and the 27 th row, the pattern between the 9 th row and the 10 th row, and the pattern between the 28 th row and the 29 th row of the reference mask M as bold patterns, when a 90 inch display panel is manufactured by exposure through the reference mask M, the patterns of the 1 st row to the 13 th row are masked during the first exposure, the bold patterns in the 14 th row to the 35 th row are left on the driving back plate, so that the bold patterns between the 23 th row and the 24 th row, the bold patterns between the 26 th row and the 27 th row, and the bold patterns between the 28 th row and the 29 th row are left on the driving back plate, in the second exposure, the patterns in the 24 th to 35 th rows are masked, and the thickened patterns in the 1 st to 23 th rows are left on the driving backboard 1, that is, the patterns between the 9 th and 10 th rows, the patterns between the 11 th and 12 th rows, and the patterns between the 13 th and 14 th rows are left on the driving backboard, that is, through two exposures, the thickened patterns finally left on the driving backboard 1 have six positions, that is, the first thickened patterns are six groups.

TABLE 1

In some embodiments, a dimension of each of two edges of the first pattern part in the second direction moving to both sides is greater than or equal to 10 micrometers. That is, the first pattern portion is unilateral and is thickened by at least 10 micrometers in the second direction according to the management and control that the maximum offset in the splicing exposure is 10 micrometers.

In some embodiments, as shown in fig. 3F, the plurality of first patterns includes a plurality of rows of coupling portions G arranged periodically along the first direction. The splicing line L is formed between two adjacent rows of coupling portions G.

The coupling portion G is a portion of the second circuit trace 12 connected to the LED (i.e. a pad of the LED), and the splicing line L is formed between two adjacent rows of coupling portions G, so that the thickening effect can be reduced.

Based on the above, in some embodiments, in the driving backplane 1, the plurality of first patterns include a plurality of rows of coupling portions G arranged periodically along the first direction, and each group of first thickening patterns (i.e., R) is formed between two adjacent rows of coupling portions G.

In other embodiments, as shown in fig. 3H, each first pattern includes at least two rows of coupling portions G. The stitching line L is formed between two adjacent first patterns.

The coupling portions G are also the portions of the first circuit traces 12_1 connected to the LEDs (i.e., the pads of the LEDs), and since the plurality of first patterns are periodically arranged along the second direction and each first pattern includes at least two rows of coupling portions G, at least two rows of coupling portions G can form one lamp area, and the splicing line L is formed between two adjacent lamp areas, i.e., on the lower side of each lamp area, so that the thickening effect can be minimized, because, as shown in fig. 3H, the thickening pattern finally left on the driving backplane 1 can be minimized.

Based on the above, in some embodiments, in the driving backplane 1, each first pattern includes at least two rows of the coupling portions G, and each group of the first thickening patterns (i.e., R) is formed between two adjacent first patterns.

As shown in fig. 3I, a circuit diagram (i.e. a first pattern) corresponding to a lamp region includes a driving pad set, and the driving pad set includes: a first input pad Di, a second input pad Pwr, an output pad Out, and a common voltage pad Gnd.

The first input pad Di is configured to receive a first input signal, for example, an address signal, for gating a driving chip of a corresponding address, which is mounted on the driving pad group. For example, the addresses of different driver chips may be the same or different. The first input signal may be an 8-bit address signal, and the driving chip mounted on the driving pad group may know an address to be transmitted by analyzing the address signal.

The second input pad Pwr is configured to receive a second input signal, for example a power line carrier communication signal. For example, the second input signal not only provides power for the driver chip mounted on the driver pad group, but also transmits communication data to the driver chip, and the communication data can be used for controlling the light emitting duration of the corresponding LED, and further controlling the visual light emitting brightness of the LED.

The output pad Out is configured to output a driving signal and a relay signal. For example, the relay signal is an address signal supplied to the other driver chip, that is, the first input pad Di of the other driver chip (here, the driver chip of the next row) receives the relay signal as a first input signal, thereby acquiring the address signal. For another example, the driving signal may be a driving current for driving the LED to emit light.

The common voltage pad Gnd is configured to receive a common voltage signal, such as a ground signal.

At this time, the driving chip mounted on the driving pad group is configured to output a relay signal through the output pad Out for a first period according to a first input signal received by the first input pad Di and a second input signal received by the second input pad Pwr, and to supply a driving signal to the plurality of LEDs connected in series in sequence through the output pad Out for a second period. Specifically, in the first period, the output pad Out outputs a relay signal, which is supplied to the other driving chips to make the other driving chips obtain the address signal. In the second period, the output pad Out outputs a driving signal, which is supplied to the plurality of LEDs connected in series in sequence, so that the LEDs emit light in the second period. It is to be understood that the first period is a different period than the second period, and the first period may be earlier than the second period, for example. The first time interval can be continuously connected with the second time interval, and the ending time of the first time interval is the starting time of the second time interval; alternatively, there may be another period in between the first period and the second period, and the other period may be used to implement other required functions, and the other period may also be used only to separate the first period and the second period, so as to avoid signals of the output pad Out in the first period and the second period from interfering with each other.

In one lamp region, the driving voltage terminal Vled is coupled to the driving voltage line Vled. In the driving pad group, a first input pad Di is coupled to a source address line Di or an output pad Out of other lamp regions, second input pads Pwr are coupled to a source voltage line Pwr, the output pads Out are coupled to LEDs of the lamp regions and the first input pads Di of other lamp regions, and a common voltage pad Gnd is coupled to a common voltage line Gnd.

The source address line DI is configured to transmit a first input signal. The source address line DI may be coupled to the first input pad DI of a first one of the (at least two) lamp areas. The output pad Out of each of the lamp zones except the last lamp zone is coupled to the first input pad Di of the next lamp zone to the lamp zone. The output pad Out of the last one of the lamp zones may be coupled to a signal output terminal to form a loop. In addition, the output pad Out of each of the lamp zones is coupled with the LED of the lamp zone to output a driving signal to a plurality of LEDs mounted on the lamp zone arranged in series.

The source voltage line PWR is configured to transmit the second input signal. For example, each source voltage line PWR is coupled to at least one lamp area (one or more lamp areas, e.g., a column of lamp areas), and provides a second transmission signal to each second input pad PWR in all the lamp areas coupled thereto.

The driving voltage line VLED is configured to transmit a driving voltage. For example, each driving voltage line VLED is coupled to at least one lamp region (one or more lamp regions, e.g., a row of lamp regions), and supplies a driving voltage to all the lamp regions coupled thereto. The driving voltage terminal of each lamp region may be a portion of one driving voltage line VLED at a coupling position with the lamp region.

The common voltage line GND is configured to transmit a common voltage. For example, each common voltage line GND is coupled to at least one lamp region (one or more lamp regions, e.g., a column of lamp regions), and supplies a common voltage to the common voltage pads GND in all the lamp regions to which it is coupled. The common voltage is, for example, a ground signal.

S30, as shown in fig. 3J, the mother board W after the splicing exposure is cut to obtain the drive back plate 1.

The method specifically comprises the following steps: and cutting the part of the mother board, which exceeds the first circuit wire, in the part corresponding to the third circuit wire according to the size of the area where the first circuit wire is positioned along the second direction.

Since the first circuit trace and the third circuit trace are axisymmetric patterns along the second direction, and the binding region B is located in the middle of the reference mask M along the second direction, the binding region B is designed not to affect the electrical performance.

Optionally, according to the size of the area where the first circuit trace is located along the second direction, the portion of the motherboard corresponding to the third circuit trace, which exceeds the first circuit trace, is cut, including:

Namely, the area where the third circuit wiring is located is cut symmetrically at two sides, so that the influence on the binding area caused by cutting from a single side can be avoided.

In summary, the embodiments of the present disclosure can implement the manufacturing of a set of reference mask plates shared by display panels of different sizes by only changing the exposure mode on the basis of not changing the existing process and circuit design, and do not increase the process difficulty additionally when implementing the adaptive size, which is beneficial to implementing the mass production of products.

In addition, the display panels with different sizes obtained based on the preparation method have uniform LED intervals, and the product requirements of the display panels with different sizes and uniform LED intervals can be met, so that low-cost products can be obtained.

However, for the situation that different LED pitches are required for different products with different sizes, some embodiments of the present disclosure provide a design that the LED pitches of products with different sizes are increased by integer multiples, specifically, taking as an example that 7 masks (that is, mask 1 and mask 2 used for manufacturing the first conductive layer, mask 3 used for manufacturing the first passivation layer 123, mask 4 used for manufacturing the flat layer 124, mask 5 used for manufacturing the second conductive layer 124, mask 6 used for manufacturing the second passivation layer 125, and mask 7 used for manufacturing the protective layer 126) are used for manufacturing the back plate 1, and by adopting the above design, sharing of 5 masks can still be achieved, and only one mask 5 used for manufacturing the second conductive layer 124 needs to be changed.

Specifically, a copper metal thin film is formed on a substrate, a first conductive layer 121 having a certain copper thickness is obtained through a mask 1 and a mask 2, and then, a first insulating layer film is formed on the first conductive layer 121, a first passivation layer 123 is formed by exposure through the mask 3, via holes are formed in the first passivation layer 123, and then a planarization layer 124 is formed through the mask 4, and vias, in the planarization layer 124, the first passivation layer 123 and the vias in the planarization layer 124, for later coupling of the first conductive layer 121 to the second conductive layer 124, then, a second conductive layer 124 is formed by using the mask 5, a second passivation layer 125 is formed by using the mask 6, and a via hole is formed in the second passivation layer 125, the protective layer 126 is made through the mask 7 and vias are formed in the protective layer 126, coupling of the LEDs to the second conductive layer 124 being achieved through the second passivation layer 125 and the vias in the protective layer 126.

For example, still using the driving back plate of the 110-inch MiniLED display panel as the design reference of the reference mask plate, as shown in fig. 4A and 4B, for example, the LED pitch of the 90-inch MiniLED display panel is 4mm, and the LED pitch of the 110-inch MiniLED display panel is 8mm, and by redesigning the second conductive layer 124 of the 110-inch MiniLED display panel for connecting the LED lamp regions, the mask plate sharing of the display panels with different LED pitches and different sizes can be realized.

Some embodiments of the present disclosure provide a mask M', as shown in fig. 5, including: a plurality of first patterns arranged periodically in a third direction (as indicated by arrows c in fig. 5). The plurality of first patterns include a third pattern part extending in a third direction; the third pattern part comprises at least two groups of thickened patterns along the extending direction of the third pattern part, each group of thickened patterns comprises a plurality of second thickened patterns, the size of each second thickened pattern along the fourth direction (as shown by an arrow d in figure 5) is larger than that of a second reference pattern along the fourth direction, and the second reference pattern is a part which is contacted with the second thickened patterns along the extending direction of the third pattern part; the third direction and the fourth direction are perpendicular.

In these embodiments, the mask M ' may be used for manufacturing a display panel by a splicing exposure, for example, in a case where the mask M ' includes two sets of second thickening patterns, when the mask M ' is used for manufacturing a display panel, a deviation generated by a splicing exposure position may be compensated. In the case that the mask M 'includes a plurality of sets, for example, six sets of second thickening patterns, the mask M' can be used for sharing of 90 inch, 98 inch and 110 inch display panels, and can compensate for the deviation generated by the splicing exposure position of the display panels of each size.

In some embodiments, the mask M' may have a dimension of 1100mm in the third direction and a dimension of 752mm in the fourth direction. That is, the third direction is the long side direction of the mask M ', and the fourth direction is the short side direction of the mask M'.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A manufacturing method of a driving back plate is characterized in that the driving back plate is provided with a first circuit wire; the preparation method comprises the following steps:

manufacturing a reference mask plate according to a pattern of a second circuit wire of a reference back plate, wherein the size of the reference back plate is larger than that of the driving back plate, and the second circuit wire comprises a plurality of first patterns which are periodically arranged along a first direction;

according to the size of the driving back plate, splicing and exposing a mother plate by using the reference mask plate to obtain a third circuit trace, wherein the size of the area where the third circuit trace is located along the first direction is equal to the size of the area where the first circuit trace is located along the first direction, the size of the area where the third circuit trace is located along the second direction is equal to the size of the area where the second circuit trace is located along the second direction, and the first direction is perpendicular to the second direction;

and cutting the spliced and exposed mother board to obtain the driving back board.

2. The method for preparing the driving back plate according to claim 1, wherein the step of performing the stitching exposure on the mother plate by using the reference mask plate according to the size of the driving back plate comprises the following steps:

dividing the motherboard into a splicing exposure area according to the size of the area where the first circuit trace is located along the first direction, wherein the size of the splicing exposure area along the first direction is equal to the size of the area where the first circuit trace is located along the first direction, and the size of the splicing exposure area along the second direction is equal to the size of the area where the second circuit trace is located along the second direction;

and moving the reference mask plate in the first direction, splicing and exposing different positions of the splicing and exposing area corresponding to the first direction, and forming patterns of the first circuit wiring corresponding to different positions of the splicing and exposing area.

3. The method for producing a back sheet according to claim 2,

the moving in the first direction by using the reference mask plate to perform splicing exposure on different positions of the splicing exposure area corresponding to the first direction comprises:

dividing the splicing exposure area into a first exposure area and a second exposure area which are sequentially arranged along the first direction, wherein the first exposure area and the second exposure area are adjacent, the edges close to each other are overlapped to form a splicing line, and the first circuit routing comprises a second pattern corresponding to the first exposure area and a third pattern corresponding to the second exposure area;

and exposing the first exposure area by using the first part of the reference mask plate corresponding to the second pattern, and exposing the second exposure area by using the second part of the reference mask plate corresponding to the third pattern.

4. The method for producing a back sheet according to claim 3,

the exposing the first exposure area by using the reference mask corresponding to the first portion of the second pattern and exposing the second exposure area by using the reference mask corresponding to the second portion of the third pattern includes:

dividing the reference mask plate into a first area and a second area along the first direction, wherein the size of the first area along the second direction is larger than that of an area where the second pattern is located along the second direction, and the size of the second area along the second direction is larger than that of an area where the third pattern is located along the second direction;

placing the reference mask plate on the mother plate, enabling the first area to be opposite to the first exposure area, covering the rest areas except the first area in the reference mask plate, and exposing the first exposure area;

and translating the reference mask plate to ensure that the second area is just opposite to the second exposure area, covering the rest areas except the second area in the reference mask plate, and exposing the second exposure area.

5. The method of manufacturing a driving back plate according to claim 3,

before the reference mask plate is used for splicing and exposing the mother board according to the size of the driving back plate, the method further comprises the following steps:

and mutually connecting the first part and the second part of the reference mask plate along the first direction, and thickening the pattern part close to the splicing line in the second direction.

6. The method of manufacturing a driving back plate according to claim 5,

and the first part and the second part of the reference mask plate are connected with each other along the first direction, and the pattern part close to the splicing line is subjected to thickening treatment in the second direction, and the thickening treatment occurs in the process of manufacturing the reference mask plate according to the size of the reference back plate.

7. The method of manufacturing a driving back plate according to claim 5,

the first pattern part which is connected with the second part of the reference mask plate along the first direction and is close to the splicing line is subjected to thickening treatment in the second direction, and the thickening treatment comprises the following steps:

8. The method of manufacturing a driving back plate according to claim 7,

the size of the two edges of the first pattern part in the second direction moving towards two sides is larger than or equal to 10 micrometers.

9. The method of manufacturing a driving back plate according to claim 3, wherein the plurality of first patterns include a plurality of rows of coupling portions arranged periodically along the first direction, and the stitching line is formed between two adjacent rows of coupling portions;

alternatively, the first and second electrodes may be,

each first pattern includes at least two rows of coupling portions, and the stitching line is formed between adjacent two first patterns.

10. The method for producing a driving back plate according to any one of claims 1 to 9,

cutting the mother board after splicing exposure comprises the following steps:

11. The method of manufacturing a driving back plate according to claim 10,

the cutting, according to the size of the area where the first circuit trace is located along the second direction, a portion, which exceeds the first circuit trace, of the portion, corresponding to the third circuit trace, of the motherboard includes:

12. A drive backplate, comprising:

a substrate;

a first circuit trace disposed on the substrate, the first circuit trace including a plurality of first patterns arranged periodically along a first direction;

the plurality of first patterns include a second pattern part extending in a first direction;

the second pattern part comprises at least one group of first thickened patterns along the extension direction of the second pattern part, each group of thickened patterns comprises a plurality of first thickened patterns, the size of each first thickened pattern along the second direction is larger than that of a first reference pattern along the second direction, and the first reference pattern is a part which is contacted with the first thickened patterns along the extension direction of the second pattern part;

the first direction and the second direction are perpendicular.

13. The drive backplate of claim 12,

the plurality of first patterns comprise a plurality of rows of coupling parts which are periodically arranged along the first direction, and any one group of first thickened patterns are positioned between two adjacent rows of coupling parts;

or, each first pattern includes at least two rows of coupling portions, and any one group of the first thickened patterns is located between two adjacent first patterns.

14. A display panel, comprising:

a drive backplate according to any one of claims 12 to 13;

and a plurality of light emitting devices disposed on the driving backplane.

15. A tiled screen formed by tiling a plurality of display panels, wherein at least one display panel is the display panel of claim 14.

16. A mask, comprising:

a plurality of first patterns arranged periodically along a third direction;

the plurality of first patterns includes a third pattern part extending in a third direction;

the third pattern part comprises at least two groups of second thickened patterns along the extension direction of the third pattern part, each group of second thickened patterns comprises a plurality of second thickened patterns, the size of each second thickened pattern along the fourth direction is larger than that of a second reference pattern along the second direction, and the second reference pattern is a part which is contacted with the second thickened patterns along the extension direction of the third pattern part;

the third direction and the fourth direction are perpendicular.