CN113886303B - Expansion board card applied to Open Power server - Google Patents

Expansion board card applied to Open Power server Download PDF

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Publication number
CN113886303B
CN113886303B CN202111247756.2A CN202111247756A CN113886303B CN 113886303 B CN113886303 B CN 113886303B CN 202111247756 A CN202111247756 A CN 202111247756A CN 113886303 B CN113886303 B CN 113886303B
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switch chip
expansion board
output channel
output
data receiving
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CN113886303A (en
Inventor
许云鑫
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Inspur Power Commercial Systems Co Ltd
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Inspur Power Commercial Systems Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application discloses an extension board card for Open Power server includes: PCIe Switch chip with X4 output channel, three Switch chips, one SATA controller and one m.2 interface. The expansion board card can be compatible with an NVME hard disk or a SATA hard disk and support RAID0/1, so that the storage speed and the storage performance of the OpenPower server can be remarkably improved through the expansion board card. Accordingly, the Open Power server provided by the application has the beneficial effects.

Description

Expansion board card applied to Open Power server
Technical Field
The invention relates to the technical field of servers, in particular to an expansion board card applied to an OpenPower server and the OpenPower server.
Background
Since the CPU (Central Processing Unit ) of the Open Power server has a larger number of cores and can provide more threads, the Open Power server has a greater advantage in terms of data storage.
However, in the prior art, the board card of the Open Power server cannot be compatible with the SATA (Serial Advanced Technology Attachment Hard Disk) hard disk or the NVME (Non Volatile Memory Host Controller Interface Specification) hard disk at the same time, and even if the board card can support the SATA hard disk, RAID0/1 cannot be supported. This not only reduces the storage speed of the Open Power server, but also reduces the storage performance of the Open Power server. At present, no effective solution is available for the above technical problems.
Disclosure of Invention
In view of the above, the present invention is directed to an expansion board applied to an Open Power server and an Open Power server, so as to be compatible with a SATA hard disk or an NVME hard disk at the same time, and improve the storage speed and storage performance of the Open Power server at the same time. The specific scheme is as follows:
an expansion board card applied to an Open Power server, wherein a CPU of the Open Power server is connected with a PCIe Switch chip with an X4 output channel, a first output channel and a second output channel in the X4 output channel are respectively connected with a first input channel and a second input channel of an M.2 interface, data receiving lines in a third output channel and a fourth output channel in the X4 output channel are respectively connected with an input end of the first Switch chip, data transmitting lines in the third output channel and the fourth output channel in the X4 output channel are respectively connected with an input end of a second Switch chip, a first data receiving line and a second data receiving line of an output end of the first Switch chip are respectively connected with an input end of a SATA controller, a first data transmitting line and a second data transmitting line of an output end of the second Switch chip are respectively connected with an input end of the SATA controller, a third data receiving line of an output end of the first Switch chip and a data receiving line of the second Switch chip are respectively connected with an input end of the third Switch chip, and a third data receiving line of the second Switch chip is connected with an input end of the fourth Switch chip, and a first data receiving line of the second Switch chip is connected with an input end of the fourth Switch controller, and a third data receiving line of the fourth Switch chip is connected with an input end of the fourth Switch chip, and a third data receiving line of the fourth Switch chip is connected with a third data receiving line of the data receiving line; and gating ports of the first Switch chip, the second Switch chip and the third Switch chip are connected with CPLDs in the OpenPower server.
Preferably, the first Switch chip, the second Switch chip and the third Switch chip are CBTL04083ABS chips.
Preferably, the SATA controller is specifically an 88SE9230 chip.
Preferably, 4 groups of X1 output channels of the SATA controller are connected with an OCulink connector.
Preferably, the Reset signal of the CPU is directly sent to the CPLD.
Preferably, the parameters of the output channel of the PCIe Switch chip are configured according to user-defined configuration parameters, and the user-defined configuration parameters are stored in the FLASH of the CPU in a solidifying manner.
Correspondingly, the invention also provides an OpenPower server, which comprises the expansion board card applied to the OpenPower server.
Therefore, in the expansion board provided by the invention, if a user wants to connect an NVME hard disk on the expansion board, only a first output channel and a second output channel in an X4 output channel of a PCIe Switch chip are respectively communicated with a first input channel and a second input channel of an M.2 interface, a third data receiving line of an output end of the first Switch chip and a third data transmitting line of an output end of the second Switch chip are communicated with the third input channel of the M.2 interface, and a fourth data receiving line of an output end of the first Switch chip and a fourth data transmitting line of an output end of the second Switch chip are communicated with the fourth input channel of the M.2 through the second input channel of the third Switch chip, and at the moment, the M.2 interface has PCIe X4 signals, so that the NVME hard disk can be connected on the M.2 interface; if the user wants to connect the SATA hard disk to the expansion board, only the first data receiving line and the second data receiving line of the output end of the first Switch chip and the X2 output path formed by the first data transmitting line and the second data transmitting line of the output end of the second Switch chip are connected with the SATA controller, and the SATA controller is connected with the m.2 interface by using the first input channel of the third Switch chip, at this time, the m.2 interface has the X1 signal of SATA, so that the SATA hard disk can be connected to the m.2 interface. In addition, since the SATA controller has an X2 input and 4 groups of X1 outputs, 4 SATA hard disks can be connected to the output end of the SATA controller, so that the expansion board card can support RAID0/1. Obviously, the expansion board card can be compatible with an NVME hard disk or a SATA hard disk and support RAID0/1, so that the storage speed and the storage performance of the OpenPower server can be remarkably improved through the expansion board card. Correspondingly, the Open Power server provided by the invention has the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a block diagram of an expansion board applied to an Open Power server according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a CBTL04083ABS chip;
FIG. 3 is a schematic diagram of CPLD control signals;
fig. 4 is a block diagram of another expansion board applied to an Open Power server according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a connection of an oculink connector to a SATA controller 88SE9230 according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is an expansion board card applied to an Open Power server according to an embodiment of the present invention. The CPU of the OpenPower server is connected with a PCIe Switch chip with an X4 output channel, a first output channel and a second output channel in the X4 output channel are respectively connected with a first input channel and a second input channel of an M.2 interface, a third output channel and a data receiving line in a fourth output channel in the X4 output channel are respectively connected with an input end of the first Switch chip, a data transmitting line in the third output channel and the fourth output channel in the X4 output channel are respectively connected with an input end of the second Switch chip, a first data receiving line and a second data receiving line of an output end of the first Switch chip are respectively connected with an input end of a SATA controller, a first data transmitting line and a second data transmitting line of an output end of the second Switch chip are respectively connected with an input end of the SATA controller, a third data receiving line of the first Switch chip output end and a third data transmitting line of the second Switch chip output end are respectively connected with a third input end of the M.2 interface, and a third data transmitting line of the fourth Switch chip output end of the first Switch chip output end is connected with a third input end of the fourth Switch controller, and a third data transmitting line of the fourth Switch chip output end of the fourth Switch chip is connected with a third input end of the fourth Switch controller; the gating ports of the first Switch chip, the second Switch chip and the third Switch chip are all connected with CPLD in the OpenPower server.
In this embodiment, an expansion board card applied to an Open Power server is provided, and the expansion board card not only can be compatible with a SATA hard disk or an NVME hard disk, but also can improve the storage speed and storage performance of the Open Power server.
In the expansion board card, firstly, an uplink signal of a PCIe Switch chip is directly connected to a CPU in an Open Power server. It can be understood that, because the PCIE signal channels of the CPU are limited and some of the PCIE signal channels cannot be split (for example, some CPUs are 16 signals or 8 signals are one, that is, X16 and X8), in this embodiment, the PCIE Switch chip is used to extend the PCIE channel of the CPU, and in practical application, the PCIE Switch chip connected to the rear end of the CPU may be split according to the actual requirement of the PCIE channel. Such as: if the PCIe Switch chip is specifically PM8533, which has 48 pins, 8 pins out of the 48 pins can be used as an uplink interface to connect with PCIe signals of the CPU, and the remaining 40 pins can be used as a downlink interface to connect with other devices. Specifically, in the present embodiment, the output channel of the PCIe Switch chip needs to be set to a form having an X4 output channel.
It should be noted that, in practical application, the SATA hard disk occupies one SATA channel of X1, and the NVME hard disk occupies one PCIE channel of X4. In addition, each X1 output channel is provided with a data transmission line and a data receiving line which are paired with each other, and the device connected to the rear end of the output channel of the PCIe Switch chip X4 is described in detail based on the above theoretical basis.
In this embodiment, the first Switch chip, the second Switch chip, and the third Switch chip are all set as CBTL04083ABS chips. Referring to fig. 2 specifically, fig. 2 is a schematic structural diagram of a CBTL04083ABS chip. The chip has a strobe port that receives control signals sent by a CPLD (Complex Programmable Logic Device ) through a CPLD_SEL. In fig. 2, two data receiving lines m.2rxn and two data transmitting lines m.2rxp form two input channels of the chip, two data receiving lines Sata rx N and a data transmitting line Sata rx P form two Sata output channels of the chip, and two data receiving lines PCIE rx N and two data transmitting lines PCIE tx N form two PCIE output channels of the chip.
When the control signal CPLD_SEL of the gating port is at a high level, the upper four lines of the CBTL04083ABS chip are conducted, namely, the X2 signal at the left side of the CBTL04083ABS chip is communicated with the upper two output channels at the right side of the chip and is an X2 SATA signal; when the control signal cpld_sel of the strobe port is at a low level, the lower four-way line of the CBTL04083ABS chip is turned on, that is, the X2 signal on the left side of the CBTL04083ABS chip is communicated with the lower two-way output channel on the right side of the chip, and is a PCIE signal of X2.
In fig. 1, a data receiving line PCIE3_rx (nvme_rx 3) and a data transmitting line PCIE3_tx (nvme_tx 3) constitute a first output channel of the PCIE Switch chip, a data receiving line PCIE2_rx (nvme_rx 2) and a data transmitting line PCIE2_tx (nvme_tx 2) constitute a second output channel of the PCIE Switch chip, a data receiving line PCIE1_rx and a data transmitting line PCIE1_tx constitute a third output channel of the PCIE Switch chip, and a data receiving line PCIE0_rx and a data transmitting line PCIE0_tx constitute a fourth output channel of the PCIE Switch chip.
The first output channel PCIe3_rx, PCIe3_tx and the second output channel PCIe2_rx in the X4 output channel of the PCIe Switch chip are connected to the first input channel and the second input channel of the m.2 interface, respectively, and the data receiving line PCIe1_rx in the third output channel and the data receiving line PCIe0_rx in the fourth output channel in the X4 output channel of the PCIe Switch chip are connected to the input end of the first Switch chip, respectively, and the data transmitting line PCIe1_tx in the third output channel and the data transmitting line PCIe0_tx in the fourth output channel in the X4 output channel are connected to the input end of the second Switch chip, respectively.
When the expansion board wants to connect to the NVME hard disk, the CPLD controls the PCIE0_rx, PCIE1_rx, and nvme_rx0 and nvme_rx1 of the first Switch chip to be turned on through SEL1, and controls the PCIE0_tx, PCIE1_tx, and nvme_tx0 and nvme_tx1 of the second Switch chip to be turned on through SEL 2. Because the SATA signals in the m.2 interface are multiplexed with the first set of signals of the PCIE X4 signals, the sata_rx0 and the sata_tx0 output by the SATA controller 88SE9230 are simultaneously accessed into the third Switch chip. Since the expansion board card is intended to connect to the NVME hard disk, the CPLD will conduct the nvme_rx0, nvme_tx0 and the m.2_rx0, m.2_tx0 of the input end of the third Switch chip through SEL3, in which case the set of signals forms PCIe X4 signals with the output channel formed by nvme_rx3 and nvme_tx3, the output channel formed by nvme_rx2 and nvme_tx2, and the output channel formed by nvme_rx1 and nvme_tx1, thereby connecting to the NVME hard disk at the output end of the m.2 interface.
When the expansion board wants to connect to the SATA hard disk, the CPLD controls, through SEL1, the on states of PCIE0_rx, PCIE1_rx, pcie_rx0, and pcie_rx1 of the first Switch chip, and controls, through SEL2, the on states of PCIE0_tx, PCIE1_tx, pcie_tx0, and pcie_tx1 of the second Switch chip; meanwhile, the CPLD is used for controlling the third Switch chip through the SEL3 to conduct Sata_RX0 and Sata_TX0 of the SATA controller 88SE9230 and M.2_RX0 and M.2_TX0 of the M.2 interface, so that the M.2 interface has an X1 SATA channel, and the output end of the M.2 interface can be connected with a SATA hard disk. In addition, since the SATA controller 88SE9230 chip is PCIE X2 input and 4 sets of X1 SATA signals are output, 4 SATA hard disks may be connected to the output end of the SATA controller 88SE9230 chip, so that the expansion board card may support RAID0/1.
Furthermore, since both the standard NVME m.2 hard disk and SATA m.2 hard disk have two signals: PRSENT and IFDET. When an M.2 interface is plugged in, PRSENT is in low level; if the M.2 interface is not inserted, PRSENT is high level, so the setting mode can be used for judging whether the expansion board card is inserted into the M.2 interface. Meanwhile, the IFDET signal is used for distinguishing the NVME hard disk from the SATA hard disk, and when the IFDET signal is in a high level, the extended board card is connected with the NVME hard disk; when the IFDET signal is at a low level, the expansion board card is connected with the SATA hard disk; the two groups of signals are directly accessed into the CPLD by the M.2 interface, the CPLD judges the type of accessing the M.2 interface hard disk, and controls the signal gating of the first Switch chip, the second Switch chip and the third Switch chip. Referring to fig. 3, fig. 3 is a schematic diagram of a CPLD control signal.
Of course, in practical application, the extended board card of the Open Power server may be set to other forms according to the implementation principle of the extended board card provided in the embodiment. Referring to fig. 4, fig. 4 is an expansion board of another Open Power server according to an embodiment of the present invention. Or, in practical application, the expansion board card can be set to a scheme of 10 m.2 interfaces, because the PCIE Switch chip can be divided into 10X 4 downstream ports. After the hard disk is connected, the CPLD can automatically identify the type of the connected hard disk and automatically switch the corresponding communication loop. Or, the expansion board card can be set as a mixed plug-in disc, that is, different m.2 interfaces on the expansion board card can be randomly plugged in different hard disks, and the operation is known by those skilled in the art and is not described in detail herein.
As can be seen, in the extension board provided in this embodiment, if a user wants to connect the NVME hard disk to the extension board, only the first output channel and the second output channel in the output channel of the PCIe Switch chip X4 are respectively connected to the first input channel and the second input channel of the m.2 interface, and the third data receiving line of the output end of the first Switch chip and the third data transmitting line of the output end of the second Switch chip are connected to the third input channel of the m.2 interface, and at the same time, the fourth data receiving line of the output end of the first Switch chip and the fourth data transmitting line of the output end of the second Switch chip are connected to the fourth input channel of the m.2 through the second input channel of the third Switch chip, and at this time, the m.2 interface has PCIe X4 signals, so that the NVME hard disk can be connected to the m.2 interface; if the user wants to connect the SATA hard disk to the expansion board, only the first data receiving line and the second data receiving line of the output end of the first Switch chip and the X2 output path formed by the first data transmitting line and the second data transmitting line of the output end of the second Switch chip are connected with the SATA controller, and the SATA controller is connected with the m.2 interface by using the first input channel of the third Switch chip, at this time, the m.2 interface has the X1 signal of SATA, so that the SATA hard disk can be connected to the m.2 interface. In addition, since the SATA controller has an X2 input and 4 groups of X1 outputs, 4 SATA hard disks can be connected to the output end of the SATA controller, so that the expansion board card can support RAID0/1. Obviously, the expansion board card can be compatible with an NVME hard disk or a SATA hard disk and support RAID0/1, so that the storage speed and the storage performance of the OpenPower server can be remarkably improved through the expansion board card.
Based on the above embodiment, this embodiment further describes and optimizes the technical solution, and as a preferred implementation manner, the 4 sets of X1 output channels of the SATA controller are connected to the oculink connector.
It will be appreciated that, because the SATA controller has 4 sets of X1 output channels, in practice, the 4 sets of X1 output channels of the SATA controller may also be connected to an octulink connector and to other types of boards via the octulink connector. Such as: the SATA hard disk with 81435 interface is connected with an oculink connector. Referring to fig. 5, fig. 5 is a schematic diagram of a connection of an oculink connector to a SATA controller 88SE9230 according to an embodiment of the present invention.
It should be noted that, since the PRSENT signal is also present on the oculink connector, the PRSENT signal on the oculink connector can be used to determine whether the hard disk is connected to the oculink connector during the actual operation.
Based on the above embodiment, this embodiment further describes and optimizes the technical solution, and as a preferred implementation manner, the Reset signal of the CPU is directly sent to the CPLD.
In the prior art, the Reset signal sent by the CPU is directly sent to the PCIe Switch chip, and then is sent by the PCIe Switch chip to the downstream device of the PCIe Switch chip. It can be understood that not all PCIe Switch chips have a Reset function, so in this embodiment, in order to enable the expansion board card to be compatible with PCIe Switch chips of more types, a Reset signal sent by a CPU is directly sent to a CPLD, and then the CPLD sends the Reset signal sent by the CPU to a downstream device of the PCIe Switch chip.
Moreover, because the logic code of the CPLD can be flexibly edited and modified in the research and development stage, the convenience of staff in using the expansion board card can be relatively improved through the operation mode provided by the embodiment.
Based on the above embodiment, the technical solution is further described and optimized in this embodiment, and as a preferred implementation manner, parameters of the output channel of the PCIe Switch chip are configured according to user-defined configuration parameters, and the user-defined configuration parameters are stored in the FLASH of the CPU in a solidifying manner.
It can be understood that in practical application, the purpose of adjusting and modifying the parameters of the output channel of the PCIe Switch chip can be achieved by configuring the register corresponding to the PCIe Switch chip, so in this embodiment, the parameters of the output channel of the PCIe Switch chip can be configured according to the user-defined configuration parameters. Such as: if the PCIe Switch chip is specifically PM8533, it has 48 pins, 8 of which can be used as an uplink interface to connect with PCIe signals of the CPU, and then the remaining 40 pins are used as downlink interfaces to connect with other devices, where the 40 pins can be divided into 10X 4, 5X 8, or 1 x16+2 x8+2X 4 output channels.
And the user-defined configuration parameters set by the user can be stored in the FLASH of the CPU in a solidifying way, so that the user-defined configuration parameters set by the user can be automatically read from the FLASH when the PCIe Switch chip is powered on, and the complicated step of configuring the PCIe Switch chip each time is omitted. Obviously, through the arrangement mode, the expansion capability of the expansion board card when other devices are connected can be obviously improved, and the convenience of people when the expansion board card is used can be further improved.
Correspondingly, the embodiment of the invention also discloses an OpenPower server, which comprises the expansion board card applied to the OpenPower server.
The OpenPower server provided by the embodiment of the invention has the beneficial effects that the expansion board card applied to the OpenPower server disclosed by the embodiment of the invention has.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The invention provides an expansion board card applied to an Open Power server and the Open Power server, and specific examples are applied to illustrate the principle and implementation of the invention, and the above description of the examples is only used for helping to understand the method and core ideas of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (7)

1. The expansion board card applied to the OpenPower server is characterized in that a CPU of the OpenPower server is connected with a PCIe Switch chip with an X4 output channel, a first output channel and a second output channel in the X4 output channel are respectively connected with a first input channel and a second input channel of an M.2 interface, a data receiving line in a third output channel and a data receiving line in a fourth output channel in the X4 output channel are respectively connected with an input end of the first Switch chip, a data transmitting line in the third output channel and a data transmitting line in the fourth output channel in the X4 output channel are respectively connected with an input end of a second Switch chip, a first data receiving line and a second data receiving line in an output end of the first Switch chip are respectively connected with an input end of a SATA controller, a first data transmitting line and a second data transmitting line in an output end of the second Switch chip are respectively connected with an input end of the SATA controller, a third data receiving line in an output end of the first Switch chip and a third data receiving line in the fourth Switch chip are respectively connected with an input end of the fourth Switch controller, and a third data receiving line in the second Switch chip is connected with an input end of the fourth Switch controller, and a third data receiving line in the fourth Switch chip is connected with an input end of the third Switch controller; and gating ports of the first Switch chip, the second Switch chip and the third Switch chip are connected with CPLDs in the OpenPower server.
2. The expansion board of claim 1, wherein the first Switch chip, the second Switch chip, and the third Switch chip are CBTL04083ABS chips.
3. The expansion board of claim 1, wherein the SATA controller is embodied as an 88SE9230 chip.
4. The expansion board of claim 1, wherein the 4 sets of X1 output channels of the SATA controller are connected to an oculink connector.
5. The expansion board of claim 1, wherein the Reset signal of the CPU is sent directly to the CPLD.
6. The expansion board of any of claims 1 to 5, wherein parameters of the PCIe Switch chip output channels are configured according to custom configuration parameters of a user, and the custom configuration parameters are stored in a FLASH of the CPU in a solidified manner.
7. An Open Power server, comprising an expansion board card according to any of claims 1 to 6, for application to an Open Power server.
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CN210006040U (en) * 2019-07-23 2020-01-31 浪潮商用机器有限公司 expansion cards
CN211604095U (en) * 2020-05-13 2020-09-29 浪潮商用机器有限公司 SATA raid card

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN206684730U (en) * 2017-04-20 2017-11-28 郑州云海信息技术有限公司 The system that a kind of PCIE of storage server extends direct-connected hard disk
CN210006040U (en) * 2019-07-23 2020-01-31 浪潮商用机器有限公司 expansion cards
CN211604095U (en) * 2020-05-13 2020-09-29 浪潮商用机器有限公司 SATA raid card

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