CN113886196A - On-chip power consumption management method, electronic device and storage medium - Google Patents
On-chip power consumption management method, electronic device and storage medium Download PDFInfo
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Abstract
The invention discloses an on-chip power consumption management method, electronic equipment and a storage medium, wherein the method comprises the following steps: acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window; the single core determines first warning information according to local first power consumption prediction information; determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores; and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information. The power consumption control can be performed in advance before voltage abnormity occurs in a prediction mode, and the power consumption control is performed in advance before the abnormity occurs, so that the abnormity of the chip is effectively controlled. In a multi-core scene, when power consumption control is performed in the single-core local area, resource interaction is performed with the single-core local area through the subsystem controller, the resource interaction can more effectively perform power consumption control on the single-core local area, and the integrity of a chip power supply is improved.
Description
Technical Field
The embodiment of the invention relates to a chip control technology, in particular to an on-chip power consumption management method, electronic equipment and a storage medium.
Background
As the integrated circuit fabrication process has improved, the chip computation power density has increased. With the increase of the computational power density of the chip, the requirement of the power supply integrity of the chip is higher and higher.
At present, in the operation process of a chip, the chip generates large current change in a short time. For example, for a short time on the order of nanoseconds, a current change of several hundred amperes occurs. This causes a significant Voltage drop (Voltage Overshoot) in the chip Voltage. The voltage drop easily causes the problems of abnormal chip operation and the like.
How to effectively control the chip abnormality is a problem to be solved urgently.
Disclosure of Invention
The invention provides an on-chip power consumption management method, electronic equipment and a storage medium, which are used for effectively controlling chip abnormity and improving the integrity of a chip power supply.
In a first aspect, an embodiment of the present invention provides an on-chip power consumption management method, including:
acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window;
the single core determines first warning information according to local first power consumption prediction information;
determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores;
and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
In a second aspect, an embodiment of the present invention further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the on-chip power consumption management method according to the embodiment of the present application.
In a third aspect, embodiments of the present invention further provide a storage medium containing computer-executable instructions, which are used to execute a method for managing power consumption on chip as shown in the embodiments of the present application when executed by a computer processor.
The on-chip power consumption management method provided by the embodiment of the invention comprises the steps of obtaining first power consumption prediction information of instructions of a plurality of single cores in a prediction window; the single core determines first warning information according to local first power consumption prediction information; determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores; and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information. Compared with the current method which cannot respond to chip abnormity in time, the method can control power consumption in advance before voltage abnormity occurs in a prediction mode, and control power consumption in advance before abnormity occurs, so that the chip abnormity is effectively controlled. Especially, in a multi-core scene, second warning information is determined according to first power consumption prediction information of a plurality of single cores, when warning occurs in both the first warning information and the second warning information, resource interaction is performed with the single core locally through the subsystem controller while power consumption control is performed in the single core locally, the resource interaction can more effectively perform power consumption control on the single core locally, and the integrity of a chip power supply is improved.
Drawings
FIG. 1 is a block diagram of an architecture provided by an embodiment of the present invention;
FIG. 2 is a flowchart of a method for managing power consumption on a chip according to a first embodiment of the invention;
FIG. 3 is a flowchart of a method for managing power consumption on chip according to a second embodiment of the present invention;
FIG. 4 is a flowchart of a method for managing power consumption on a chip according to a third embodiment of the present invention;
fig. 5 is a schematic structural diagram of an on-chip power consumption management apparatus according to a fifth embodiment of the present invention;
fig. 6 is a schematic structural diagram of a computer device in a sixth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic diagram of an architecture structure applicable to the embodiment of the present invention, which includes a plurality of primary modules 101 and a secondary module 102, where the primary module 101 is configured to control power consumption of a single core, the secondary module 102 is a subsystem controller and configured to control power consumption of the plurality of primary modules 101, and when both first warning information in the single core and second warning information in the subsystem controller are warned, resource interaction is performed with the single core, so as to implement power consumption control of the single core.
Example one
Fig. 2 is a flowchart of a method for managing power consumption on a chip according to an embodiment of the present invention, where the embodiment is applicable to a case of controlling power consumption of a chip, the method may be executed by an electronic device with a lsi, where the electronic device may be an intelligent terminal, a personal computer, a tablet computer, or a notebook computer, and the method specifically includes the following steps:
And each single core reads the instructions in sequence according to the clock cycle to execute. Instructions within the prediction window are single core unexecuted instructions. The length of the prediction window may be a number of clock cycles. Instructions to be executed within the prediction window may be fetched from unexecuted code according to an average execution speed of the instructions.
The energy consumption information of each instruction can be configured in advance, and the energy consumption information is used for representing the energy consumption of the instruction. First power consumption prediction information is determined from power consumption information for instructions within a window. The first power consumption prediction information is used for representing the power consumption condition of the instruction in the prediction window.
Optionally, in an implementation manner, each single core may obtain an instruction in a prediction window local to the single core, and obtain the first power consumption prediction information. Optionally, in another implementation manner, the subsystem controller obtains an instruction to be executed by each single core, and the subsystem controller determines the first power consumption prediction information of each single core according to the instruction to be executed by each single core and the prediction window.
And step 120, the single core determines first warning information according to the local first power consumption prediction information.
The first warning information may be determined in various ways. Optionally, the first power consumption prediction information may indicate a power consumption condition of each clock cycle among a plurality of clock cycles in the prediction window. And the single core determines first warning information according to the change condition of the first power consumption prediction information. For example, if the first power consumption prediction information shows an increase in power consumption in two clock cycles and the increase in power consumption exceeds the power consumption fluctuation that can be tolerated by a single core, the first warning information is determined to be a warning. And if the sudden power consumption fluctuation does not appear in the first power consumption prediction information, determining that the first warning information is not generated.
And step 130, determining second warning information and power consumption control information according to the plurality of first power consumption prediction information of the plurality of single cores.
And the subsystem controller respectively counts the first power consumption prediction information in each single core, summarizes the first power consumption prediction information of the plurality of single cores, and determines second warning information according to a summarizing result. And determining power consumption control information according to the content of the second alarm information.
Illustratively, if the second warning information is to generate a warning, the subsystem controller transmits the second warning information to a plurality of cores covered by the subsystem for generating the warning, and configures tokens required for the cores to perform power consumption control, and an update cycle of the tokens. When the second warning information is received by the single core to generate a warning, the token is requested to the subsystem controller when the first warning information is locally detected by the single core to generate the warning. After the token is acquired, the single core locally performs power consumption control.
In addition, in step 130, the determining of the power consumption control information according to the content of the second warning information may be determining whether to perform a down-conversion of the subsystem controller according to the number of issued tokens. The subsystem controller can perform a frequency reduction operation on the subsystem according to the number of issued tokens, for example, when the number of issued execution tokens exceeds a preset token number, so as to further protect the safety of the subsystem.
In one implementation, the step 130 of determining the second warning information according to the plurality of first power consumption prediction information of the plurality of cores may be implemented as:
step 131, accumulating the plurality of first power consumption prediction information according to the clock cycles to obtain second power consumption prediction information, wherein the prediction window comprises a plurality of clock cycles, and the second power consumption prediction information corresponds to the clock cycles one to one.
According to the clock cycle, first power consumption prediction information of each single core in the same clock cycle is obtained respectively. In each clock cycle, summing the first power consumption prediction information of the multiple single cores to obtain second power consumption prediction information, wherein the second power consumption prediction information is used for representing the sum of the first power consumption prediction information of the multiple single cores in the clock cycle.
Optionally, the weight information of each first power consumption prediction information is determined according to the working condition parameters of the single core, where the working condition parameters include voltage or clock frequency; and carrying out weighted summation according to the plurality of first power consumption prediction information and the plurality of weight information to obtain second power consumption prediction information.
Different single cores execute different calculation tasks, and different weights can be configured for different tasks respectively. In addition, different cores have different working conditions and the same power consumption has different influences on different cores. Therefore, different weight information, that is, weight information of the first power consumption prediction information obtained by different cores may be configured for different cores.
And after receiving the first power consumption prediction information sent by the single core, the subsystem controller multiplies the first power consumption prediction information by the weight information of the single core to obtain weighted first power consumption prediction information. And in each clock period, accumulating the weighted first power consumption prediction information of the plurality of single cores to obtain second power consumption prediction information.
According to the embodiment, the weight information can be configured for the single core according to the working condition parameters of the single core, the weighted first power consumption prediction information is more accurate, and the accuracy of the second power consumption prediction information is further improved.
And step 132, determining a second power consumption change trend according to the second power consumption prediction information and a preset power consumption threshold value.
The preset power consumption threshold may be configured in advance, and is used to represent a threshold of total power consumption of the plurality of cores in a certain clock cycle. The second power consumption change trend represents the magnitude relation of the second power consumption prediction information relative to a preset power consumption threshold value in a plurality of clock periods. L (low) may be used to indicate that the second power consumption prediction information is smaller than the preset power consumption threshold, and h (high) may be used to indicate that the second power consumption prediction information is greater than (including equal to) the preset power consumption threshold.
And if the second power consumption prediction information is continuously smaller than the preset power consumption threshold value, the second power consumption trend is continuously low power consumption, L-L. And if the second power consumption prediction information is changed from being smaller than the preset power consumption threshold to being larger than the preset power consumption threshold, the second power consumption change trend is changed from small to large, namely L-H. If the second power consumption prediction information is changed from being smaller than the preset power consumption threshold to being larger than the preset power consumption threshold and then is changed from being larger than the preset power consumption threshold to being smaller than the preset power consumption threshold, the second power consumption change trend is changed from being smaller, then being smaller, and is L-H-L.
And if the second power consumption prediction information is continuously smaller than the preset power consumption threshold value, the second power consumption trend is continuously high power consumption H-H. And if the second power consumption prediction information is changed from being larger than the preset power consumption threshold to being smaller than the preset power consumption threshold, the second power consumption change trend is changed from being large to being small, namely H-L. If the second power consumption prediction information is changed from being larger than the preset power consumption threshold to being smaller than the preset power consumption threshold and then is changed from being smaller than the preset power consumption threshold to being larger than the preset power consumption threshold, the second power consumption change trend is changed from being smaller to being larger, and is H-L-H.
And step 133, determining second warning information according to the second power consumption change trend.
The subsystem controller may determine the content of the second warning message according to the second power consumption trend obtained in step 132. And if the second power consumption change trend comprises switching between high power and low power or continuously high power consumption, determining the second warning information as the occurrence of the warning. And if the second power consumption change trend continues to be low power consumption, determining that the second warning information is no warning.
In the embodiment, by accumulating the plurality of first power consumption prediction information, the power consumption information of the plurality of single cores can be summarized in the subsystem controller, so that a second power consumption change trend of the subsystem consisting of the plurality of single cores is obtained, and second warning information is determined according to the second power consumption change trend, wherein the second warning information is only related to the change trend of the sea area power consumption related to the absolute value of the power consumption, and the second warning information can more accurately reflect the power consumption condition in the subsystem, so that the accuracy of the second warning information is improved.
And 140, if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
If both the first warning information and the second warning information are warning occurrences, power consumption control is performed in the core for which the first warning information is a warning occurrence. And if the first warning information of the plurality of single cores indicates that warning occurs, sequentially performing power consumption control in each single core. When the single core performs local power consumption control, resource interaction can be performed with subsystem control according to the power consumption control information. The content of the resource interaction can be the interaction of the processor resource, the interaction of the storage space and the interaction of the mainline bandwidth.
In one implementation, the power consumption control is performed in a single core in sequence, and may be implemented as:
generating a token according to a preset time interval; distributing the token to a target single core, wherein first warning information of the target single core is warning; and controlling power consumption in the target single core, and enabling the token to be invalid.
The subsystem can generate tokens according to a preset time interval, and the tokens are distributed to the first alarm information as the target single core generating the alarm according to the request sent by the single core. And the target core obtaining the token carries out power consumption control locally. The token has a preset life cycle, and when the life cycle expires, the token is invalidated. When the token fails, the target core cancels the local power consumption control. When a new token is generated, the token is assigned to the new target core.
According to the embodiment, the local power consumption control can be performed through the token control target single core, and the power consumption jump of the whole power consumption of the integrated circuit when a plurality of single cores perform power consumption control synchronously is avoided, so that the power consumption change is more stable.
Further, performing power consumption control in the target core may specifically be implemented as:
when the generated content is first warning information of warning, suspending a plurality of threads in the target single core; the suspended threads are started in turn.
And when the target single core determines that the first warning information is the warning, suspending a plurality of threads executed by the target single core, wherein the suspended threads are not executed any more. All threads in the target single core may be suspended. When the target core is assigned a token, the suspended threads are started in turn. Whenever a suspended thread is started, the target single core judges whether power consumption danger exists locally. And if not, continuing to start the suspended thread until all threads are recovered. And if so, canceling the thread which continues to be recovered to be suspended.
According to the embodiment, the suspended threads are sequentially started in the target single core, so that the local effective control of the power consumption of the single core can be realized, and the power consumption control efficiency is improved.
Further, in addition to the above power consumption control according to the prediction window, power consumption feedback control may be performed according to the generated power consumption. Specifically, after step 130, the method further includes:
acquiring power consumption values of a plurality of cores in a detection window; determining a power consumption average value according to the plurality of power consumption values;
and if the power consumption average value exceeds the control threshold, determining power consumption control information according to the accumulated result of the plurality of power consumption values, and controlling according to the power consumption control information.
The detection window may comprise a plurality of clock cycles. And counting the power consumption value of each single core in each time window in the detection window, and calculating the average power consumption value according to the power consumption value. And if the power consumption average value is larger than the control threshold value, determining power consumption control information according to an accumulation result of the plurality of power consumption values.
Optionally, the power consumption control information determined according to the accumulation result of the plurality of power consumption values may be used for additional power consumption information requested by the single core. Specifically, a set of Power consumption credit mechanism (base credit + extra Power credit) is built locally in the single core, the Power consumption credit allocated to the single core determines a control threshold, and when the control threshold is exceeded, the single core performs negative feedback operation of inserting an anchor stall into a high-Power-consumption thread being executed by the single core according to the exceeding amplitude. And applies for additional power credit (extra power credit) to the subsystem controller. After the application is responded, and after extra power credit is obtained, the single core adjusts the control threshold value, and so on. When the power consumption of the single core is less than the threshold, the extra power credit borrowed is returned.
In addition, the subsystem controller determines whether the frequency needs to be decreased according to the borrowed extra power credit to avoid the risk.
The mode can acquire the generated power consumption information through the detection window, and determines the power consumption control in real time according to the power consumption average value of the generated power consumption information, so as to control the power consumption quickly.
The on-chip power consumption management method provided by the embodiment of the invention comprises the steps of obtaining first power consumption prediction information of instructions of a plurality of single cores in a prediction window; the single core determines first warning information according to local first power consumption prediction information; determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores; and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information. Compared with the current method which cannot respond to chip abnormity in time, the method can control power consumption in advance before voltage abnormity occurs in a prediction mode, and control power consumption in advance before abnormity occurs, so that the chip abnormity is effectively controlled. Especially, in a multi-core scene, second warning information is determined according to first power consumption prediction information of a plurality of single cores, when warning occurs in both the first warning information and the second warning information, resource interaction is performed with the single core locally through the subsystem controller while power consumption control is performed in the single core locally, the resource interaction can more effectively perform power consumption control on the single core locally, and the integrity of a chip power supply is improved.
Example two
Fig. 3 is a flowchart of a method for managing power consumption on a chip according to a second embodiment of the present invention, which is used to specifically describe the foregoing implementation. In step 110, obtaining first power consumption prediction information of instructions of the plurality of single cores in the prediction window may be implemented as: acquiring instructions of a plurality of single cores in a prediction window; and acquiring the maximum power consumption value and the minimum power consumption value in the prediction window according to the power consumption information of the instruction. Step 130, determining second warning information according to the plurality of first power consumption prediction information of the plurality of cores, which may be implemented as: accumulating the maximum power consumption values and the minimum power consumption values of the multiple single cores; determining a power difference value according to the accumulated maximum power consumption value and the accumulated minimum power consumption value; and if the power difference value is larger than the threshold value, determining the second warning information content as the occurrence of warning. The method comprises the following steps:
In one implementation, the first power consumption prediction information may be a maximum power consumption value and a minimum power consumption value in a plurality of clock cycles within the prediction window. The maximum power consumption value and the minimum power consumption value are used for representing the power consumption condition of the single core in the prediction window.
And step 230, accumulating the maximum power consumption values and the minimum power consumption values of the plurality of single cores.
And accumulating the maximum power consumption values of the multiple single cores by the subsystem controller in the prediction window to obtain the accumulated maximum power consumption value. And accumulating the minimum power consumption values of the multiple single cores to obtain the accumulated minimum power consumption value.
And taking the difference value of the accumulated maximum power consumption value and the accumulated minimum power consumption value as a power difference value. The power difference value represents a power variation float for the plurality of single cores within the prediction window.
And step 250, if the power difference value is larger than the threshold value, determining the content of the second warning information as occurrence of warning.
If the power difference is greater than the threshold, it indicates that the power variation amplitude of the multiple single cores in the subsystem is greater than the threshold, and therefore the second warning information content is that a warning occurs.
And step 260, determining second warning information and power consumption control information according to the plurality of first power consumption prediction information of the plurality of single cores.
The implementation of step 260 may refer to the implementation of step 130.
And 270, if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
The on-chip power consumption management method provided by the embodiment of the invention can determine the power difference value according to the maximum power value and the minimum power value of the plurality of single cores, can accurately determine whether the power consumption of the plurality of single cores in the subsystem is increased suddenly according to the power difference value, and can further carry out resource interaction in advance before executing the instruction, so that the instruction has sufficient system resources to run during execution, and the power consumption control efficiency is improved.
EXAMPLE III
Fig. 4 is a flowchart of a method for managing power consumption on a chip according to a third embodiment of the present invention, which is used to specifically describe the foregoing implementation. In step 110, obtaining first power consumption prediction information of instructions of the plurality of single cores in the prediction window may be implemented as: acquiring instructions of a plurality of single cores in a prediction window; and acquiring the average power consumption value in the prediction window according to the power consumption information of the instruction. Step 130, determining second warning information according to the plurality of first power consumption prediction information of the plurality of cores, which may be implemented as: accumulating the average power consumption value; judging whether the power consumption supply is sufficient according to the accumulated power consumption average value; if not, the second warning information content is the occurrence warning. The method comprises the following steps:
And step 320, acquiring a power consumption average value in the prediction window according to the power consumption information of the instruction.
The first power consumption prediction information may also be an average of power consumption of the single core over a plurality of clock cycles within the prediction window.
And step 330, the single core determines first warning information according to the local first power consumption prediction information.
If the average power consumption value is larger than the first average threshold value, it indicates that the single core will generate power consumption larger than the first average threshold value in the prediction window, and at this time, the hidden power consumption danger is easy to occur, so the first warning information is the occurrence of warning.
And step 340, accumulating the average power consumption value.
The subsystem controller accumulates the power consumption average values of the plurality of single cores to obtain an accumulated power consumption average value.
In the sub-system, when the average value of the power consumption of the plurality of single cores is larger than the upper limit of the Electrical Design Current (EDC), it indicates that the power consumption supply is insufficient, and it is determined that there is a risk, and the content of the second warning information is determined as the occurrence of the warning. At this time, a rapid frequency reduction operation is adopted, and after the risk is relieved, the frequency is restored.
And step 360, if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
The on-chip power consumption management method provided by the embodiment of the invention can determine whether to generate a warning or not in the local single core and the subsystem controller through the power consumption average value, further predict the power consumption danger from the aspect of average power consumption in the prediction window, send out the warning when the overall power consumption is higher, provide sufficient resources for the single core in time and improve the stability.
Example four
Fig. 5 is a schematic structural diagram of an on-chip power consumption management apparatus according to a fourth embodiment of the present invention, where the present embodiment is applicable to a situation of controlling chip power consumption, the apparatus may be executed by an electronic device with a large-scale integrated circuit, and the electronic device may be an intelligent terminal, a personal computer, a tablet computer, a notebook computer, or the like, and specifically includes: a first power consumption prediction information acquisition module 510, a first warning information acquisition module 520, a second warning information determination module 530, a single-core power consumption control module 540, and a resource interaction module 550.
A first power consumption prediction information obtaining module 510, configured to obtain first power consumption prediction information of instructions of a plurality of single cores within a prediction window;
a first warning information obtaining module 520, configured to determine, by a single core, first warning information according to local first power consumption prediction information;
a second warning information determination module 530 for determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of the plurality of cores;
the single-core power consumption control module 540 is configured to, if the first warning information and the second warning information are both warning occurrences, sequentially perform power consumption control in the single core;
and a resource interaction module 550, configured to perform resource interaction with the subsystem controller according to the power consumption control information.
On the basis of the foregoing embodiment, the single-core power consumption control module 540 is configured to:
generating a token according to a preset time interval;
distributing the token to a target single core, wherein first warning information of the target single core is warning;
and controlling power consumption in the target single core, and enabling the token to be invalid.
On the basis of the foregoing embodiment, the single-core power consumption control module 540 is configured to:
when the generated content is first warning information of warning, suspending a plurality of threads in the target single core;
the suspended threads are started in turn.
On the basis of the foregoing embodiment, the first power consumption prediction information obtaining module 510 is configured to:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a maximum power consumption value and a minimum power consumption value in a prediction window according to the power consumption information of the instruction;
accordingly, the second warning information determination module 530 is configured to:
accumulating the maximum power consumption values and the minimum power consumption values of the multiple single cores;
determining a power difference value according to the accumulated maximum power consumption value and the accumulated minimum power consumption value;
and if the power difference value is larger than the threshold value, determining the second warning information content as the occurrence of warning.
On the basis of the above embodiment, the first warning information acquiring module 520 is configured to:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a power consumption average value in a prediction window according to the power consumption information of the instruction;
accordingly, the second warning information determination module 530 is configured to:
accumulating the average power consumption value;
judging whether the power consumption supply is sufficient according to the accumulated power consumption average value; if not, the second warning information content is the occurrence warning.
On the basis of the above embodiment, the second warning information determining module 530 is configured to:
accumulating the plurality of first power consumption prediction information according to the clock cycles to obtain second power consumption prediction information, wherein the prediction window comprises a plurality of clock cycles, and the second power consumption prediction information corresponds to the clock cycles one by one;
determining a second power consumption change trend according to the second power consumption prediction information and a preset power consumption threshold;
and determining second warning information according to the second power consumption change trend.
On the basis of the above embodiment, the second warning information determination module 530:
determining weight information of each first power consumption prediction information according to working condition parameters of the single core, wherein the working condition parameters comprise voltage or clock frequency;
and carrying out weighted summation according to the plurality of first power consumption prediction information and the plurality of weight information to obtain second power consumption prediction information.
On the basis of the above embodiment, the power consumption detection module is further included, and the power consumption detection module is configured to:
acquiring power consumption values of a plurality of cores in a detection window;
determining a power consumption average value according to the plurality of power consumption values;
and if the power consumption average value exceeds the control threshold, determining power consumption control information according to the accumulated result of the plurality of power consumption values, and controlling according to the power consumption control information.
In the on-chip power consumption management apparatus provided in the embodiment of the present invention, the first power consumption prediction information obtaining module 510 obtains first power consumption prediction information of instructions of a plurality of single cores in a prediction window; the first warning information obtaining module 520 is configured to determine first warning information according to the local first power consumption prediction information; the second warning information determination module 530 determines second warning information and power consumption control information according to a plurality of first power consumption prediction information of the plurality of cores; the single-core power consumption control module 540 is configured to sequentially perform power consumption control in the single core if the first warning information and the second warning information are both warnings, and the resource interaction module 550 is configured to perform resource interaction with the subsystem controller according to the power consumption control information. Compared with the current method which cannot respond to chip abnormity in time, the method can control power consumption in advance before voltage abnormity occurs in a prediction mode, and control power consumption in advance before abnormity occurs, so that the chip abnormity is effectively controlled. Especially, in a multi-core scene, second warning information is determined according to first power consumption prediction information of a plurality of single cores, when warning occurs in both the first warning information and the second warning information, resource interaction is performed with the single core locally through the subsystem controller while power consumption control is performed in the single core locally, the resource interaction can more effectively perform power consumption control on the single core locally, and the integrity of a chip power supply is improved.
The on-chip power consumption management device provided by the embodiment of the invention can execute the on-chip power consumption management method provided by any embodiment of the invention, and has the corresponding functional module and beneficial effect of the execution method.
EXAMPLE five
Fig. 6 is a schematic structural diagram of a computer apparatus according to a fifth embodiment of the present invention, as shown in fig. 6, the computer apparatus includes a processor 60, a memory 61, an input device 62, and an output device 63; the number of processors 60 in the computer device may be one or more, and one processor 60 is taken as an example in fig. 6; the processor 60, the memory 61, the input device 62 and the output device 63 in the computer apparatus may be connected by a bus or other means, and the connection by the bus is exemplified in fig. 6.
The memory 61 may be used as a computer-readable storage medium for storing software programs, computer-executable programs, and modules, such as program instructions/modules corresponding to the on-chip power consumption management method in the embodiment of the present invention (e.g., the first power consumption prediction information acquisition module 510, the first warning information acquisition module 520, the second warning information determination module 530, the single-core power consumption control module 540, and the resource interaction module 550 in the theme update apparatus). The processor 60 executes various functional applications and data processing of the computer device by executing software programs, instructions and modules stored in the memory 61, that is, implements the above-described on-chip power consumption management method.
The memory 61 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 61 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, the memory 61 may further include memory located remotely from the processor 60, which may be connected to a computer device over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 62 may be used to receive input numeric or character information and to generate key signal inputs relating to user settings and function controls of the computer apparatus. The output device 63 may include a display device such as a display screen.
EXAMPLE six
An embodiment of the present invention further provides a storage medium containing computer-executable instructions, where the computer-executable instructions are executed by a computer processor to perform a method for managing on-chip power consumption, and the method includes:
acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window;
the single core determines first warning information according to local first power consumption prediction information;
determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores;
and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
In addition to the above embodiments, the power consumption control in the single core sequentially includes:
generating a token according to a preset time interval;
distributing the token to a target single core, wherein first warning information of the target single core is warning;
and controlling power consumption in the target single core, and enabling the token to be invalid.
On the basis of the above embodiment, the power consumption control in the target core includes:
when the generated content is first warning information of warning, suspending a plurality of threads in the target single core;
the suspended threads are started in turn.
On the basis of the above embodiment, acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window includes:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a maximum power consumption value and a minimum power consumption value in a prediction window according to the power consumption information of the instruction;
correspondingly, the determining the second warning information according to the first power consumption prediction information of the single cores comprises the following steps:
accumulating the maximum power consumption values and the minimum power consumption values of the multiple single cores;
determining a power difference value according to the accumulated maximum power consumption value and the accumulated minimum power consumption value;
and if the power difference value is larger than the threshold value, determining the second warning information content as the occurrence of warning.
On the basis of the above embodiment, acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window includes:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a power consumption average value in a prediction window according to the power consumption information of the instruction;
correspondingly, the determining the second warning information according to the first power consumption prediction information of the single cores comprises the following steps:
accumulating the average power consumption value;
judging whether the power consumption supply is sufficient according to the accumulated power consumption average value; if not, the second warning information content is the occurrence warning.
On the basis of the above embodiment, determining second warning information from a plurality of first power consumption prediction information of a plurality of cores includes:
accumulating the plurality of first power consumption prediction information according to the clock cycles to obtain second power consumption prediction information, wherein the prediction window comprises a plurality of clock cycles, and the second power consumption prediction information corresponds to the clock cycles one by one;
determining a second power consumption change trend according to the second power consumption prediction information and a preset power consumption threshold;
and determining second warning information according to the second power consumption change trend.
On the basis of the above embodiment, accumulating the plurality of first power consumption prediction information according to the clock cycle to obtain the second power consumption prediction information includes:
determining weight information of each first power consumption prediction information according to working condition parameters of the single core, wherein the working condition parameters comprise voltage or clock frequency;
and carrying out weighted summation according to the plurality of first power consumption prediction information and the plurality of weight information to obtain second power consumption prediction information.
In addition to the above embodiment, the present invention further includes:
acquiring power consumption values of a plurality of cores in a detection window;
determining a power consumption average value according to the plurality of power consumption values;
and if the power consumption average value exceeds the control threshold, determining power consumption control information according to the accumulated result of the plurality of power consumption values, and controlling according to the power consumption control information.
Of course, the storage medium containing the computer-executable instructions provided by the embodiments of the present invention is not limited to the method operations described above, and may also perform related operations in the on-chip power consumption management method provided by any embodiments of the present invention.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention.
It should be noted that, in the embodiment of the above on-chip power consumption management apparatus, each included unit and module are only divided according to functional logic, but are not limited to the above division, as long as the corresponding function can be implemented; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A method for managing power consumption on a chip, comprising:
acquiring first power consumption prediction information of instructions of a plurality of single cores in a prediction window;
the single core determines first warning information according to local first power consumption prediction information;
determining second warning information and power consumption control information according to a plurality of first power consumption prediction information of a plurality of single cores;
and if the first warning information and the second warning information are both warning, sequentially performing power consumption control in the single core, and performing resource interaction with the subsystem controller according to the power consumption control information.
2. The method of claim 1, wherein the sequentially performing power consumption control in a single core comprises:
generating a token according to a preset time interval;
distributing the token to a target single core, wherein first warning information of the target single core is warning;
and controlling power consumption in the target single core, wherein the token is invalid.
3. The method of claim 2, wherein the performing power consumption control in the target core comprises:
when the generated content is first warning information with warning, suspending a plurality of threads in the target single core;
the suspended threads are started in turn.
4. The method of claim 1, wherein obtaining first power consumption prediction information for instructions of a plurality of cores within a prediction window comprises:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a maximum power consumption value and a minimum power consumption value in the prediction window according to the power consumption information of the instruction;
correspondingly, the determining the second warning information according to the plurality of first power consumption prediction information of the plurality of single cores includes:
accumulating the maximum power consumption values and the minimum power consumption values of the multiple single cores;
determining a power difference value according to the accumulated maximum power consumption value and the accumulated minimum power consumption value;
and if the power difference is larger than the threshold value, determining the second warning information content as the occurrence of warning.
5. The method of claim 1, wherein obtaining first power consumption prediction information for instructions of a plurality of cores within a prediction window comprises:
acquiring instructions of a plurality of single cores in a prediction window;
acquiring a power consumption average value in the prediction window according to the power consumption information of the instruction;
correspondingly, the determining the second warning information according to the first power consumption prediction information of the single cores comprises the following steps:
accumulating the power consumption average value;
judging whether the power consumption supply is sufficient according to the accumulated power consumption average value; if not, the second warning information content is the occurrence warning.
6. The method of claim 1, wherein determining second warning information based on a plurality of first power consumption prediction information for a plurality of cores comprises:
accumulating a plurality of first power consumption prediction information according to clock cycles to obtain second power consumption prediction information, wherein the prediction window comprises a plurality of clock cycles, and the second power consumption prediction information corresponds to the clock cycles one by one;
determining a second power consumption change trend according to the second power consumption prediction information and a preset power consumption threshold;
and determining second warning information according to the second power consumption change trend.
7. The method of claim 6, wherein accumulating the plurality of first power consumption prediction information according to the clock cycle to obtain the second power consumption prediction information comprises:
determining weight information of each first power consumption prediction information according to working condition parameters of a single core, wherein the working condition parameters comprise voltage or clock frequency;
and carrying out weighted summation according to the plurality of first power consumption prediction information and the plurality of weight information to obtain second power consumption prediction information.
8. The method of claim 1, further comprising:
acquiring power consumption values of a plurality of cores in a detection window;
determining a power consumption average value according to the plurality of power consumption values;
and if the power consumption average value exceeds a control threshold value, determining power consumption control information according to the accumulated result of the plurality of power consumption values, and controlling according to the power consumption control information.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method for managing power consumption on chip as claimed in any one of claims 1 to 8 when executing the program.
10. A storage medium containing computer-executable instructions for performing the method of on-chip power consumption management as recited in any of claims 1-8 when executed by a computer processor.
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