CN113872049A - Mode control semiconductor device and preparation method thereof - Google Patents

Mode control semiconductor device and preparation method thereof Download PDF

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Publication number
CN113872049A
CN113872049A CN202111472150.9A CN202111472150A CN113872049A CN 113872049 A CN113872049 A CN 113872049A CN 202111472150 A CN202111472150 A CN 202111472150A CN 113872049 A CN113872049 A CN 113872049A
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layer
light modulation
semiconductor device
waveguide
cavity surface
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CN113872049B (en
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谭少阳
王俊
刘停停
李泉灵
廖新胜
闵大勇
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Suzhou Everbright Photonics Co Ltd
Suzhou Everbright Semiconductor Laser Innovation Research Institute Co Ltd
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Suzhou Everbright Photonics Co Ltd
Suzhou Everbright Semiconductor Laser Innovation Research Institute Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2004Confining in the direction perpendicular to the layer structure
    • H01S5/2018Optical confinement, e.g. absorbing-, reflecting- or waveguide-layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2004Confining in the direction perpendicular to the layer structure
    • H01S5/2018Optical confinement, e.g. absorbing-, reflecting- or waveguide-layers
    • H01S5/2031Optical confinement, e.g. absorbing-, reflecting- or waveguide-layers characterized by special waveguide layers, e.g. asymmetric waveguide layers or defined bandgap discontinuities

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  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

The invention provides a mode control semiconductor device and a method for manufacturing the same, the mode control semiconductor device having a front cavity surface and a rear cavity surface which are oppositely arranged, the mode control semiconductor device comprising: a semiconductor substrate layer; an active layer on the semiconductor substrate layer; the first limiting layer and the second limiting layer are positioned on the semiconductor substrate layer and are respectively positioned on two sides of the active layer; a first waveguide layer located between the first confinement layer and the active layer; the second waveguide layer is positioned between the second limiting layer and the active layer, and the thickness of the second waveguide layer is less than or equal to that of the first waveguide layer; and the first light modulation layer is positioned in a part of the second limiting layer adjacent to the front cavity surface, the refractive index of the first light modulation layer is smaller than that of the second limiting layer, and the width of the first light modulation layer increases progressively in the direction from the rear cavity surface to the front cavity surface. The mode control semiconductor device improves the optical catastrophe damage threshold power of the front cavity surface and reduces coupling loss, production process complexity and cost.

Description

Mode control semiconductor device and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a mode control semiconductor device and a preparation method thereof.
Background
The light-emitting semiconductor device is a device which takes a certain semiconductor material as a working substance to generate stimulated emission, and the working principle is as follows: the light emitting semiconductor device is widely used because it has a small size and high photoelectric conversion efficiency because the inversion of the population of an unbalanced carrier is realized between the energy bands (conduction band and valence band) of a semiconductor material or between the energy band of a semiconductor material and the energy level of an impurity (acceptor or donor), and when a large number of electrons in the population inversion state are recombined with holes, a stimulated emission effect is generated.
The development direction of high-power light-emitting semiconductor devices is to achieve higher output light optical power and higher brightness. Increasing the width of the light emitting region of the light emitting semiconductor device, and fabricating the light emitting semiconductor device having a wide waveguide is an effective means for improving optical power. But this may result in a reduction in the beam quality of the light-emitting semiconductor device, resulting in no increase in the brightness of the light-emitting semiconductor device. Therefore, the application of the high-power light-emitting semiconductor device needs to increase the power and the brightness of the chip on the premise of keeping the light-emitting width unchanged. This increases the power density experienced by the facets of the light emitting semiconductor device, leading to increased failure of the light emitting semiconductor device to facet optical catastrophic damage.
At present, the prior art can not improve the optical catastrophe damage threshold power of the front cavity surface and simultaneously reduce the coupling loss, the complexity of the production process and the cost.
Disclosure of Invention
Therefore, the invention provides a mode control semiconductor device and a preparation method thereof, which are used for improving the optical catastrophe damage threshold power of a front cavity surface and reducing the coupling loss, the production process complexity and the cost.
The present invention provides a mode control semiconductor device having a front cavity surface and a rear cavity surface which are oppositely disposed, the mode control semiconductor device including: a semiconductor substrate layer; an active layer on the semiconductor substrate layer; the first limiting layer and the second limiting layer are positioned on the semiconductor substrate layer and positioned on two sides of the active layer respectively; a first waveguide layer between the first confinement layer and the active layer; a second waveguide layer located between the second confinement layer and the active layer, the second waveguide layer having a thickness less than or equal to the thickness of the first waveguide layer; a first light modulation layer located in a portion of the second confinement layer adjacent to the front facet, the first light modulation layer having a refractive index smaller than that of the second confinement layer, the first light modulation layer having a width that increases in a direction from the rear facet to the front facet.
Optionally, the first dimming layer further extends into a partial thickness of the second waveguide layer.
Optionally, a projection pattern of the first dimming layer on the surface of the semiconductor substrate layer includes a triangle or a horn.
Optionally, the number of the first dimming layers is several, and the several first dimming layers are arranged along a direction parallel to the front cavity surface and parallel to the surface of the semiconductor substrate layer.
Optionally, the material of the first light modulation layer includes aluminum gallium arsenide, aluminum gallium indium phosphide, silicon oxide, or silicon nitride.
Optionally, the wavelength of the light emitted by the semiconductor device is a characteristic wavelength; the length dimension of the first light modulation layer in the direction perpendicular to the front cavity surface is 10-200 times of the characteristic wavelength.
Optionally, the first waveguide layer is an N-type waveguide layer, the second waveguide layer is a P-type waveguide layer, the first confinement layer is an N-type confinement layer, and the second confinement layer is a P-type confinement layer.
Optionally, the method further includes: the second light modulation layer is positioned in a part of the second limiting layer adjacent to the rear cavity surface, the second light modulation layer is spaced from the first light modulation layer, and the width of the second light modulation layer increases gradually in the direction from the front cavity surface to the rear cavity surface.
The present invention also provides a method for manufacturing a mode-controlled semiconductor device having a front cavity surface and a rear cavity surface which are oppositely disposed, comprising: providing a semiconductor substrate layer; forming an active layer, a first limiting layer, a second limiting layer, a first waveguide layer and a second waveguide layer on the semiconductor substrate layer, wherein the first limiting layer and the second limiting layer are respectively positioned on two sides of the active layer, the first waveguide layer is positioned between the first limiting layer and the active layer, the second waveguide layer is positioned between the second limiting layer and the active layer, and the thickness of the second waveguide layer is less than or equal to that of the first waveguide layer; and forming a first light modulation layer in a part of the second confinement layer adjacent to the front cavity surface, the first light modulation layer having a refractive index smaller than that of the second confinement layer, the first light modulation layer having a width that increases in a direction from the rear cavity surface to the front cavity surface.
Optionally, in the step of forming the first light modulation layer, the first light modulation layer further extends into a partial thickness of the second waveguide layer.
Optionally, the material of the first light modulation layer includes aluminum gallium arsenide, aluminum gallium indium phosphide, silicon oxide, or silicon nitride.
Optionally, the method further includes: and forming a second light modulation layer in a part of the second limiting layer adjacent to the rear cavity surface, wherein the second light modulation layer is spaced from the first light modulation layer, and the width of the second light modulation layer increases in a direction from the front cavity surface to the rear cavity surface.
The technical scheme of the invention has the following beneficial effects:
in the mode control semiconductor device according to the aspect of the present invention, a first light modulation layer is provided, the first light modulation layer is located in a part of the second confinement layer adjacent to the front cavity surface, and a refractive index of the first light modulation layer is smaller than a refractive index of the second confinement layer. The first light modulation layer can press the optical mode towards the direction of the first waveguide layer, so that the peak position of the optical mode close to the front cavity surface is far away from the active layer, the optical limiting factor and the optical power density of the active layer close to the front cavity surface area are reduced, and the threshold power of the front cavity surface for resisting optical catastrophe damage is increased progressively. And the first dimming layer is easily prepared, thus resulting in cost reduction. The mode control semiconductor device improves the optical catastrophe damage threshold power of the front cavity surface and reduces the complexity and cost of the production process. Secondly, the width of the first dimming layer increases in the direction from the rear facet to the front facet, which reduces the coupling loss of light at the interface between the first dimming layer and the second confinement layer.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic perspective view of a mode control semiconductor device according to an embodiment of the present invention;
FIG. 2 is a top view of FIG. 1;
FIG. 3 is a cross-sectional view of FIG. 1 taken along the direction of light emission;
fig. 4 is a light field distribution of the mode control semiconductor device of fig. 1 in a non-dimming region;
fig. 5 to 9 are optical field distributions of the mode control semiconductor device in the first dimming region corresponding to different thicknesses of the first dimming layer;
fig. 10 is a relationship between a light confinement factor of an active layer of the mode control semiconductor device of fig. 1 in a first dimming region and a position of the first dimming layer;
fig. 11 shows a relationship between the optical catastrophic damage resistant threshold power of the mode control semiconductor device of fig. 1 at a first dimming region and a position of the first dimming layer;
fig. 12 is a transmission loss of the mode control semiconductor device of fig. 1 at a different shape of the first dimming layer;
fig. 13 is a flowchart of a method of fabricating a mode control semiconductor device according to an embodiment of the present invention;
fig. 14 to 18 are structural diagrams of a manufacturing process of a mode control semiconductor device according to an embodiment of the present invention;
fig. 19 is a structural diagram of a mode control semiconductor device according to another embodiment of the present invention.
Detailed Description
The light emitting semiconductor device is more susceptible to damage in the active gain region of the facet at high optical power output. In order to solve the problem of increased failure of a light emitting semiconductor device due to optical catastrophic damage to a cavity surface, a method comprising: the damage resistance of the cavity surface is improved by forming a window structure on the cavity surface in a hybrid mode through a method of ultrahigh vacuum cleavage and cavity surface passivation. However, these solutions are very demanding with respect to process equipment and process condition control, which increases the process complexity and cost of light emitting semiconductor device production. The other method comprises the following steps: the power enhancement is achieved by the epitaxial structure design of the chip in a way that reduces the optical confinement of the gain material, however this approach will result in an increase in the threshold of the light emitting semiconductor device, reducing the efficiency performance of the light emitting semiconductor device. Yet another method includes: the effect of protecting the front cavity surface is achieved by changing the optical limiting factor in a mode of gradually etching the limiting layer of the end surface area, but the gradual etching is extremely difficult to realize in the semiconductor process.
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
An embodiment of the present invention provides a mode control semiconductor device, with reference to fig. 1 to 3 in combination, having a front cavity surface and a rear cavity surface that are oppositely disposed, the mode control semiconductor device including:
a semiconductor substrate layer 100;
an active layer 130 on the semiconductor substrate layer 100;
a first confinement layer 110 and a second confinement layer 150 on the semiconductor substrate layer 100 and on both sides of the active layer 130, respectively;
a first waveguide layer 120 between the first confinement layer 110 and the active layer 130;
a second waveguide layer 140 located between the second confinement layer 150 and the active layer 130, the second waveguide layer 140 having a thickness less than or equal to the thickness of the first waveguide layer 120;
a first light modulation layer 160, the first light modulation layer 160 being located in a portion of the second confinement layer 150 adjacent to the front facet, a refractive index of the first light modulation layer 160 being smaller than a refractive index of the second confinement layer 150, a width of the first light modulation layer 160 increasing in a direction from the rear facet to the front facet.
In this embodiment, the width of the first dimming layer 160 refers to: a dimension in a direction parallel to the front cavity plane and parallel to the upper surface of the semiconductor substrate layer 100.
In this embodiment, the semiconductor substrate layer 100 is a gallium arsenide substrate layer. It should be noted that, in other embodiments, the semiconductor substrate layer may also be a substrate layer of other materials.
In this embodiment, light generated by the mode control semiconductor device is emitted from the front cavity surface, and the rear cavity surface reflects the light.
In this embodiment, taking the first confinement layer 110 located between the active layer 130 and the semiconductor substrate layer 100 and the second confinement layer located on the side of the active layer 130 opposite to the semiconductor substrate layer 100 as an example, the first dimming layer 160 is correspondingly located on the side of the active layer 130 opposite to the semiconductor substrate layer 100.
In other embodiments, it may also be: the first limiting layer is located on one side, opposite to the semiconductor substrate layer, of the active layer, the second limiting layer is located between the active layer and the semiconductor substrate layer, and correspondingly, the first dimming layer is located between the active layer and the semiconductor substrate layer.
First waveguide layer 120 has a conductivity type opposite to that of second waveguide layer 140.
In a specific embodiment, the material of first waveguide layer 120 is Al doped with conductive ions5%Ga95%As, the material of the second waveguide layer 140 is Al doped with conductive ions5%Ga95%As. The material of the first limiting layer is Al doped with conductive ions13%Ga13%As, the material of the second limiting layer is Al doped with conductive ions36%Ga36%As. It should be noted that in other embodiments, other materials may be selected for first waveguide layer 120 and second waveguide layer 140.
In one embodiment, the thickness of the first confinement layer 110 is 680nm to 720nm, and the thickness of the second confinement layer 150 is 680nm to 720 nm. In other embodiments, the thicknesses of the first confinement layer and the second confinement layer may also be selected to have other values.
In this embodiment, the thickness of second waveguide layer 140 is smaller than that of first waveguide layer 120, that is, an asymmetric waveguide used in a mode control semiconductor device is taken as an example. Referring collectively to fig. 3 and 4, the peak of the optical field distribution is located in first waveguide layer 120, and more light propagates in first waveguide layer 120. In this embodiment, second waveguide layer 140 is a P-type waveguide layer, first waveguide layer 120 is an N-type waveguide layer, and light loss in the N-type waveguide layer is small relative to light loss in the P-type waveguide layer, so when the optical field distribution peak is located in first waveguide layer 120, the light propagation loss is reduced, and sufficient modal gain can be obtained to achieve the lasing condition.
The horizontal axis of fig. 4 is a position in the epitaxial direction, which refers to a direction perpendicular to the surface of the semiconductor substrate layer 100, the right side of the horizontal axis of fig. 4 represents a position close to the bottom surface of the semiconductor substrate layer 100, and the left side of the horizontal axis of fig. 4 represents a position away from the semiconductor substrate layer 100. The first vertical axis in fig. 4 represents the refractive index, the second vertical axis in fig. 4 represents the light field intensity, and fig. 4 has two curves, the first curve in fig. 4 is a distribution graph of the refractive index of the non-dimming region a with the position in the epitaxial direction, and the second curve in fig. 4 is a distribution graph of the light field of the non-dimming region a. The first curve in fig. 4 illustrates the refractive indices of the second confinement layer 150, the second waveguide layer 140, the active layer 130, the first waveguide layer 120, and the first confinement layer 110 of the non-dimming region a in order from left to right.
Referring to fig. 3 and 4, in the asymmetric waveguide employed in the mode control semiconductor device, the non-dimming region a concentrates light in the first waveguide layer 120 under the confinement action of the first waveguide layer 120 and the second waveguide layer 140. In a specific embodiment, second waveguide layer 140 has a thickness of 280 nm to 320 nm, such as 300 nm, and first waveguide layer 120 has a thickness of 580 nm to 620nm, such as 600 nm.
Referring to fig. 5 to 9, the horizontal axis of fig. 5 to 9 is a position in an epitaxial direction, the epitaxial direction refers to a direction perpendicular to the surface of the semiconductor substrate layer 100, the right side of the horizontal axis of fig. 5 to 9 represents a position close to the bottom surface of the semiconductor substrate layer 100, and the left side of the horizontal axis of fig. 5 to 9 represents a position away from the semiconductor substrate layer 100. The first vertical axis in fig. 5 to 9 represents the refractive index, the second vertical axis in fig. 5 to 9 represents the light field intensity, the first curve in fig. 5 to 9 is a distribution graph of the refractive index of the first light modulation region B with the position in the epitaxial direction, the second curve in fig. 5 to 9 is a light field distribution curve of the first light modulation region B, the thicknesses of the first light modulation layers in fig. 5 to 9 are different, and specifically, the thickness of the first light modulation layer in fig. 5 to 9 increases. A first curve in fig. 5 illustrates refractive indexes of the first dimming layer of the first dimming region B, the second confinement layer at the bottom of the first dimming layer, the second waveguide layer, the active layer, the first waveguide layer, and the first confinement layer in sequence from left to right. A first curve in fig. 6 shows refractive indexes of the first dimming layer, the second waveguide layer, the active layer, the first waveguide layer, and the first confinement layer of the first dimming region B in order from left to right, and a thickness of the first dimming layer in fig. 6 is equal to a thickness of the first confinement layer. A first curve in fig. 7 sequentially shows refractive indexes of the first dimming layer, the second waveguide layer, the active layer, the first waveguide layer, and the first confinement layer of the first dimming region B from left to right, where a thickness of the first dimming layer in fig. 7 is greater than a thickness of the first confinement layer, and the first dimming layer further extends into a portion of the thickness of the second waveguide layer. A first curve in fig. 8 illustrates refractive indexes of the first dimming layer, the second waveguide layer, the active layer, the first waveguide layer, and the first confinement layer of the first dimming region B in order from left to right, and a thickness of the first dimming layer in fig. 8 is greater than a thickness of the first dimming layer in fig. 7. A first curve in fig. 9 illustrates refractive indexes of the first dimming layer, the second waveguide layer, the active layer, the first waveguide layer, and the first confinement layer of the first dimming region B in order from left to right, and a thickness of the first dimming layer in fig. 9 is greater than a thickness of the first dimming layer in fig. 8.
Referring to fig. 3, in the present embodiment, the black line with an arrow in fig. 3 illustrates the peak position of the optical mode, the first light modulation layer 160 can press the optical mode toward the first waveguide layer 120, and the distance from the peak position of the optical mode of the first light modulation region B to the active layer 130 is greater than the distance from the peak position of the optical mode of the non-light modulation region a to the active layer 130. Referring to fig. 5 to 9, as the thickness of the first dimming layer 160 increases, the peak position of the light field of the first dimming region B is continuously away from the active layer 130.
Referring to fig. 10, a horizontal axis in fig. 10 is a distance from a surface of the first dimming layer 160 facing the active layer to the active layer, and a side surface of fig. 10The vertical axis being the light confinement factor f of the active layer of the first dimming area B and the light confinement factor f of the active layer of the non-dimming area a0As can be seen from fig. 10, the light confinement factor f of the active layer of the first dimming area B is relative to the light confinement factor f of the active layer0And the light confinement factor f of the active layer 130 of the first dimming region B decreases as the distance between the side surface of the first dimming layer 160 facing the active layer 130 to the active layer 130 decreases, that is, as the thickness of the first dimming layer 160 increases.
Referring to fig. 11, the horizontal axis in fig. 11 is the distance between the surface of the first light modulation layer 160 facing the active layer and the active layer, and the vertical axis in fig. 11 is the threshold power P against optical catastrophic damage of the front facet when the first light modulation layer 160 is disposed and the threshold power P against optical catastrophic damage of the front facet when the first light modulation layer is not disposed0The ratio of (a) to (b). As can be seen, in the present embodiment, since the first dimming layer 160 is disposed, the threshold power of the front cavity surface against optical catastrophic damage increases, and as the distance between the side surface of the first dimming layer 160 facing the active layer 130 and the active layer 130 decreases, that is, as the thickness of the first dimming layer 160 increases, the threshold power of the front cavity surface against optical catastrophic damage increases.
If light is concentrated near the active layer in the area near the front facet, optical catastrophe of the facet can be caused due to overlarge optical field density at the junction of the front facet and the active layer. To avoid this phenomenon, in the present embodiment, the first light modulation layer 160 presses the optical mode toward the first waveguide layer 120 by replacing the second confinement layer in the vicinity of the front cavity surface (first light modulation region) of the mode control semiconductor device with a material having a lower refractive index, that is, by providing the first light modulation layer 160.
In this embodiment, the first light modulation layer 160 is located in a portion of the second confinement layer 150 adjacent to the front cavity surface and extends into a portion of the second waveguide layer 140 with a thickness, so as to further reduce the light confinement factor r of the active layer 130 of the first light modulation region B and further improve the threshold power of the front cavity surface against optical catastrophic damage. In other embodiments, the first top dimming layer is located only in a portion of the second confinement layer adjacent to the front facet.
It should be noted that, in other embodiments, the thickness of the second waveguide layer is equal to that of the first waveguide layer, in this case, a symmetric waveguide is adopted for the mode control semiconductor device, the peak of the optical field distribution of the non-dimming region is located in the active layer, in this case, the first dimming layer can also press the optical mode toward the first waveguide layer, and the distance from the peak position of the optical mode of the first dimming region to the active layer is greater than the distance from the peak position of the optical mode of the non-dimming region to the active layer.
In this embodiment, since the width of the first light modulation layer 160 increases in the direction from the rear cavity surface to the front cavity surface, the width of the first light modulation layer 160 gradually increases, the effective refractive index gradually decreases from the interface between the non-light modulation region a and the first light modulation region B to the front cavity surface in the first light modulation region B, and the light gradually presses toward the first waveguide layer 120, so that the coupling loss of the light at the interface between the first light modulation layer and the second confinement layer is reduced, and the reflection and propagation losses are reduced. Coupling losses at the interface between the first dimming layer and the second waveguide layer are also reduced when the first dimming layer also extends into the second waveguide layer.
The projection pattern of the first dimming layer 160 on the surface of the semiconductor substrate layer 100 comprises a triangle or a horn shape. In the present embodiment, the shape of the first dimming layer 160 is exemplified as a triangle. In one embodiment, when the projected pattern of the first dimming layer 160 on the surface of the semiconductor substrate layer 100 includes a triangle, the vertex angle of the triangle is 5 degrees to 50 degrees, such as 5 degrees, 10 degrees, 15 degrees, 20 degrees, 25 degrees, 30 degrees, 35 degrees, 40 degrees, 45 degrees, or 50 degrees.
The number of the first light modulation layers 160 is several, and the several first light modulation layers 160 are arranged along a direction parallel to the front cavity surface and parallel to the surface of the semiconductor substrate layer 100.
In one embodiment, for the projection of the adjacent first dimming layers 160 on the surface of the semiconductor substrate layer 100, the bottom side of the projection of one first dimming layer 160 on the surface of the semiconductor substrate layer 100 is connected with the bottom side of the projection of the other first dimming layer 160 on the surface of the semiconductor substrate layer 100. In other embodiments, adjacent first dimming layers are spaced apart.
In one embodiment, the number of the first dimming layers 160 is 10 to 20.
The material of the first dimming layer 160 includes aluminum gallium arsenic, aluminum gallium indium phosphorus, silicon oxide, or silicon nitride. It should be noted that, in other embodiments, the material of the first dimming layer may also be other suitable materials, which is not limited.
The semiconductor device is adapted to emit light at a wavelength characteristic of the wavelength. The length dimension of the first light modulation layer 160 in the direction perpendicular to the front cavity surface is 10 times to 200 times of the characteristic wavelength. If the length of the first dimming layer 160 in the direction perpendicular to the front cavity surface is too long, the optical confinement factor of the active layer 130 in the non-dimming area a is reduced, and the optical gain energy of the active layer 130 in the non-dimming area a is reduced; if the length of the first light modulation layer 160 in the direction perpendicular to the front cavity surface is too small, the light mode transmitted from the non-light modulation region a cannot be effectively converted into the light mode of the first light modulation region B in the first light modulation region B, and the degree of lowering the active layer confinement factor of the first light modulation region B is low.
Referring to fig. 12, a horizontal axis of fig. 12 represents different shapes of the first dimming layer, a vertical axis of fig. 12 represents transmission loss of the mode control semiconductor device, a represents that the first dimming layer is disposed in all of the first dimming regions B, B represents that a projection pattern of the first dimming layer on the surface of the semiconductor substrate layer is a triangular row, and C represents that a projection pattern of the first dimming layer on the surface of the semiconductor substrate layer is a trumpet shape, and the first dimming layer with gradual deformation is used to reduce interface light propagation loss between the first dimming region B and the non-dimming region a.
In this embodiment, the second confinement layer is located on a side of the active layer opposite to the semiconductor substrate layer, and the mode control semiconductor device further includes: the contact layer is positioned on one side, facing away from the semiconductor substrate layer, of the second limiting layer; the current isolation dielectric layer is positioned on one side, back to the semiconductor substrate layer, of the contact layer; the electrode is positioned on one side, back to the semiconductor substrate layer, of the current isolation dielectric layer; an anti-reflection film on the front cavity surface; and the reflecting film is positioned on the back cavity surface.
Another embodiment of the present invention provides a method for manufacturing a mode control semiconductor device having a front cavity surface and a rear cavity surface disposed opposite to each other, referring to fig. 13, including the steps of:
s1, providing a semiconductor substrate layer;
s2, forming an active layer, a first limiting layer, a second limiting layer, a first waveguide layer and a second waveguide layer on the semiconductor substrate layer, wherein the first limiting layer and the second limiting layer are respectively positioned on two sides of the active layer, the first waveguide layer is positioned between the first limiting layer and the active layer, the second waveguide layer is positioned between the second limiting layer and the active layer, and the thickness of the second waveguide layer is smaller than or equal to that of the first waveguide layer;
and S3, forming a first light modulation layer in a part of the second limiting layer adjacent to the front cavity surface, wherein the refractive index of the first light modulation layer is smaller than that of the second limiting layer, and the width of the first light modulation layer increases in the direction from the rear cavity surface to the front cavity surface.
In this embodiment, taking the first confinement layer located between the active layer and the semiconductor substrate layer, and the second confinement layer located on the side of the active layer opposite to the semiconductor substrate layer as an example, correspondingly, the first dimming layer is located on the side of the active layer opposite to the semiconductor substrate layer. In other embodiments, it may also be: the first limiting layer is located on one side, opposite to the semiconductor substrate layer, of the active layer, the second limiting layer is located between the active layer and the semiconductor substrate layer, and correspondingly, the first dimming layer is located between the active layer and the semiconductor substrate layer.
This is described in detail below with reference to fig. 14 to 18.
Referring to fig. 14, a semiconductor substrate layer 100 is provided.
In this embodiment, the semiconductor substrate layer 100 is a gallium arsenide substrate layer. It should be noted that, in other embodiments, the semiconductor substrate layer may also be a substrate layer of other materials.
In this embodiment, the mode control semiconductor device is an edge emitting semiconductor laser.
Referring to fig. 15, a first confinement layer 110 is formed on the semiconductor substrate layer 100; forming a first waveguide layer 120 on a side of the first confinement layer 110 facing away from the semiconductor substrate layer 100; forming an active layer 130 on a side of the first waveguide layer 120 facing away from the first confinement layer 110; forming a second waveguide layer 140 on a side of the active layer 130 opposite to the first waveguide layer 120; a second confinement layer 150 is formed on a side of the second waveguide layer 140 facing away from the active layer 130.
The formation processes of the first confinement layer 110, the first waveguide layer 120, the active layer 130, the second waveguide layer 140, and the second confinement layer 150 are epitaxial growth processes.
In this embodiment, the refractive index of the second confinement layer 150 is smaller than the refractive index of the second waveguide layer 140, the refractive index of the second waveguide layer 140 is smaller than the refractive index of the active layer 130, the refractive index of the first confinement layer 110 is smaller than the refractive index of the first waveguide layer 120, and the refractive index of the first waveguide layer 120 is smaller than the refractive index of the active layer 130.
In this embodiment, a buffer layer (not shown) is formed on the semiconductor substrate layer 100 before the first confinement layer 110 is formed.
The mode control semiconductor device has a front cavity surface and a rear cavity surface that are oppositely disposed. Light emitted from the active layer exits from the front facet after resonating between the front facet and the back facet.
Referring to fig. 16 and 17 in combination, fig. 17 is a top view of the first light modulation layer 160 and the second confinement layer 150, the first light modulation layer 160 is formed in a portion of the second confinement layer 150 adjacent to the front cavity surface, and the refractive index of the first light modulation layer 160 is smaller than the refractive index of the second confinement layer 150.
In this embodiment, the step of forming the first dimming layer 160 includes: a first opening is formed in a portion of the second confinement layer 150 adjacent to the front cavity surface, and a first light modulation layer 160 is formed in the first opening. In this embodiment, the first opening also extends into a portion of the second waveguide layer. It should be noted that in other embodiments, the first opening is only located in a portion of the second confinement layer 150 adjacent to the front cavity surface.
Referring to fig. 18, a contact layer 170 is formed on a side of the second confinement layer 150 and the first dimming layer 160 facing away from the active layer 130; an electrode 180 is formed on a side of the contact layer 170 facing away from the active layer 130.
Then, forming an antireflection film on the front cavity surface; and forming a reflecting film on the rear cavity surface.
In this embodiment, the method further includes: before the electrode 180 is formed, a current isolating dielectric layer is formed on the side of the contact layer 170 facing away from the active layer 130, wherein the current isolating dielectric layer allows current to pass through a central region thereof, and does not allow current to pass through an edge region thereof.
Another embodiment of the present invention also provides a mode control semiconductor device, and referring to fig. 19, the present embodiment is different from the previous embodiment in that the mode control semiconductor device further includes: a second light modulation layer 162, wherein the second light modulation layer 162 is located in a portion of the second confinement layer 150 adjacent to the rear surface, the second light modulation layer 162 is spaced apart from the first light modulation layer 160, and a width of the second light modulation layer 162 increases in a direction from the front surface to the rear surface.
The material of the second dimming layer 162 refers to the material of the first dimming layer 160.
In this embodiment, the second dimming layer 162 is further located in a portion of the second confinement layer 150 adjacent to the rear facet and further extends into a portion of the thickness of the second waveguide layer 140. In other embodiments, the second dimming layer is located only in a portion of the second confinement layer adjacent to the rear facet.
The projection pattern of the second light modulation layer 162 on the surface of the semiconductor substrate layer 100 includes a triangle or a horn shape. In one embodiment, when the projection pattern of the second light modulation layer 162 on the surface of the semiconductor substrate layer 100 includes a triangle, the vertex angle of the triangle is 5 degrees to 50 degrees.
The number of the second light modulation layers 162 is several, and the several second light modulation layers 162 are arranged along a direction parallel to the front cavity surface and parallel to the semiconductor substrate layer 100.
In one embodiment, for the projection of the adjacent second dimming layer 162 on the surface of the semiconductor substrate layer 100, the bottom side of the projection of one second dimming layer 162 on the surface of the semiconductor substrate layer 100 is connected with the bottom side of the projection of the other second dimming layer 162 on the surface of the semiconductor substrate layer 100. In other embodiments, adjacent second dimming layers are spaced apart.
In one embodiment, the length dimension of the second light modulation layer 162 in the direction perpendicular to the front facet is 10 times to 200 times the characteristic wavelength.
The same contents of this embodiment as those of the previous embodiment will not be described in detail.
Accordingly, another embodiment of the present invention further provides a method for manufacturing a mode control semiconductor device, and referring to fig. 19, a second light modulation layer is formed in a portion of the second confinement layer adjacent to the rear surface, the second light modulation layer is spaced apart from the first light modulation layer, and a width of the second light modulation layer increases in a direction from the front surface to the rear surface.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.

Claims (12)

1. A mode control semiconductor device having a front facet and a back facet disposed opposite to each other, comprising:
a semiconductor substrate layer;
an active layer on the semiconductor substrate layer;
the first limiting layer and the second limiting layer are positioned on the semiconductor substrate layer and positioned on two sides of the active layer respectively;
a first waveguide layer between the first confinement layer and the active layer;
a second waveguide layer located between the second confinement layer and the active layer, the second waveguide layer having a thickness less than or equal to the thickness of the first waveguide layer;
a first light modulation layer located in a portion of the second confinement layer adjacent to the front facet, the first light modulation layer having a refractive index smaller than that of the second confinement layer, the first light modulation layer having a width that increases in a direction from the rear facet to the front facet.
2. The mode control semiconductor device according to claim 1, wherein the first light modulation layer further extends into a partial thickness of the second waveguide layer.
3. The mode control semiconductor device according to claim 1, wherein a projected pattern of the first dimming layer on the surface of the semiconductor substrate layer comprises a triangle or a horn.
4. The mode control semiconductor device according to claim 1, wherein the number of the first light modulation layers is several, and the several first light modulation layers are arranged in a direction parallel to the front cavity surface and parallel to a surface of the semiconductor substrate layer.
5. The mode control semiconductor device according to claim 1, wherein a material of the first light modulation layer comprises aluminum gallium arsenide, aluminum gallium indium phosphide, silicon oxide, or silicon nitride.
6. The mode control semiconductor device according to claim 1, wherein the semiconductor device is adapted to emit light having a wavelength of a characteristic wavelength; the length dimension of the first light modulation layer in the direction perpendicular to the front cavity surface is 10-200 times of the characteristic wavelength.
7. The mode control semiconductor device according to claim 1, wherein the first waveguide layer is an N-type waveguide layer, the second waveguide layer is a P-type waveguide layer, the first confinement layer is an N-type confinement layer, and the second confinement layer is a P-type confinement layer.
8. The mode control semiconductor device according to any one of claims 1 to 7, further comprising: the second light modulation layer is positioned in a part of the second limiting layer adjacent to the rear cavity surface, the second light modulation layer is spaced from the first light modulation layer, and the width of the second light modulation layer increases gradually in the direction from the front cavity surface to the rear cavity surface.
9. A method of fabricating a mode control semiconductor device having oppositely disposed front and back facets, comprising:
providing a semiconductor substrate layer;
forming an active layer, a first limiting layer, a second limiting layer, a first waveguide layer and a second waveguide layer on the semiconductor substrate layer, wherein the first limiting layer and the second limiting layer are respectively positioned on two sides of the active layer, the first waveguide layer is positioned between the first limiting layer and the active layer, the second waveguide layer is positioned between the second limiting layer and the active layer, and the thickness of the second waveguide layer is less than or equal to that of the first waveguide layer;
and forming a first light modulation layer in a part of the second confinement layer adjacent to the front cavity surface, the first light modulation layer having a refractive index smaller than that of the second confinement layer, the first light modulation layer having a width that increases in a direction from the rear cavity surface to the front cavity surface.
10. The method for manufacturing a mode control semiconductor device according to claim 9, wherein in the step of forming the first light modulation layer, the first light modulation layer further extends into a partial thickness of the second waveguide layer.
11. The manufacturing method of the mode control semiconductor device according to claim 9, wherein a material of the first light modulation layer includes aluminum gallium arsenide, aluminum gallium indium phosphide, silicon oxide, or silicon nitride.
12. The method for manufacturing a mode control semiconductor device according to any one of claims 9 to 11, further comprising: and forming a second light modulation layer in a part of the second limiting layer adjacent to the rear cavity surface, wherein the second light modulation layer is spaced from the first light modulation layer, and the width of the second light modulation layer increases in a direction from the front cavity surface to the rear cavity surface.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023213328A1 (en) * 2022-05-05 2023-11-09 苏州长光华芯光电技术股份有限公司 Longitudinal carrier modulation type high-power semiconductor light-emitting chip and preparation method therefor

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6298078B1 (en) * 1999-02-25 2001-10-02 Opto Power Corporation Laser diodes with composite material systems which decouple refractive index and band gap profiles
CN1622406A (en) * 2003-11-27 2005-06-01 中国科学院半导体研究所 Integrated device of semiconductor laser and wedge shaped waveguide modular speckle converter
US20160322787A1 (en) * 2014-01-10 2016-11-03 Fujitsu Limited Optical semiconductor element and method of manufacturing the same
CN107681465A (en) * 2017-09-30 2018-02-09 中国科学院长春光学精密机械与物理研究所 Semiconductor optical amplifier and preparation method thereof
CN110114945A (en) * 2016-10-28 2019-08-09 恩耐公司 Method, system and the equipment inhibited for higher order mode
CN112582873A (en) * 2020-12-30 2021-03-30 浙江长芯光电科技有限公司 High-power semiconductor optical amplifier
CN112868149A (en) * 2018-11-02 2021-05-28 华为技术有限公司 Optical amplifier
CN113206441A (en) * 2021-04-30 2021-08-03 中国科学院半导体研究所 Main oscillation power amplification laser and preparation method thereof
CN113745968A (en) * 2021-08-27 2021-12-03 因林光电科技(苏州)有限公司 Semiconductor laser and preparation method thereof
CN113794104A (en) * 2021-09-29 2021-12-14 中国科学院半导体研究所 Photonic crystal laser

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6298078B1 (en) * 1999-02-25 2001-10-02 Opto Power Corporation Laser diodes with composite material systems which decouple refractive index and band gap profiles
CN1622406A (en) * 2003-11-27 2005-06-01 中国科学院半导体研究所 Integrated device of semiconductor laser and wedge shaped waveguide modular speckle converter
US20160322787A1 (en) * 2014-01-10 2016-11-03 Fujitsu Limited Optical semiconductor element and method of manufacturing the same
CN110114945A (en) * 2016-10-28 2019-08-09 恩耐公司 Method, system and the equipment inhibited for higher order mode
CN107681465A (en) * 2017-09-30 2018-02-09 中国科学院长春光学精密机械与物理研究所 Semiconductor optical amplifier and preparation method thereof
CN112868149A (en) * 2018-11-02 2021-05-28 华为技术有限公司 Optical amplifier
CN112582873A (en) * 2020-12-30 2021-03-30 浙江长芯光电科技有限公司 High-power semiconductor optical amplifier
CN113206441A (en) * 2021-04-30 2021-08-03 中国科学院半导体研究所 Main oscillation power amplification laser and preparation method thereof
CN113745968A (en) * 2021-08-27 2021-12-03 因林光电科技(苏州)有限公司 Semiconductor laser and preparation method thereof
CN113794104A (en) * 2021-09-29 2021-12-14 中国科学院半导体研究所 Photonic crystal laser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023213328A1 (en) * 2022-05-05 2023-11-09 苏州长光华芯光电技术股份有限公司 Longitudinal carrier modulation type high-power semiconductor light-emitting chip and preparation method therefor

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