CN113867795A - Independent display card management method, independent display card and electronic equipment - Google Patents
Independent display card management method, independent display card and electronic equipment Download PDFInfo
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- 238000007726 management method Methods 0.000 title claims abstract description 145
- 238000000034 method Methods 0.000 claims abstract description 9
- 238000012545 processing Methods 0.000 claims description 7
- 238000009877 rendering Methods 0.000 description 7
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4403—Processor initialisation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
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- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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Abstract
The application provides an independent display card management method, an independent display card and electronic equipment. The method comprises the following steps: the first programmable management module performs video card service management, and comprises the steps of acquiring a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent video card to execute the instruction; and the second programmable management module is used for carrying out display card system management, including management of power-on initialization, reset and working performance dynamic adjustment of the sub-engines in the independent display cards, and management of power-on initialization of the memory of the display cards. The method simplifies hardware logic, and the two management modules have clear division of labor, thereby isolating service management and system management and ensuring that the system is safer and more stable.
Description
Technical Field
The application belongs to the technical field of computers, and particularly relates to an independent display card management method, an independent display card and electronic equipment.
Background
Referring to fig. 1, a management module in a conventional independent graphics card manages sub-engines within the independent graphics card in a fixed pipeline manner. The tasks performed by the management module include: receiving a register instruction from a host-side processor (the register instruction only contains simple command information, such as rendering starting), reading a command block in a host-side memory (a large amount of information required by an independent display card for graphics rendering comes from the command block, the commands in the command block are, for example, how many triangles are rendered, and the positions of the triangles are specified, and one command block stores one command), and interpreting the read command into instructions and sending the instructions to each sub-engine; scheduling the task execution sequence of each sub-engine; managing power-on initialization, dynamic power adjustment, processing interrupt requests issued by the sub-engines, and the like of the sub-engines.
The above management mode of the management module has a plurality of disadvantages: firstly, the hardware logic is complex, a large number of judgment statements need to be executed, a host processor is needed for compensation, and the performance loss is large; second, the update of the sub-engine algorithm cannot be quickly adapted.
Disclosure of Invention
The present application is directed to provide an independent graphics card management method, an independent graphics card and an electronic device, to at least partially solve the disadvantages in the prior art.
In order to solve the technical problem, the following technical scheme is adopted in the application: an independent display card management method comprises the following steps: the first programmable management module performs video card service management, and comprises the steps of acquiring a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent video card to execute the instruction; and the second programmable management module is used for carrying out display card system management, including management of power-on initialization, reset and working performance dynamic adjustment of the sub-engines in the independent display cards, and management of power-on initialization of the memory of the display cards.
In order to solve the technical problem, the following technical scheme is adopted in the application: an independent display card comprises a first programmable management module, a second programmable management module, a plurality of sub-engines and a display card memory; the first programmable management module is used for carrying out video card service management, and comprises the steps of obtaining a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent video card to execute the instruction; the second programmable management module is used for carrying out display card system management, including management of power-on initialization, reset and working performance dynamic adjustment of the sub-engines in the independent display cards, and management of power-on initialization of the memory of the display cards.
In order to solve the technical problem, the following technical scheme is adopted in the application: an electronic device includes the aforementioned independent graphics card, and includes a host-side processor and a host-side memory, where the host-side processor is configured to write a command, which is interpreted by the first programmable management module, into the host-side memory.
Compared with the prior art, the beneficial effect of this application is: the first programmable management module and the second programmable management module are isolated from each other and are responsible for different types of management tasks (one is to process a task issued by a host processor and schedule each sub-engine to execute the task, and the other is to manage the working state of each functional module in the independent display card), so that the hardware logic of the first programmable management module and the second programmable management module is simplified, the performance requirement on the host processor is reduced, and the performance of the whole machine is improved. If a certain sub-engine algorithm is updated, only the control logic of the first control module needs to be updated, and the complexity of updating the control logic of the first control module is reduced because the control logic of the first control module is relatively simple.
Drawings
Fig. 1 is a block diagram illustrating a structure of an electronic device including a separate graphics card according to the related art.
Fig. 2 is a block diagram of an electronic device including a stand-alone graphics card according to an embodiment of the present disclosure.
Detailed Description
In this application, it will be understood that terms such as "including" or "having," or the like, are intended to indicate the presence of the disclosed features, integers, steps, acts, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, acts, components, parts, or combinations thereof.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
The application is further described with reference to examples of embodiments shown in the drawings.
Referring to fig. 2, in the independent graphics card provided in the embodiment of the present application, two independent programmable management modules are disposed, that is, a first programmable management module 1 and a second programmable management module 2. The two modules split the task executed by the traditional programmable management module of the independent display card.
Based on the structure shown in fig. 2, an embodiment of the present application provides an independent graphics card management method, including: the first programmable management module 1 performs video card service management, and comprises the steps of obtaining a command from a host memory 6 through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent video card to execute the instruction; the second programmable management module 2 performs system management of the graphics card, including managing power-on initialization, reset and dynamic adjustment of working performance of the sub-engines in the independent graphics card, and managing power-on initialization of the graphics card memory 34.
The sub-engine herein refers to a hardware module in an independent graphics card that performs different types of tasks. The sub-engine 31 is, for example, a graphics rendering sub-engine (also referred to as GPU) which can be used for 3D image rendering. The sub-engine 32 is, for example, a video codec sub-engine, which may be used for video codec. The sub-engine 33 is, for example, a display control sub-engine, which can be used to transmit the display data in the frame buffer in the graphics card memory 34 of the independent graphics card to the video codec sub-engine for video encoding by the video codec sub-engine. The above are all common functional modules in the independent graphics card, and the function and structure of these functional modules are not limited in this application.
The functional modules (i.e. the sub-engines) inside the independent display card communicate with each other through the display card internal bus 4.
Specifically, for simplicity, one command is, for example, to draw 100 triangles. The first programmable management module 1 parses the command into instructions. For example, the first programmable management module 1 performs a write operation to a specific register of the graphics rendering sub-engine, and the write value is 100. So that the graphics-rendering sub-engine draws 100 triangles. Of course, a command may also be translated into multiple instructions. Or the first programmable management module 1 may write a specific instruction in the graphics card memory 34. A sub-engine reads instructions from a specific area of the graphics card memory 34.
The second programmable management module 2 adjusts the working frequency and/or working voltage of each sub-engine according to the busy degree of each sub-engine.
For example, if the load of the sub-engine is increased, the working voltage is increased and the working frequency is increased; and if the load of the sub-engine is reduced, the working frequency and the working voltage of the sub-engine are reduced.
If a sub-engine is in error, the sub-engine needs to be reset. If the second programmable management module 2 receives an error interrupt sent by a certain sub-engine, it determines whether the sub-engine needs to be reset according to the error interrupt.
The second programmable management module 2 also performs initialization setting on each sub-engine and on the graphics card memory 34. Specifically, each sub-engine and a specific register in the display memory are set, thereby setting their operating states.
For example, an enable register of a certain sub-engine is configured to be 1, and the sub-engine is enabled.
For example, the working area memory address register of a sub-engine is configured to enable the sub-engine to have a working area in the graphics card memory 34.
For example, an interrupt signal enable register of a certain sub-engine is configured, so that the sub-engine can report an interrupt request to the second programmable management module 2.
The state after the sub-engine reset is generally the same as the state after initialization.
Such as configuring the operating frequency of the graphics card memory 34 itself, setting memory training parameters, etc.
It can be seen that the service management of each sub-engine is handed to the first programmable management module 1 for processing, and the system management task unrelated to the service is handed to the second programmable management module 2 for processing.
Any command sent by the host processor 5 to the independent graphics card is sent to the first programmable management module 1, and the second programmable management module 2 is not in communication with the host processor 5. The second programmable management module 2 is self-consistent and self-managed. The first programmable management module 1 and the second programmable management module 2 are isolated from each other and are responsible for different types of management tasks (one is to process a task issued by the host processor 5 and schedule each sub-engine to execute the task, and the other is to manage the working state of each functional module in the independent display card), so that the hardware logic of the first programmable management module and the second programmable management module is simplified, the performance requirement on the host processor 5 is reduced, and the performance of the whole machine is improved. If a certain sub-engine algorithm is updated, only the control logic of the first programmable management module 1 needs to be updated, and the complexity of updating the control logic of the first programmable management module 1 is reduced because the control logic is relatively simple. For the same reason, the updating of the control logic of the second programmable management module 2 is also simpler.
In some embodiments, the instructions interpreted by the first programmable management module 1 from the commands acquired from the host-side memory 6 include: task instructions and synchronization instructions.
A task instruction is a request for a sub-engine to perform a specific task. The task instruction is, for example, to ask the GPU to draw a red triangle.
The synchronization instruction is a synchronization that controls the cadence of the respective sub-engines. The synchronization instruction, for example, controls the video coding sub-engine to start video coding of a frame of image after the GPU finishes rendering the frame of image.
In some embodiments, the host-side memory 6 stores a command queue, and the first programmable management module 1 periodically obtains commands from the command queue; alternatively, the host-side memory 6 stores a plurality of command queues, and the first programmable management module 1 acquires commands from each command queue in turn and periodically.
The command queue is a command written in the host-side memory 6 by the graphics card driver in the host-side processor 5 for the GPU to render a continuous multi-frame image.
The command queue is a first-in first-out structure, the host-end processor 5 writes commands into the command queue, the first programmable management module 1 reads the commands in the command queue through the PCIe bus 7, and the first programmable management module 1 does not need to store the commands.
The independent display cards can execute the commands in the command queues in turn according to certain granularity among a plurality of command queues. For example, in a round robin fashion in the order command queue A- > command queue B- > command queue C- > command queue A. The first programmable management module 1 performs context switching operation when switching the queue.
The writing action of the host processor 5 to the command queue and the reading action of the first control module are not affected, and the working performance of the independent display card is provided.
In some embodiments, the second programmable management module 2 receives the error interrupt sent by the sub-engine, and performs a reset operation on the sub-engine that sent the error interrupt or performs a reset operation on all the sub-engines according to the error interrupt.
I.e. the second programmable management module 2 determines whether to reset a single sub-engine or all sub-engines depending on the severity of the error interrupt.
In some embodiments, the first programmable management module 1 receives a reset instruction from the second programmable management module 2 to perform a reset operation on itself.
That is, the second programmable management module 2 can also control the first programmable management module 1 to reset when the first programmable management module 1 has an error. The safety and the stability of the independent display card are ensured.
In some embodiments, the first programmable management module 1 receives a shutdown command from the host processor 5 to shutdown the first programmable management module 1.
The first programmable management module 1 is only responsible for the management of specific independent graphics card services, and if the graphics card driver running on the host-side processor 5 determines that no services are to be executed by the current independent graphics card, the host-side processor 5 may close the first programmable management module 1.
The second programmable management module 2 needs to be in a working state all the time to ensure that the independent graphics card is in a standby state all the time.
Therefore, the power consumption is reduced on the premise of ensuring the performance of the independent display card.
Specifically, the first programmable management module 1 and the second programmable management module 2 are both micro processing units MCU. Because the MCU is programmable, the control logic of the first programmable management module 1 and the second programmable management module 2 can be dynamically updated, and the update complexity is reduced.
Based on the same inventive concept as the foregoing embodiment, the embodiment of the present application further discloses an independent display card, which refers to fig. 2 and includes a first programmable management module 1, a second programmable management module 2, a plurality of sub-engines, and a display card memory 34; the first programmable management module 1 is used for performing video card service management, and comprises the steps of obtaining a command from a host memory 6 through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in an independent video card to execute the instruction corresponding to the command; the second programmable management module 2 is configured to perform system management of the display card, including managing power-on initialization, reset, and dynamic adjustment of working performance of a sub-engine in the independent display card, and managing power-on initialization of the memory 34 of the display card.
In some embodiments, the instructions interpreted by the first programmable management module 1 from the commands acquired from the host-side memory 6 include: task instructions and synchronization instructions.
In some embodiments, the host-side memory 6 stores a command queue, and the first programmable management module 1 is specifically configured to: periodically obtaining commands from a command queue; alternatively, the host-side memory 6 stores a plurality of command queues, and the first programmable management module 1 is specifically configured to take turns and periodically obtain commands from each command queue.
In some embodiments, the second programmable management module 2 is specifically configured to: and receiving the error interrupt sent by the sub-engine, and executing reset operation on the sub-engine which sends the error interrupt or executing reset operation on all the sub-engines according to the error interrupt.
In some embodiments, the second programmable management module 2 is specifically configured to: and respectively adjusting the working frequency and/or the working voltage of each sub-engine according to the busy degree of each sub-engine.
In some embodiments, the first programmable management module 1 is specifically configured to: receiving a reset command from the second programmable management module 2 to perform a reset operation, and/or receiving a shutdown command from the host-side processor 5 to shutdown the first programmable management module 1.
In some embodiments, the first programmable management module 1 and the second programmable management module 2 are both micro processing units MCU.
An embodiment of the present application further provides an electronic device, which includes the aforementioned independent graphics card, and includes a host-side processor 5 and a host-side memory 6, where the host-side processor 5 is configured to write a command for the first programmable management module 1 to interpret into the host-side memory 6.
The electronic device is, for example, a personal computer, a game machine, or the like.
In some embodiments, the host-side processor 5 writes commands to the command queue in the host-side memory 6, and the operations of writing commands to the command queue by the host-side processor 5 and reading commands from the command queue by the first programmable management module 1 are asynchronous.
The embodiments in the present application are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments.
The protective scope of the present application is not limited to the above-described embodiments, and it is apparent that various modifications and variations can be made to the present application by those skilled in the art without departing from the scope and spirit of the present application. It is intended that the present application also include such modifications and variations as come within the scope of the appended claims and their equivalents.
Claims (13)
1. An independent graphics card management method, comprising:
the first programmable management module carries out video card service management, and comprises the steps of obtaining a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in an independent video card to execute the instruction;
and the second programmable management module is used for carrying out display card system management, including management of power-on initialization, reset and working performance dynamic adjustment of the sub-engines in the independent display cards, and management of power-on initialization of the memory of the display cards.
2. The method of claim 1, wherein the instructions interpreted by the first programmable management module from the commands retrieved from the host-side memory comprise: task instructions and synchronization instructions.
3. The method according to claim 1, wherein the second programmable management module receives an error interrupt sent by the sub-engine, and performs a reset operation on the sub-engine which sends the error interrupt or performs a reset operation on all the sub-engines according to the error interrupt.
4. The method of claim 1, wherein the second programmable management module adjusts the operating frequency and/or the operating voltage of each sub-engine according to the busy level of each sub-engine.
5. The method according to claim 1, wherein the first programmable management module receives a reset instruction from the second programmable management module to perform a reset operation on the first programmable management module itself, and/or receives a shutdown instruction from a host processor to shutdown the first programmable management module.
6. The method of claim 1, wherein the first programmable management module and the second programmable management module are each a micro-processing unit (MCU).
7. An independent display card is characterized by comprising a first programmable management module, a second programmable management module, a plurality of sub-engines and a display card memory; the first programmable management module is used for carrying out video card service management, and comprises the steps of obtaining a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent video card to execute the instruction; the second programmable management module is used for carrying out display card system management, including management of power-on initialization, reset and working performance dynamic adjustment of a sub-engine in the independent display card, and management of power-on initialization of a memory of the display card.
8. The independent graphics card of claim 7, wherein the instructions interpreted by the first programmable management module from the commands obtained from the host-side memory include: task instructions and synchronization instructions.
9. The independent graphics card of claim 7, wherein the second programmable management module is specifically configured to: and receiving the error interrupt sent by the sub-engine, and executing reset operation on the sub-engine sending the error interrupt or executing reset operation on all the sub-engines according to the error interrupt.
10. The independent graphics card of claim 7, wherein the second programmable management module is specifically configured to: and respectively adjusting the working frequency and/or the working voltage of each sub-engine according to the busy degree of each sub-engine.
11. The independent graphics card of claim 7, wherein the first programmable management module is specifically configured to: receiving a reset instruction from the second programmable management module to reset the first programmable management module, and/or receiving a shutdown instruction from a host processor to shutdown the first programmable management module.
12. The independent graphics card of claim 7, wherein the first programmable management module and the second programmable management module are both micro-processing units (MCUs).
13. An electronic device, comprising the standalone graphics card of any of claims 7 to 12, and further comprising a host-side processor and a host-side memory, wherein the host-side processor is configured to write commands to the host-side memory for interpretation by the first programmable management module.
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CN114968388A (en) * | 2022-08-01 | 2022-08-30 | 摩尔线程智能科技(北京)有限责任公司 | Booting method and system applied to microprocessor |
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CN114968388A (en) * | 2022-08-01 | 2022-08-30 | 摩尔线程智能科技(北京)有限责任公司 | Booting method and system applied to microprocessor |
CN114968388B (en) * | 2022-08-01 | 2022-11-29 | 摩尔线程智能科技(北京)有限责任公司 | Booting method and system applied to microprocessor |
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