CN114968388B - Booting method and system applied to microprocessor - Google Patents
Booting method and system applied to microprocessor Download PDFInfo
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- CN114968388B CN114968388B CN202210914408.4A CN202210914408A CN114968388B CN 114968388 B CN114968388 B CN 114968388B CN 202210914408 A CN202210914408 A CN 202210914408A CN 114968388 B CN114968388 B CN 114968388B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4406—Loading of operating system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/24—Loading of the microprogram
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The embodiment of the application relates to the technical field of boot loaders, and provides a boot method and a boot system applied to a microprocessor, wherein the method comprises the following steps: calling a board-level adaptation table after the initialization of the bottom chip is completed, wherein the board-level adaptation table is used for describing chip and/or board-level differences; initializing a board-level support packet according to the board-level adaptation table; and loading an operating system, and starting the operating system according to the board-level adaptation table. According to the embodiment of the application, the board-level adaptation table used for describing chip and/or board-level differences is introduced into the bootstrap program, so that one image file is adapted to all board startups of different types, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced.
Description
Technical Field
The present application relates to the technical field of bootloaders, and in particular, to a boot method and system for a Microprocessor (MCU).
Background
The Bootloader is a first section of code executed by the embedded system after being powered on, and after the Bootloader completes initialization of a Central Processing Unit (CPU) and related hardware, an operating system image or a solidified embedded application program is loaded into a memory and then jumps to a space where the operating system is located, so as to start the operating system to run.
For embedded systems, bootloader is implemented based on a specific hardware platform. Therefore, it is almost impossible to establish a common Bootloader for all embedded systems, and different bootloaders exist in different processor architectures. Bootloader depends not only on the architecture of the CPU, but also on the configuration of the board level devices of the embedded system. For two different embedded boards, even if they use the same processor, in order to allow a Bootloader program running on one board to run on the other board, the source program of the Bootloader is generally modified.
In turn, most bootloaders still have much commonality, and some bootloaders can also support embedded systems of multiple architectures. For example, the U-Boot (universal Boot loader) supports architectures such as PowerPC (Performance Optimization With Enhanced RISC-Performance Computing, enhanced RISC (Reduced Instruction Set Computer) Performance Optimization-Performance Computing), ARM (Advanced RISC Machine), MIPS (Microprocessor With interlocked pipelined microprocessors), and X86, which support hundreds of boards. Typically, they are all automatically bootable from a storage medium, all boot an operating system, and most support serial and ethernet interfaces.
It should be noted that the above background description is provided only for the sake of clarity and complete description of the technical solutions of the present application, and for the sake of understanding of those skilled in the art. These solutions are not considered to be known to the person skilled in the art merely because they are set forth in the background section of the present application.
Disclosure of Invention
The inventor of the present application finds that, in current implementation, bootloaders with an open source mainly include U-Boot, UEFI (Unified Extensible Firmware Interface), and the like, and the bottom layers of these two bootloaders support the following characteristics for various chip architectures and boards:
1. adding a large amount of chip architecture related codes to shield chip architecture difference;
2. adding a large number of Board Support Package (BSP) adaptive codes to realize a bottom layer interface;
3. a number of macro definitions are added to enable support and non-support of various board properties.
On one hand, however, the large number of chip architectures and BSPs are adapted, so that the size of the compiled image file is over 100k, the memory space is consumed, and for some processing units of the embedded MCU or the heterogeneous system, the memory resource itself is very small and does not meet the requirements at all; on the other hand, for a chip, a large number of macro definitions are added, which leads to high complexity and poor readability of the whole software stack.
In view of the foregoing technical problems, embodiments of the present application provide a booting method and system applied to a microprocessor.
According to an aspect of embodiments of the present application, there is provided a booting method applied to a microprocessor, the method including:
calling a board-level adaptation table after the initialization of the bottom chip is completed, wherein the board-level adaptation table is used for describing chip and/or board-level differences;
initializing a board-level support packet according to the board-level adaptation table;
and loading an operating system, and starting the operating system according to the board-level adaptation table.
According to another aspect of embodiments of the present application, there is provided a booting system applied to a microprocessor, the booting system including:
a chip module which initializes a bottom chip;
the board-level supporting package module calls a board-level adaptation table after the initialization of the bottom chip is completed, and initializes the board-level supporting package according to the board-level adaptation table, wherein the board-level adaptation table is used for describing chip and/or board-level differences; and
and the application program module loads an operating system and starts the operating system according to the board-level adaptation table.
According to still another aspect of embodiments of the present application, there is provided a microprocessor including:
the hardware system comprises a plurality of boards, a boot read only memory corresponding to each board and a storage medium;
a boot system coupled to the hardware system and the boot system of the previous embodiment, an
An operating system coupled with the boot system.
The embodiment of the present application further provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the foregoing booting method when executing the computer program.
An embodiment of the present application further provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the foregoing boot method.
An embodiment of the present application further provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the computer program implements the foregoing boot method.
The beneficial effects of the embodiment of the application are that: a board-level adaptation table for describing chip and/or board-level differences is introduced into a bootstrap program, so that an image file is adapted to all different types of boards to be started, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced.
Specific embodiments of the present application are disclosed in detail with reference to the following description and drawings, indicating the manner in which the principles of the application may be employed. It should be understood that the embodiments of the present application are not so limited in scope. The embodiments of the present application include many variations, modifications, and equivalents within the scope of the terms of the appended claims.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features of the other embodiments.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. In the drawings:
FIG. 1 is a schematic diagram of a boot method according to an embodiment of the present application;
FIG. 2 is a schematic diagram of one example of a board level adaptation table;
FIG. 3 is another schematic diagram of a boot method of an embodiment of the present application;
FIG. 4 is a diagram of a boot system for a microprocessor according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a microprocessor according to an embodiment of the present application;
fig. 6 is a schematic diagram illustrating a boot flow of the operating system 530 of the microprocessor according to the embodiment of the present application.
Detailed Description
The foregoing and other features of the present application will become apparent from the following description, taken in conjunction with the accompanying drawings. In the description and drawings, particular embodiments of the application are disclosed in detail as being indicative of some of the embodiments in which the principles of the application may be employed, it being understood that the application is not limited to the described embodiments, but, on the contrary, is intended to cover all modifications, variations, and equivalents falling within the scope of the appended claims. Various embodiments of the present application will be described below with reference to the drawings. These embodiments are merely exemplary and are not intended to limit the present application.
In the embodiments of the present application, the terms "first", "second", and the like are used for distinguishing different elements by reference, but do not denote a spatial arrangement, a temporal order, or the like of the elements, and the elements should not be limited by the terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprising," "including," "having," and the like, refer to the presence of stated features, elements, components, and do not preclude the presence or addition of one or more other features, elements, components, and elements.
In the embodiments of the present application, the singular forms "a", "an", and the like include the plural forms and are to be construed broadly as "a" or "an" and not limited to the meaning of "a" or "an"; furthermore, the term "comprising" should be understood to include both the singular and the plural, unless the context clearly dictates otherwise. Furthermore, the term "according to" should be understood to be at least partially according to … … "and the term" based on "should be understood to be at least partially based on … …" unless the context clearly dictates otherwise.
Embodiments of the first aspect
The embodiment of the application provides a guiding method applied to a microprocessor.
Fig. 1 is a schematic diagram of a booting method according to an embodiment of the present application. As shown in fig. 1, the booting method includes:
operation 110: calling a board-level adaptation table after the initialization of the bottom chip is completed, wherein the board-level adaptation table is used for describing chip and/or board-level differences;
operation 120: carrying out BSP initialization according to the board-level adaptation table;
operation 130: and loading an operating system, and starting the operating system according to the board-level adaptation table.
It should be noted that fig. 1 above only schematically illustrates an embodiment of the present application, but the present application is not limited thereto. For example, the order of execution of various operations may be appropriately adjusted, and other operations may be added or some of the operations may be subtracted. Those skilled in the art can appropriately modify the above description without being limited to the description of fig. 1.
The booting method of the embodiment of the application is suitable for different chip architectures including but not limited to ARM, RISC-V and the like, and when a bottom chip is initialized, a board-level adaptation table is called to obtain related information. Because the board-level adaptation table describes chip and/or board-level differences, description information corresponding to different chips is defined, and by scheduling the board-level adaptation table, description information (such as an encryption algorithm) for performing BSP initialization and description information (such as an encryption algorithm) for starting an operating system for the underlying chip can be obtained, and then BSP initialization is performed according to the called board-level adaptation table, and the loaded operating system is started.
According to the booting method of the embodiment of the application, the board-level adaptation table for describing chip and/or board-level differences is introduced into the boot program, so that one image file is adapted to all board boots of different types, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced. Moreover, for boards (circuit boards) of different versions or chips of different architectures, a new bootstrap program does not need to be designed, and the bootstrap program can be adapted to the starting of all boards only by modifying related options in a board-level adaptation table.
In some embodiments, invoking the board-level adaptation table comprises:
starting a board-level adaptation table frame;
loading a board-level adaptation table from a storage medium;
and analyzing the board-level adaptation table.
In the above embodiment, BSP initialization may be performed according to the values of the board-level adaptation table parsed from the board-level adaptation table framework.
In this embodiment of the present application, the board-level adaptation table is used to describe chip and/or board-level differences, the board-level adaptation table may include index information and description information, the index information is used to locate a position of the description information, and the index information may include one or a combination of the following according to product requirements:
board level information;
PCIe (Peripheral Component Interconnect express) configuration information;
power consumption management information; and
and (5) memory configuration information.
For example, board level information is used to locate information about the board, such as product information, board information, peripheral information, and the like; as another example, power consumption management information is used to locate information related to power consumption management, such as fan control strategies, power consumption control strategies, temperature control strategies, and the like. The above is only an example of the index information, and the index information may also include other information according to product requirements, or the index information may also include only one or more of the foregoing examples.
Further, the description information includes a plurality of items or entries, each of which may include a name and a corresponding value. For example, assuming that a fan control policy in the power consumption management information is to be invoked, the description information "fan control policy" is found by the index information "power consumption management information", and assuming that the fan control policy includes three entries, which are: fan 1 → 1000 turns; fan 2 → 1500 rev; fan 3 → 2000, then call the corresponding fan control strategy according to the chip type, such as fan 2 → 1500.
FIG. 2 is a schematic diagram of one example of a board level adaptation table, in the example of FIG. 2, the index information includes board level information, PCIe configuration information, power management information, memory configuration information, and other information; in addition, for the board-level information, the board-level information is used for positioning product information description, board description and peripheral description as an example; for the power consumption management information, the power consumption management information positioning fan control strategy, the power consumption control strategy, and the temperature control strategy are taken as examples, and other description information, which is not exemplified in fig. 2, may be set according to the product requirements. In addition, in the example of fig. 2, the board description and the temperature control policy each have n entries, and each entry is composed of key + value, but the present application is not limited thereto, and the entries in the description information may be in other configurations.
The above is only an example, and the other description information is called in a similar manner to the above, and the description is omitted here.
According to the method of the embodiment, because the board-level adaptation table describes the chip and/or board-level differences, after the initialization of the bottom chip is completed, the corresponding information in the board-level adaptation table can be called, so that the subsequent BSP initialization is completed, and the loaded operating system is started based on the called information.
Therefore, because relevant codes are not added aiming at different chip architectures, the BSP initialization is realized by calling the board-level adaptation table, and the size of the image file is greatly reduced. And moreover, a board-level adaptation table is introduced, a large number of macro definitions are not needed, and complexity is reduced. In addition, when the version of the board is updated, the bootstrap program does not need to be involved again, and only the corresponding entry of the board-level adaptation table needs to be modified, so that the maintenance cost is reduced.
In the embodiment of the application, the operating system can also be verified by using an encryption algorithm. For example, the method may further comprise: and calling an encryption algorithm, verifying the loaded operating system by using the encryption algorithm, and starting the operating system according to the board-level adaptation table after the verification is passed.
For example, loading the image file of the next stage, calling an encryption algorithm and a board-level adaptation table, obtaining related information from the board-level adaptation table, verifying the loaded image file of the next stage by using the called encryption algorithm, entering a skip mode after the verification is successful, and executing the image file of the next stage; and after the verification fails, entering a CLI (command line interface) mode, and performing corresponding processing according to the input of the user.
In the above embodiment, two modes of a software encryption algorithm and a hardware encryption algorithm may be used, but the present application is not limited thereto, and multiple encryption algorithms may also be used, and in addition, the use of the encryption algorithm may also be implemented by calling a board-level adaptation table, that is, options/entries related to the encryption algorithm may be added in the board-level adaptation table, and an appropriate encryption algorithm may be selected by calling the board-level adaptation table.
In the above embodiments, the specific encryption algorithm and the way of performing authentication using the encryption algorithm are not limited, and reference may be made to related technologies.
Fig. 3 is another schematic diagram of a booting method according to an embodiment of the present application. As shown in fig. 3, the booting method includes:
operation 310: initializing a bottom chip:
operation 320: starting a board-level adaptation table frame;
operation 330: loading a board-level adaptation table from a storage medium;
operation 340: analyzing a board-level adaptation table;
operation 350: carrying out BSP initialization according to the board-level adaptation table;
operation 360: and loading the operating system, and verifying the operating system according to the encryption algorithm obtained from the board-level adaptation table.
It should be noted that fig. 3 above only schematically illustrates an embodiment of the present application, but the present application is not limited thereto. For example, the order of execution of various operations may be appropriately adjusted, and other operations may be added or some of the operations may be subtracted. Those skilled in the art can appropriately modify the above description without being limited to the description of fig. 3.
According to the boot method of the embodiment of the application, the board-level adaptation table used for describing chip and/or board-level differences is introduced into the boot program, so that one image file is adapted to all board boots of different types, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced.
Embodiments of the second aspect
The embodiment of the application provides a boot system applied to a microprocessor, which is used for booting the start of an operating system. In the embodiment of the present application, the operation principle of the boot system is the same as that of the boot method in the embodiment of the first aspect, and the description of the same contents is not repeated, and in addition, the boot system may be in the form of a boot program, such as a bootloader, but the present application is not limited thereto.
Fig. 4 is a schematic diagram of a boot system applied to a microprocessor according to an embodiment of the present application. As shown in fig. 4, the guidance system 400 includes:
a chip module 410 that performs initialization of the underlying chip;
the BSP module 420 calls a board-level adaptation table after the initialization of the bottom chip is completed, obtains information for performing BSP initialization and information for starting an operating system, and performs BSP initialization according to the board-level adaptation table, where the board-level adaptation table is used to describe chip and/or board-level differences;
the APP module 430 loads an operating system, and starts the operating system according to the board-level adaptation table.
In the above embodiment, the chip module 410 is used to initialize the bottom chips, including but not limited to ARM, RISC-V, etc.
In the above embodiment, the BSP module 420 is configured to call the board-level adaptation table to obtain the relevant information for performing BSP initialization. For example, the BSP module 420 starts a board-level adaptation table frame, loads the board-level adaptation table from the storage medium, and then parses the board-level adaptation table to obtain related information for performing BSP initialization.
In the above embodiment, the board-level adaptation table may include index information for locating description information and description information including a plurality of items/entries each composed of a name and a corresponding value. The index information includes one or more of board level information, PCIe configuration information, power consumption management information, and memory configuration information, but is not limited thereto.
In the above embodiment, the APP module 430 may further invoke the board-level adaptation table to obtain an encryption algorithm, verify the operating system using the encryption algorithm, and start the operating system after the verification is passed.
According to the boot system of the embodiment of the application, the board-level adaptation table used for describing chip and/or board-level differences is introduced into the boot program, so that one image file is adapted to all board boots of different types, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced.
Examples of the third aspect
Embodiments of the present application provide a microprocessor including a boot system as described in embodiments of the second aspect.
Fig. 5 is a schematic diagram of a microprocessor according to an embodiment of the present application, and as shown in fig. 5, the microprocessor 500 includes: hardware system 510, boot system 520, and operating system 530. Wherein the content of the first and second substances,
hardware system 510 includes a plurality of boards, boot read only memories (bootroms) corresponding to the boards, and storage media; boot system 520 is coupled to hardware system 510 for booting the boot of operating system 530; the operating system 530 is coupled with the boot system 520.
In the embodiment of the present application, the guidance system 520 is the guidance system described in the embodiment of the second aspect, and since the guidance system 520 has already been described in the embodiment of the second aspect, the content thereof is omitted here for brevity.
In this embodiment of the present application, the microprocessor may not integrate a large SRAM, and may be an MCU with a memory within 50k to 1M, or a processing unit of a heterogeneous system.
Fig. 6 is a schematic diagram of a boot flow of the operating system 530 of the microprocessor according to the embodiment of the present application, and as shown in fig. 6, the boot flow includes:
operation 610: after powering on, the bootrom of the hardware system 510 performs basic startup;
operation 620: the bootstrap bootloader of the boot system 520 starts working, and first, the initialization of the bottom chip is performed;
operation 630: starting a board-level adaptation table frame;
operation 640: loading a board-level adaptation table from a storage medium;
operation 650: analyzing the board-level adaptation table to obtain related information;
operation 660: carrying out BSP initialization according to the information obtained from the board-level adaptation table;
operation 670: loading an operating system, and performing signature verification on the operating system by using the corresponding encryption algorithm by using the information of the encryption algorithm obtained from the board-level adaptation table;
operation 680: and starting the operating system after the verification is passed.
In the above embodiments, operations 630-650 may be performed by a separate module of the bootstrap bootloader, or may be performed by a BSP module of the bootstrap bootloader; operation 660 may be performed by the BSP module of the bootstrap bootloader; operation 670 may be accomplished by booting an APP module of a bootloader.
In the above embodiments, the contents of the board level adaptation table have been described in the foregoing embodiments, and the contents thereof are to be understood as what is necessary here.
In the embodiment of the application, the microprocessor is also called as an MCU micro control chip, and is generally used in an internet of things device or a heterogeneous system as a small service or management unit, and has a small size, a simple implementation, a small memory, and a low cost, and can meet service or management requirements.
According to the microprocessor of the embodiment of the application, the board-level adaptation table for describing chip and/or board-level differences is introduced into the bootstrap program, so that one image file is adapted to all different types of boards to be started, and the size of the image file is reduced while various chip bottom layer codes are met. In addition, by introducing the board-level adaptation table, a large number of macro definitions are not needed, and complexity is reduced.
Embodiments of the present application also provide a computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing any of the methods in the embodiments of the first aspect when executing the computer program.
Embodiments of the present application also provide a computer-readable storage medium storing a computer program which, when executed by a processor, implements any of the methods in the embodiments of the first aspect.
Embodiments of the present application also provide a computer program product comprising a computer program that, when executed by a processor, implements any of the methods in the embodiments of the first aspect.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above-mentioned embodiments are provided to further explain the objects, technical solutions and advantages of the present application in detail, and it should be understood that the above-mentioned embodiments are only examples of the present application and are not intended to limit the scope of the present application, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present application should be included in the scope of the present application.
Claims (10)
1. A boot method for a microprocessor, the method comprising:
calling a board-level adaptation table after the initialization of a bottom chip is completed, wherein the board-level adaptation table defines description information of different chips and/or boards, and the description information is used for describing chip and/or board-level differences;
initializing a board-level support packet according to the board-level adaptation table;
loading an operating system, starting the operating system according to the board-level adaptation table,
wherein the board-level adaptation table includes index information and description information, the description information includes a plurality of items, each item includes a name and a corresponding value, the index information includes one or a combination of:
board level information;
PCIe configuration information;
power consumption management information; and
and (5) memory configuration information.
2. The method of claim 1, wherein the method further comprises:
calling an encryption algorithm;
verifying the operating system using the cryptographic algorithm;
and after the verification is passed, starting the operating system according to the board-level adaptation table.
3. The method of claim 1, wherein invoking a board level adaptation table comprises:
starting a board-level adaptation table frame;
loading the board-level adaptation table from a storage medium;
and analyzing the board-level adaptation table.
4. A boot system for a microprocessor, the system comprising:
a chip module which initializes a bottom chip;
the board-level supporting package module calls a board-level adaptation table after the initialization of a bottom chip is completed, and initializes the board-level supporting package according to the board-level adaptation table, wherein the board-level adaptation table defines description information of different chips and/or boards, and the description information is used for describing chip and/or board-level differences; and
an application module loading an operating system, starting the operating system according to the board-level adaptation table,
wherein the board-level adaptation table includes index information and description information, the description information includes a plurality of items, each item includes a name and a corresponding value, the index information includes one or a combination of:
board level information;
PCIe configuration information;
power consumption management information; and
and (5) memory configuration information.
5. The guidance system of claim 4, wherein,
and the application program module also calls an encryption algorithm to verify the operating system, and starts the operating system according to the board-level adaptation table after the verification is passed.
6. The boot system of claim 4, wherein the board-level support package module invokes a board-level adaptation table comprising:
starting a board-level adaptation table frame;
loading the board-level adaptation table from a storage medium;
and analyzing the board-level adaptation table.
7. A microprocessor, the microprocessor comprising:
the hardware system comprises a plurality of boards, a boot read only memory corresponding to each board and a storage medium;
a boot system coupled to the hardware system and the boot system of any of claims 4-6, an
An operating system coupled with the boot system.
8. The microprocessor of claim 7, wherein the microprocessor is a microprocessor with a built-in 50k to 1M or a microprocessor of a heterogeneous system.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the boot method of any one of claims 1 to 3 when executing the computer program.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed by a processor, implements the boot method of any one of claims 1 to 3.
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| CN202210914408.4A CN114968388B (en) | 2022-08-01 | 2022-08-01 | Booting method and system applied to microprocessor |
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| CN202210914408.4A CN114968388B (en) | 2022-08-01 | 2022-08-01 | Booting method and system applied to microprocessor |
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