CN113848846A - Online upgrade method for heterogeneous network servo controller combination software - Google Patents
Online upgrade method for heterogeneous network servo controller combination software Download PDFInfo
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Abstract
The invention provides an online upgrade method for heterogeneous network servo controller combination software, which belongs to the technical field of computers, and aims at the servo controller combination which takes a Cortex-R4 series platform as a control core and takes a 1553B bus and a FlexRay bus as external communication interfaces, and realizes the functions of online upgrade and online debugging of the software and parameters of a specific target node in two ring modes, namely a full ring state and a semi-ring state, and comprises the following steps: the method comprises the following steps of hardware architecture realization, target machine hardware state preparation, heterogeneous network topology construction, software state preparation and formal upgrading flow; the hardware architecture implementation supports two technical states: a controller BC state and a computer BC state. The method has the advantages that complex procedures such as opening a controller cover plate, curing, closing the cover plate and the like are not needed, parameter in-loop debugging and software online upgrading can be realized under the condition of maintaining the original network topological structure, and the method has prominent substantive characteristics and remarkable progress.
Description
Technical Field
The invention belongs to the technical field of computers, and particularly relates to an online upgrading method for heterogeneous network servo controller combination software.
Background
The digital servo system is an important industrial product with high real-time performance, high precision and high reliability, and can realize the precise control of the target object posture, position, speed and other characteristics. An ARM platform represented by Cortex-R4 is one of important platforms adopted in the field of servo control, and digitalization and integration of a control system are realized by the aid of rich peripheral resources and high-speed performance of the ARM platform.
The 1553B bus and the FlexRay bus are high-reliability serial communication buses, the 1553B bus is widely applied to the fields of aviation, aerospace, industry and the like, and the FlexRay bus has high market share in the fields of automobiles, industrial control and the like with high cost performance. In the development and production process of executing a strict quality system, the traditional simulator upgrading method of the servo controller software needs complex processes of controller uncovering, paint dispensing, folding and the like, brings adverse effects on product redundancy prevention and control, project development and delivery progress and the like, and is difficult to meet the requirement of mass production.
For a heterogeneous control network of a 1553B-FlexRay bus which is already networked, the number of nodes is large, the protocol is complex, if parameter debugging or software upgrading needs to be carried out on a specific single node or a plurality of nodes, a complex process of off-line one by one, upgrading by adopting special equipment and recovering a network topology structure again is usually adopted, and risks are caused to the safety and the reliability of the network.
The existing heterogeneous network based on a 1553B-FlexRay bus cannot realize on-loop debugging of parameters and online software upgrading under the condition of maintaining the original network topological structure, so that the debugging and production processes of a servo controller are complicated, the software curing efficiency and quality control are influenced, the large-scale production of a new-generation controller product is not facilitated, and improvement is needed.
Disclosure of Invention
The invention provides a heterogeneous network servo controller combination software online upgrading method, and aims to solve the problem that the existing heterogeneous network cannot realize parameter in-loop debugging and software online upgrading under the condition of maintaining the original network topology structure.
The purpose of the invention is realized by the following technical scheme:
a heterogeneous network servo controller combination software online upgrade method is oriented to a servo controller combination which takes a Cortex-R4 series platform as a control core and simultaneously takes a 1553B bus and a FlexRay bus as external communication interfaces, and realizes the software online upgrade and parameter online debugging functions of a specific target node in two ring forms of a full ring state and a semi-ring state, and comprises the following steps: the method comprises the following steps of hardware architecture realization, target machine hardware state preparation, heterogeneous network topology construction, software state preparation and formal upgrading flow; hardware architecture implementations support two technical states: a controller BC state and a computer BC state.
Further, the controller BC state refers to a 1553B-FlexRay bus heterogeneous network controller combination in a full ring state, and in the controller BC state, a system hardware architecture comprises a BC main controller, an RT main controller, a slave controller, a power supply regulation box, a bus coupler and a cable network; the BC has a 1553B communication module or a bus protocol IP core based on FPGA, the state is a 1553B-FlexRay bus heterogeneous network of an all-in-one ring, and the topological structure of the networking state is the topological structure of the controller combination during normal work; the 1553B bus BC is realized by a BC main controller, and the BC main controller communicates with an RT main controller through a 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus.
Further, the computer BC state refers to a 1553B-FlexRay bus heterogeneous network controller combination in a semi-ring state, the topological structure is the minimum system topological structure of the controller combination before entering the whole system, and in the computer BC state, a system hardware architecture comprises an upper computer, a 1553B bus interface card, an RT main controller, a slave controller, a power supply regulating box, a bus coupler and a cable network; the system comprises an upper computer, a 1553B bus BC, a 1553B bus interface card, an RT main controller and a USB interface, wherein the upper computer is special tooling equipment, the 1553B bus BC is realized by the 1553B bus interface card of the computer externally connected with the USB interface, and the BC is communicated with the RT main controller through the 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus.
Furthermore, in the step of preparing the hardware state of the target machine, each target machine in the network is a platform servo controller based on a Cortex-R4 kernel, a Cortex-R4 platform online upgrading component based on a 1553B-FlexRay bus heterogeneous network is built in each target machine, and various servo controller products taking TMS570LS1227, TMS570LS3137 and other function compatible chips as control cores are supported; a 1553B bus interface of the controller is a 1553B bus chip with the communication rate of 1Mbps/4Mbps or a bus protocol IP core based on FPGA; and the ARM controller core realizes addressing and data reading and writing of the 1553B bus interface through the EMIF interface.
Further, the target machine adopts a TMS570 series or a function compatible chip based on a Cortex-R4 kernel as a control core, a FlexRay controller integrated with the control core realizes a communication protocol stack, and an onboard bus transceiver TJA1082 realizes signal difference and level conversion to finally form two paths of differential signals of BP and BM.
Further, in the step of building the heterogeneous network topology structure, the controller BC or the computer BC is connected with the RT main controller through a 1553B bus cable and 1 bus coupler, wherein the bus coupler is a multi-port box type coupler or a multi-sub-wire type coupler with the port number not less than 2, and a terminal resistor is installed at a main bus joint; in the master-slave control network part, the FlexRay bus uses a bus-type network topology.
Further, in the controller BC state, the BC master controller realizes connection with the plurality of RT master controllers through 1553B bus cables and couplers, wherein the 1553B bus couplers are multi-sub-wire couplers with a port number not less than 2, and a main bus connector is provided with a terminal resistor.
Furthermore, in the BC state of the computer, the upper computer is connected with a plurality of RT main controllers through bus cables and couplers, wherein the 1553B bus coupler is a multi-port box-type coupler or a multi-sub-wire type coupler with the port number not less than 2, and a terminal resistor is installed at a main bus joint.
Furthermore, in the software state preparation step, before the formal upgrading process is carried out, the configuration and initialization work of the important function module is completed; for the FlexRay module, an RT main controller is used as a main cold start node, and communication speed, a working channel, bus cycle length, static time slot number and total byte number of a load section are set for each node.
Further, the formal upgrade process includes the following steps:
and S1, after the online upgrade is started, generating a target file, generating a data message chain by BC according to an upgrade protocol, and sequentially sending messages in the message chain.
S2, the RT master controller judges the ID of the target machine, if the ID of the target machine is the RT master controller, the step S3 is executed; if not, go to step S4.
S3, RT master controller upgrade preparation and response, BC judges the correctness of the response result, if yes, all messages of the message chain are sent, and step S5 is executed; if not, the operation is quitted, and the upgrading is failed.
S4, comprising steps S4.1-S4.2:
s4.1, the RT master controller sends an instruction to the target slave controller, the target slave controller is upgraded, prepared and responded, the RT master controller responds to the BC, the BC judges the correctness of a response result, and if yes, the step S4.2 is executed; if not, the operation is quitted, and the upgrading is failed.
And S4.2, all messages of the message chain are sent, the RT master controller transfers the data, and the step S5 is executed.
S5, checking the target machine software, and if the checking is successful, executing the step S6; if not, the operation is quitted, and the upgrading is failed.
S6, the target machine software is solidified, the state of the target machine is responded, the target machine software is reset, and the upgrading is successful.
The beneficial technical effects obtained by the invention are as follows:
compared with the prior art, the on-line software upgrading process based on the 1553B-FlexRay bus heterogeneous network servo controller combination is simplified, complex procedures such as opening a controller cover plate, curing and folding the cover plate are not needed, the on-line software upgrading is realized under the condition of maintaining the original network topology structure, and the quality control capability of the product is indirectly improved. The problem that the existing heterogeneous network can not realize parameter in-loop debugging and software online upgrading under the condition of maintaining the original network topological structure is solved, and the method has prominent substantive characteristics and remarkable progress.
Drawings
FIG. 1 is a system architecture diagram of the controller BC state in accordance with one embodiment of the present invention;
FIG. 2 is a block diagram of a system architecture for a computer BC state according to an embodiment of the present invention;
FIG. 3 illustrates a method for variable rate configuration according to one embodiment of the present invention;
FIG. 4 is a formal flow of a software online upgrade method according to an embodiment of the present invention;
fig. 5 illustrates a method for integrating the lower computer components according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention will be further described in detail with reference to the accompanying drawings and the detailed description. It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the invention without making creative efforts, shall fall within the scope of the claimed invention.
A heterogeneous network servo controller combination software online upgrading method is oriented to a servo controller combination which takes a Cortex-R4 series platform (such as TMS570LS1227, TMS570LS3137 and the like) as a control core and takes a 1553B bus and a FlexRay bus as external communication interfaces, and functions of software online upgrading, parameter online debugging and the like of a specific target node are achieved in two ring modes.
A specific embodiment of a heterogeneous network servo controller combination software online upgrading method comprises the following steps: the method comprises the following steps of hardware architecture realization, target machine hardware state preparation, heterogeneous network topology construction, software state preparation and formal upgrading process. The hardware architecture implementation supports two technical states: a controller BC state and a computer BC state.
The controller BC state refers to a 1553B-FlexRay bus heterogeneous network controller combination in a ring state, and the basic architecture is shown in fig. 1. In the BC state of the controller in this embodiment, the system hardware architecture is composed of a BC master controller, an RT master controller, a slave controller, a power conditioning box, a bus coupler, a cable network, and the like. The BC is provided with a 1553B communication module, such as various special 1553B BUs chips (including HT-64843, HT-61843, BU-61580 and the like) or a BUs protocol IP core based on FPGA. The state is a 1553B-FlexRay bus heterogeneous network of an all-in-one ring, and the topological structure of the networking state is the topological structure of the controller combination during normal work.
The 1553B bus BC is realized by a BC main controller, and the BC main controller communicates with an RT main controller through a 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus. In the traditional online upgrading method, after networking is finished, when any node in the network is upgraded, a target node needs to be physically offline, and networking is recovered after upgrading is finished by using special equipment. In the embodiment, the upgrading process is directly initiated by the BC main controller, secondary off-line and recovery operation is not needed, cable plugging and unplugging actions are avoided, and the reliability and the working efficiency of the whole system can be obviously improved.
The BC state of the computer is a 1553B-FlexRay bus heterogeneous network controller combination in a semi-ring state, the topology structure is the minimum system topology structure of the controller combination before entering the whole system, and the basic architecture is shown in fig. 2. In the BC state of the computer in the present embodiment, the system hardware architecture is composed of an upper computer, a 1553B bus interface card, an RT master controller, a slave controller, a power conditioning box, a bus coupler, a cable network, and the like. The upper computer is a special tooling device, in this specific embodiment, a portable microcomputer (such as ARK-1550, T80M-7506, etc.), and is preloaded with Windows XP/7 and above version operating systems.
The 1553B bus BC is realized by a 1553B bus interface card externally connected with a USB interface by a computer, and the BC is communicated with an RT main controller through the 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus. In a traditional hardware architecture of online upgrade equipment, a 1553B bus board card usually adopts a PCI-based or PCIe bus interface board card, has certain requirements on peripheral resources of a computer, and is not easy to carry. The 1553B bus interface card adopts a portable bus interface card with a USB interface, KMHT1553-USB-1F-1/4M is adopted in the specific embodiment, the card is a single-channel multifunctional variable-rate bus interface card, an FPGA chip is adopted in a protocol stack core, a bottom layer driving program is configured through application software, one-key switching of 1Mbps/4Mbps communication rate can be realized, and the USB interface card has remarkable cost advantage and good universality. In the embodiment, the portable microcomputer is simultaneously selected and matched, the overall dimension can be smaller than 223mm multiplied by 170mm multiplied by 46.6mm, and the convenience and flexibility of system deployment can be obviously improved.
Fig. 3 shows a variable rate configuration method, where the state is a semi-ring 1553B-FlexRay bus heterogeneous network, and the topology structure of the networking state is the minimum system topology structure of the controller combination before entering the whole system.
In a hardware architecture of a traditional online upgrading method, a 1553B bus board card usually only supports a single communication rate, and is high in cost and poor in universality; in the BC state of the computer, the 1553B bus interface card (e.g., KMHT1553-USB-1F-1/4M) used in this embodiment is a multifunctional variable rate bus interface card, the protocol stack core uses an FPGA chip, and the one-key switching of 1Mbps/4Mbps communication rate can be realized by configuring a bottom driver through application software, which has significant cost advantages and good versatility.
In the step of preparing the hardware state of the target machine, each target machine (comprising an RT master controller and a slave controller, the same below) in the network is a platform servo controller based on a Cortex-R4 kernel, a 1553B-FlexRay bus heterogeneous network-based Cortex-R4 platform online upgrading assembly is built in the target machine, and various servo controller products taking TMS570LS1227, TMS570LS3137 and other function compatible chips as control cores are supported. The 1553B BUs interface of the controller is a 1553B BUs chip (comprising HT-64843, HT-61843, BU-61580 and the like) with the communication rate of 1Mbps/4Mbps or a BUs protocol IP core based on FPGA. And the ARM controller core realizes addressing and data reading and writing of the 1553B bus interface through the EMIF interface. In the specific embodiment, the target machine adopts a TMS570LS1227 platform servo controller based on a Cortex-R4 kernel, a chip of the TMS570LS1227 integrates a FlexRay controller, and an onboard bus transceiver TJA1082 is used for realizing signal difference and level conversion to finally form two paths of differential signals of BP and BM.
In the step of building the heterogeneous network topology structure, according to the system architecture diagrams shown in fig. 1 and fig. 2, a controller BC or a computer BC is connected with an RT main controller through a 1553B bus cable and 1 bus coupler. The bus coupler is a multi-port (the number of ports is more than or equal to 2) box type coupler or a multi-sub-wire type coupler, and a main bus joint is provided with a terminal resistor. In the master-slave control network part, the FlexRay bus uses a bus type network topology, and the communication distance between nodes is about 1 m.
In the controller BC state, the BC master controller is connected to the plurality of RT master controllers via 1553B bus cables and couplers. The 1553B bus coupler is a multi-sub-line (the number of ports is more than or equal to 2) line coupler, and a main bus joint is provided with a terminal resistor.
In a BC state of the computer, the upper computer is connected with a plurality of RT main controllers through bus cables and couplers, wherein the 1553B bus coupler is a multi-port (the number of ports is more than or equal to 2) box-type coupler (including but not limited to ESI-210 and ESI-410 of EXCALIBUR) or a multi-sub-wire type coupler, and a terminal resistor is installed at a main bus joint.
In the software state preparation step, before the formal upgrading process is carried out, the configuration and initialization work of the important function module is finished. For a FlexRay module, an RT main controller is used as a main cold start node, and communication speed, a working channel, bus cycle length, static time slot number, total byte number of a load section and the like are set for each node; to simplify the design in this embodiment, only the static segment is used. Each target machine is internally provided with a 1553B-FlexRay bus heterogeneous network Cortex-R4 platform online upgrading component which is a self-designed general software component based on an F021 Flash API library file (such as F021_ API _ Cortex R4_ BE.lib) of a TI company, and the online upgrading function of the target machine software can be realized by carrying out design constraint on a cmd file and the like of the target machine software, carrying out address mapping on a 1553B bus chip (IP core), and configuring a FlexRay communication module.
The application layer communication protocol implemented in the component comprises two parts: the method is applied to a 1553B bus communication protocol of a BC-RT master controller link and a FlexRay bus communication protocol of an RT master controller-slave controller link. The above protocol comprises the following points:
(a) the instruction message is provided with an action identifier and indicates the action to be performed by the current flow, including starting the flow, upgrading preparation, data transmission, data verification, exiting the flow and various response works;
(b) when an upgrading process is started, the BC specifies the ID of a target machine, the length of target data to be transmitted and a check code to the RT main controller;
(c) the identification code and the sequence code of the instruction message are specified, two continuous messages with the same instruction identification should have different sequence codes, and when the sequence codes are the same, a receiver should ignore the two messages, so that error retransmission is prevented;
(d) in order to further improve reliability, a check word is added to each message, and the implementation modes include but are not limited to exclusive or and check, CRC check and the like;
(e) in a FlexRay bus network, an RT master controller node is used as a main cold start node, and each node should specify the frame ID of each instruction message received and transmitted by the node to determine the time slot to be used.
Fig. 4 shows a formal upgrade flow of the software online upgrade method in this embodiment, in step (i) of fig. 4, a mkhex4bin tool is used, and a relevant command statement is added to a Post-Build Steps option in the CCS compilation environment, so as to directly generate a bin file. In the BC state of the controller and the BC state of the computer, the BC directly transmits data streams by using the bin file without analyzing and processing the binary codes again; after the target machine enters a data writing process, an initial address of a target sector is located, and then data erasing and writing of the target Flash sector are carried out.
In the step two of fig. 4, the ID of the target machine is identified by the application layer protocol, so that the directional upgrade of any slave controller in the RT master controller and the network can be realized. The RT master controller node identifies the ID of the target machine through an application layer protocol, and if the target machine is a local node, the RT master controller node directly processes the ID; if the target machine is a slave node, the RT master controller sends a message with a corresponding frame ID to a slave subnet, so that the directional upgrade of any node in the heterogeneous network is realized.
In step three in fig. 4, the RT master controller is used as a communication exchange node to analyze and verify a 1553B message sent by the BC and a FlexRay message sent by the slave controller, and re-encapsulates the messages according to a master-slave communication protocol and sends the re-encapsulated messages to a target object.
In the step (iv) of fig. 4, the update verification is performed by calculating the CRC32 check value for the valid data of the target sector and comparing the valid data length, so that reliable execution of online update operation can be ensured, the error detection capability is significantly improved compared with the CRC16 verification method, and the execution efficiency is improved compared with the word-by-word comparison method.
In the fifth step of fig. 4, software is adopted to trigger watchdog counting overflow, reset operation of the program is realized, direct loading of the upgraded software is directly realized, power-down and power-up operations in the traditional method are omitted, the online upgrading operation process of the software is greatly simplified, and potential risks caused by electrical operation are avoided for the heterogeneous network system.
Fig. 5 shows the lower computer component integration method according to the present embodiment, in step (r) of fig. 5, Lib library files are added to the lower computer software project to be integrated, including an official Flash API library file (such as F021_ API _ cortex r4_ be. Lib) provided by the TI company and an online upgrade component library file developed autonomously.
In step two of fig. 5, the CMD file should have at least three memory areas: a program storage area, a program backup area and a program operation area; meanwhile, a Flash API library, a component library and other necessary codes are set to an RAM for running, and the BINIT mode is used for realizing the automatic loading of the related codes.
The configuration process is illustrated below:
in step three of fig. 5, the software online upgrade function needs to be initialized in the initialization process of each target machine software, the starting address of the 1553B communication chip to the ARM core is determined, the Flash operation clock frequency is set, and a function entry is added.
Compared with the prior art, the technical scheme provided by the specific embodiment simplifies the software online upgrading process based on the 1553B-FlexRay bus heterogeneous network servo controller combination, does not need complex procedures such as opening a controller cover plate, curing and folding the cover plate, realizes the software online upgrading under the condition of maintaining the original network topological structure, and indirectly improves the quality control capability of the product. The problem that the existing heterogeneous network can not realize parameter in-loop debugging and software online upgrading under the condition of maintaining the original network topological structure is solved, and the method has prominent substantive characteristics and remarkable progress.
The time of one-time curing of the traditional software curing method is about 3 hours, and the time of one-time curing of the single target machine by the online upgrading method provided by the embodiment does not exceed 20 seconds, so that the software upgrading efficiency is greatly improved, and the scientific research production and the product delivery capability are favorably improved.
The technical scheme provided by the embodiment can be widely applied to the development processes of online upgrade, online debugging, parameter adjustment and the like of the Cortex-R4 platform servo control software with various communication rates, and provides a key platform for various field tests and software upgrade work. Due to the wide application of the ARM series platform in various fields such as servo control, industrial automation control, embedded consumer products and the like, a plurality of key technologies have application prospects in various fields such as industrial control, aviation, aerospace and the like, and the ARM series platform has obvious technical innovativeness and social and economic values.
Claims (10)
1. A heterogeneous network servo controller combination software online upgrade method, which is oriented to a servo controller combination taking a Cortex-R4 series platform as a control core and simultaneously taking a 1553B bus and a FlexRay bus as external communication interfaces, is characterized in that the software online upgrade and parameter online debugging functions of a specific target node are realized in two ring forms, namely a full ring state and a semi-ring state, and comprises the following steps: the method comprises the following steps of hardware architecture realization, target machine hardware state preparation, heterogeneous network topology construction, software state preparation and formal upgrading flow; the hardware architecture implementation supports two technical states: a controller BC state and a computer BC state.
2. The method for on-line upgrading of heterogeneous network servo controller combination software according to claim 1, wherein the method comprises the following steps: the controller BC state refers to a 1553B-FlexRay bus heterogeneous network controller combination in a full ring state, and in the controller BC state, a system hardware architecture comprises a BC main controller, an RT main controller, a slave controller, a power supply regulating box, a bus coupler and a cable network;
the BC has a 1553B communication module or a bus protocol IP core based on FPGA, the state is a 1553B-FlexRay bus heterogeneous network of an all-in-one ring, and the topological structure of the networking state is the topological structure of the controller combination during normal work;
the 1553B bus BC is realized by a BC main controller, and the BC main controller communicates with an RT main controller through a 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus.
3. The method for on-line upgrading of heterogeneous network servo controller combination software according to claim 2, wherein the method comprises the following steps: the computer BC state is a 1553B-FlexRay bus heterogeneous network controller combination in a semi-ring state, the topological structure is the minimum system topological structure of the controller combination before entering the whole system, and in the computer BC state, a system hardware architecture comprises an upper computer, a 1553B bus interface card, an RT main controller, a slave controller, a power supply regulating box, a bus coupler and a cable network;
the system comprises an upper computer, a 1553B bus BC, a 1553B bus interface card, an RT main controller and a USB interface, wherein the upper computer is special tooling equipment, the 1553B bus BC is realized by the 1553B bus interface card of the computer externally connected with the USB interface, and the BC is communicated with the RT main controller through the 1553B bus; meanwhile, the RT main controller is used as a switching node to realize data exchange with each slave controller through a FlexRay bus.
4. The method for the online upgrade of the combined software of the servo controllers in the heterogeneous networks according to claim 3, wherein: in the step of preparing the hardware state of the target machine, each target machine in the network is a platform servo controller based on a Cortex-R4 kernel, a Cortex-R4 platform online upgrading assembly based on a 1553B-FlexRay bus heterogeneous network is built in each target machine, and various servo controller products with TMS570LS1227, TMS570LS3137 and other function compatible chips as control cores are supported;
a 1553B bus interface of the controller is a 1553B bus chip with the communication rate of 1Mbps/4Mbps or a bus protocol IP core based on FPGA;
and the ARM controller core realizes addressing and data reading and writing of the 1553B bus interface through the EMIF interface.
5. The method as claimed in claim 4, wherein the method comprises the following steps: the target machine adopts TMS570 series or function compatible chips based on a Cortex-R4 kernel as a control core, a FlexRay controller integrated by the control core realizes a communication protocol stack, and an onboard bus transceiver TJA1082 realizes signal difference and level conversion to finally form two paths of differential signals of BP and BM.
6. The method as claimed in claim 4, wherein the method comprises the following steps: in the heterogeneous network topology structure building step, a controller BC or a computer BC is connected with an RT main controller through a 1553B bus cable and 1 bus coupler, wherein the bus coupler is a multi-port box type coupler or a multi-sub-wire type coupler with the port number not less than 2, and a main bus joint is provided with a terminal resistor; in the master-slave control network part, the FlexRay bus uses a bus-type network topology.
7. The method as claimed in claim 6, wherein the method comprises: in the controller BC state, the BC main controller is connected with a plurality of RT main controllers through 1553B bus cables and couplers, wherein the 1553B bus couplers are multi-sub-wire type couplers with ports more than or equal to 2, and terminal resistors are installed at main bus joints.
8. The method as claimed in claim 6, wherein the method comprises: in the BC state of the computer, the upper computer is connected with a plurality of RT main controllers through bus cables and couplers, wherein the 1553B bus coupler is a multi-port box type coupler or a multi-sub-wire type coupler with the port number not less than 2, and a main bus joint is provided with a terminal resistor.
9. The method as claimed in claim 6, wherein the method comprises: in the software state preparation step, before the formal upgrading process is carried out, the configuration and initialization work of the important function module is completed; for the FlexRay module, an RT main controller is used as a main cold start node, and communication speed, a working channel, bus cycle length, static time slot number and total byte number of a load section are set for each node.
10. The method of claim 9, wherein the method comprises: the formal upgrading process comprises the following steps:
s1, after the online upgrade starts, generating a target file, BC generating a data message chain according to the upgrade protocol, and sequentially sending the messages in the message chain;
s2, the RT master controller judges the ID of the target machine, if the ID of the target machine is the RT master controller, the step S3 is executed; if not, go to step S4;
s3, RT master controller upgrade preparation and response, BC judges the correctness of the response result, if yes, all messages of the message chain are sent, and step S5 is executed; if not, the operation is quitted, and the upgrading is failed;
s4, including steps S4.1-S4.2
S4.1, the RT master controller sends an instruction to the target slave controller, the target slave controller is upgraded, prepared and responded, the RT master controller responds to the BC, the BC judges the correctness of a response result, and if yes, the step S4.2 is executed; if not, the operation is quitted, and the upgrading is failed;
s4.2, all messages of the message chain are sent, the RT master controller transfers data, and the step S5 is executed;
s5, checking the target machine software, and if the checking is successful, executing the step S6; if not, the operation is quitted, and the upgrading is failed;
s6, the target machine software is solidified, the state of the target machine is responded, the target machine software is reset, and the upgrading is successful.
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