CN113838839A - Sensing assembly packaging structure and packaging method thereof - Google Patents

Sensing assembly packaging structure and packaging method thereof Download PDF

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Publication number
CN113838839A
CN113838839A CN202010581038.8A CN202010581038A CN113838839A CN 113838839 A CN113838839 A CN 113838839A CN 202010581038 A CN202010581038 A CN 202010581038A CN 113838839 A CN113838839 A CN 113838839A
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China
Prior art keywords
lead frame
sensor
chip
area
wire bonding
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CN202010581038.8A
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Chinese (zh)
Inventor
宋广力
苏瑞·巴舒·尼加古纳
庞茜
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Guangbao Technologies Singapore Private Ltd
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Guangbao Technologies Singapore Private Ltd
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Priority to CN202010581038.8A priority Critical patent/CN113838839A/en
Publication of CN113838839A publication Critical patent/CN113838839A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R25/00—Deaf-aid sets, i.e. electro-acoustic or electro-mechanical hearing aids; Electric tinnitus maskers providing an auditory perception
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Neurosurgery (AREA)
  • Otolaryngology (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)

Abstract

The invention provides a sensing assembly packaging structure which comprises a lead frame, a chip, an insulating shell, a sensor and a protective layer. The lead frame is provided with a first surface and a second surface opposite to the first surface, a first solid crystal area and a plurality of wire bonding areas of the lead frame are arranged on the first surface, and a second solid crystal area is arranged on the second surface. The chip is arranged in the first die bonding area of the lead frame and is electrically connected with the wire bonding areas of the lead frame. The insulating shell covers the chip and part of the lead frame, the sensor is arranged on the second die bonding area of the lead frame, and the protective layer is arranged above the sensor.

Description

Sensing assembly packaging structure and packaging method thereof
Technical Field
The present invention relates to a sensing device package and a method for packaging the same, and more particularly, to a sensing device package and a method for packaging the same.
Background
In an era of increasing technological progress, smart hearing aid devices have become more and more popular, and the functionality of the smart hearing aid devices has been increasing rather than being usable only as a hearing aid, and the functions thereof have been increasing and the usable time thereof has been increasing. For example, in an intelligent hearing aid, a sensing device (e.g., an infrared temperature sensing device, etc.) may be further installed to sense the body temperature of the user, so as to detect the health condition of the user, or control the on/off of the hearing aid, even control noise or have a sleep monitoring effect.
However, as hearing aid devices or smart devices become smaller and require many components to be mounted in the hearing aid devices or miniaturized devices, the size of the sensing component is too large, and therefore, how to reduce the size of the sensing component by improving the design of the package structure and further reduce the manufacturing cost has become one of the important issues to be solved by the industry.
Disclosure of Invention
The technical problem to be solved by the invention is that the sensing component applied to the hearing aid device has overlarge volume, and the purpose of reducing the volume of the sensing component is achieved by improving the packaging structure.
In order to solve the above technical problems, one technical solution of the present invention is to provide a sensing device package structure, which includes a lead frame, a chip, an insulating housing, a sensor, and a protective layer. The lead frame is provided with a first surface and a second surface opposite to the first surface, a first solid crystal area and a plurality of wire bonding areas of the lead frame are arranged on the first surface, and a second solid crystal area is arranged on the second surface. The chip is arranged in the first die bonding area of the lead frame and is electrically connected with the wire bonding areas of the lead frame. The insulating shell covers the chip and part of the lead frame, the sensor is arranged on the second die bonding area of the lead frame, and the protective layer is arranged above the sensor.
In order to solve the above technical problem, another technical solution adopted by the present invention is to provide a packaging method of a sensing assembly, including: providing a lead frame; arranging a chip in a first die bonding area of the lead frame; electrically connecting the chip with a plurality of wire bonding areas of the lead frame; filling a sealing material on the lead frame to form an insulating shell for coating the chip and part of the lead frame; arranging a sensor in a second solid crystal area of the lead frame, wherein the first solid crystal area and the second solid crystal area are respectively positioned on different planes of the lead frame; and disposing a protective layer over the sensor.
The sensing component package structure provided by the invention has the beneficial effect that the chip and the sensor are respectively arranged on the opposite first surface and the second surface, so that the purpose of reducing the volume of the sensing component package structure is achieved.
For a better understanding of the features and technical content of the present invention, reference should be made to the following detailed description of the invention and accompanying drawings, which are provided for purposes of illustration and description only and are not intended to limit the invention.
Drawings
Fig. 1 is a bottom view of a sensing device package structure according to an embodiment of the invention.
FIG. 2 is a top perspective view of a sensing device package according to an embodiment of the invention.
FIG. 3A is a cross-sectional view of a sensing device package according to an embodiment of the invention.
FIG. 3B is a cross-sectional view of a sensing device package according to another embodiment of the invention.
FIG. 4 is an exploded view of a sensing device package structure according to an embodiment of the invention.
Fig. 5 is a diagram illustrating a lead frame according to the present invention.
FIG. 6 is a flowchart of a method for manufacturing a sensing device package structure according to an embodiment of the invention.
Detailed Description
The following description is provided for the embodiments of the sensing device package and the packaging method thereof, and those skilled in the art will understand the advantages and effects of the present invention from the disclosure of the present specification. The invention is capable of other and different embodiments and its several details are capable of modification and various other changes, which can be made in various details within the specification and without departing from the spirit and scope of the invention. The drawings of the present invention are for illustrative purposes only and are not intended to be drawn to scale. The following embodiments will further explain the related art of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or from one signal to another signal. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.
For clarity of explanation, in some cases the present techniques may be presented as including individual functional blocks comprising functional blocks, including steps or routes in a method implemented in a device, device component, software, or a combination of hardware and software.
An apparatus implementing methods in accordance with these disclosures may include hardware, firmware, and/or software, and may take any of a variety of forms. Typical examples of such features include laptops, smart phones, small personal computers, personal digital assistants, and the like. The functionality described herein may also be implemented in a peripheral device or in an embedded card. By way of further example, such functionality may also be implemented on different chips or on different boards executing different programs on a single device.
First embodiment of the invention
Fig. 1 is a bottom view of a sensing device package according to an embodiment of the present invention, fig. 2 is a top perspective view of the sensing device package according to the embodiment of the present invention, fig. 3A is a cross-sectional view of the sensing device package according to the first embodiment of the present invention, fig. 3B is a cross-sectional view of the sensing device package according to the second embodiment of the present invention, fig. 4 is an exploded view of the sensing device package according to the embodiment of the present invention, fig. 5 is a schematic view of the lead frame according to the present invention, and referring to fig. 1 to 5, a sensing device package 10 according to the embodiment of the present invention mainly includes a lead frame 11, a chip 12, an insulating case 13, a sensor 14 and a protective layer 15.
As shown in fig. 4 and 5, the lead frame 11 includes a first surface 111 and a second surface 112, the second surface 112 is opposite to the first surface 111, a first die bonding region 113 and a plurality of wire bonding regions 114 of the lead frame 11 are located on the first surface 111 of the lead frame 11, a second die bonding region 115 and a plurality of pad regions 117 are located on the second surface 112 of the lead frame, the first die bonding region 113 corresponds to the second die bonding region 115, and the plurality of wire bonding regions 114 corresponds to the plurality of pad regions 117. A plurality of wire bonding regions 114 are disposed around the first die bonding region 113. In addition, as shown in fig. 5, a plurality of bonding pads 116 extend from the plurality of bonding areas 114 along a first direction (-X axis direction or + X axis direction) or a second direction (-Y axis direction or + Y axis direction), respectively, so that when the lead frame 11 is mounted in an electronic device (not shown), the sensing device package structure 10 can be electrically connected to other electronic devices (not shown) through the bonding pads 116. Also, the number of pins 116 may vary from chip 12 to chip 12.
In addition, the shape of the leads 116 may also be different, in a preferred embodiment of the invention, as shown in fig. 4 or fig. 5, on the first surface 111, the plurality of wire bonding regions 114 are bent along a direction and then extend outward to form the plurality of leads 116, the direction may be a direction toward the bottom surface, further, the plurality of wire bonding regions 114 respectively extend outward and are bent at a predetermined angle in a first direction or a second direction (X axis direction or Y axis direction) to form a plurality of structures corresponding to and surrounding the first die bonding region 113, further, the leads 116 include an external portion 1161 and a bent portion 1163, and one end of the leads 116 forms a plurality of contact surfaces 1165 parallel to the surface of the wire bonding region 114, and a step L exists between the surface of the wire bonding region 114 and the contact surface 1165 of the leads 116, as shown in fig. 3A. In addition, the drawings are only for illustration, and the lead frame 11 of the present invention is not limited thereto and can be only shown by the appearance in the drawings, and the shape of the leads 116 may be different in different embodiments.
The chip 12 of the present invention is preferably an Application Specific Integrated Circuit (ASIC) chip, the chip 12 is disposed in the first die attach region 113 of the first surface 111 of the lead frame 11, and the chip 12 is electrically connected to the wire bonding regions 114 of the first surface 111 of the lead frame 11 by wire bonding via the wires 16. In addition, since the leads 116 form a structure surrounding the first die bonding area 113, the chip 12 and the wires 16 can be protected from being damaged by external force. Further, the height of the step L between the surface of the wire bonding area 114 and the contact surface 1165 of the pin 116 is determined according to the overall package height required by the chip 12, and the overall package height required by the chip 12 is determined according to the sum of the height of the chip 12 and the wire bonding height required by the subsequent wires 16.
It should be noted that, as shown in fig. 3A, the step L of the pin 116 on the first surface 111 of the lead frame 11 is higher than the vertical height of the wire 16, so that the encapsulant can be covered to be flush with the contact surface 1165 of the pin 116 of the lead frame 11 in the subsequent encapsulant process, and a portion of the insulating housing 13 can completely cover the chip 12 and the wire 16, thereby protecting the chip 12 and the wire 16. In addition, in the preferred embodiment of the present invention, a heat dissipation film 17 may be further disposed between the lead frame 11 and the chip 12, so that heat generated by the chip 12 during operation can be more quickly transferred to the lead frame 11 through the heat dissipation film 17, thereby achieving a good heat dissipation effect. However, in different embodiments, different thermal conductive materials may be used, for example, a thermal paste may be coated between the lead frame 11 and the chip 12 to achieve the purpose of dissipating heat from the chip 12, or in another embodiment, no film or thermal dissipation material may be disposed or coated between the lead frame 11 and the chip 12, which is not limited herein.
In an embodiment of the invention, the insulating housing 13 covers the chip 12 and a portion of the lead frame 11, the insulating housing 13 may be divided into a first portion 131 and a second portion 132, the first portion 131 is located on the first surface 111 of the lead frame 11, and the second portion 132 is located on the second surface 112. In detail, the first portion 131 is located between the pins 116 and covers the chip 12 and the wires 16, and a top surface 133 of the first portion 131 is flush with the contact surfaces 1165 of the pins 116, so as to protect the chip 12 and the wires 16. The first portion 131 also fills the gap between the first die attach region 113 and the plurality of wire bonding regions 114, is flush with the second surface 112 of the lead frame 11, provides a flat surface for subsequent die bonding of the sensor 14, and provides electrical separation between the first die attach region 113 and the plurality of wire bonding regions 114. The second portion 132 is disposed around the leads 116 of the lead frame 11 and on the second surface 112, for protecting the leads 116 and connecting with the passivation layer 15. In addition, as shown in fig. 3A and 3B, the insulating housing 13 completely covers the bent portion 1163 of the lead frame 11 through the first portion 131 and the second portion 132, so as to enhance the structural strength. The area of the pin 116 adjacent to the second portion 132 of the insulating housing 13 is preferably a stepped structure S, that is, the exposed thickness of the pin 116 on the side surface of the insulating housing 13 is less than the thickness of the wire bonding region 114, preferably not more than half of the thickness of the wire bonding region 114, and in addition, the side surface of the pin 116 may be exposed from the insulating housing 13 or flush with the surface of the insulating housing 13, but not limited thereto, the pin 116 has a stepped structure S, which not only improves the bonding between the lead frame 11 and the insulating housing 13, but also helps to reduce the cutting stress when the single sensing element package 10 is removed, and avoids the burrs generated during the cutting process.
As shown in fig. 3A, the second portion 132 has a housing wall 134, and the housing wall 134 surrounds the second die attach region 115 of the lead frame 11 to form a receiving cavity 18, so that the subsequently disposed sensor 14 can be placed in the receiving cavity 18 and the sensor 14 is exposed in the receiving cavity 18. In addition, at least one groove 136 may be formed on the surface of the second portion 132 of the insulating housing 13, so that a user can separate the protection layer 15 from the insulating housing 13 through the at least one groove 136, as shown in fig. 2 and 4, two corresponding grooves 136 are formed on the top surfaces of two corresponding sides of the second portion 132 of the insulating housing 13. The material of the insulating housing 13 may be silicon (Silicone) or Epoxy resin (Epoxy), and the color of the material of the insulating housing 13 is preferably black, so as to prevent ambient light from interfering with the sensing of the sensor 14, however, in different embodiments, the insulating housing 13 may be other colors, and any color capable of blocking ambient light and transmitting infrared light only may be the color of the encapsulating material of the present invention, but is not limited thereto.
Still referring to fig. 3A, the sensor 14 is disposed on the second die attach region 115 of the second surface 112, that is, the sensor 14 is disposed in the receiving groove 18 formed by the second portion 132 of the insulating housing 13. The sensor 14 of the present invention is preferably an infrared sensor, the bottom of the sensor 14 is not only directly contacted with the second die attach region 115 of the second surface 112 of the lead frame 11 and electrically connected to the leads 116 of the lead frame 11, but also the sensor 14 is directly contacted with the pad regions 117 surrounding the second die attach region 115, so that the heat generated by the sensor 14 during operation can be rapidly transferred to the second die attach region 115 and the pad regions 117 of the lead frame 11, and the temperature of the sensor 14 can be maintained as same as the temperature of the external environment as possible.
Then, the protection layer 15 is disposed above the sensor 14, as shown in fig. 4, the protection layer 15 is disposed on the sensor 14 without directly contacting the sensor 14, but the protection layer 15 is supported by the second portion 132 of the insulating housing 13 around the pin 116, and a gap C is formed between the protection layer 15 and the sensor 14 to ensure that the protection layer 15 and the sensor 14 do not collide. The protection layer 15 is preferably made of glass that only allows infrared rays to penetrate, however, in different embodiments, the protection layer 15 may be made of other materials, such as plastic, and the like, without limitation. In the present invention, the chip 12 and the sensor 14 are respectively disposed on the different first surface 111 and the second surface 112 of the lead frame 11, which can achieve the purpose of reducing the size of the sensing device package structure 10 compared to the conventional method of disposing the chip 12 and the sensor 14 on the same plane, because a larger area is required to dispose the chip 12 and the sensor 14 on the same plane when the chip 12 and the sensor 14 are disposed on the same plane, thereby increasing the overall size, and therefore, the chip 12 and the sensor 14 are disposed on different planes, thereby achieving the purpose of reducing the required area, and further reducing the overall size.
Second embodiment of the invention
However, as shown in fig. 3B, in the second embodiment, the protection layer 15 may have a U-shaped structure, and the surface of the second portion 132 is flush with the surface of the second die bonding region 115, and the left and right ends of the protection layer 15 protrude and abut on the surface of the first portion 131 of the insulating housing 13. In the second embodiment of fig. 3B, the insulating housing 13 also includes a first portion 131 and a second portion 132, and the positions of the first portion 131 and the second portion 132 are similar to those of the first embodiment, and are not repeated herein. The difference is that the surface of the second portion 132 of the second embodiment is flush with the pad region 117, and further, the bottom surface of the first portion 131, the surface of the second portion 132, the surface of the second die attach region 115 and the surface of the pad region 117 are coplanar, and the protection layer 15 is in a U-shaped structure, so that the receiving groove 18 can be formed between the left end and the right end of the protection layer 15, and the sensor 14 disposed subsequently can be placed in the receiving groove 18. In addition, since other components of the sensing device package structure 10 of the second embodiment are the same as those of the sensing device package structure 10 of the first embodiment, descriptions of the other components of the second embodiment are omitted herein.
FIG. 6 is a flowchart of a method for manufacturing a sensing device package structure according to an embodiment of the invention. Referring to fig. 6, and referring to fig. 1 to 5 and the component numbers thereof, in step S601, a lead frame 11 is provided, where the lead frame 11 may be a metal lead frame, and how to form the lead frame 11 is known to those skilled in the art and will not be described herein again. The lead frame 11 includes a first surface 111 and a second surface 112 opposite to the first surface 111, and the lead frame 11 includes a first die attach region 113, a plurality of wire bonding regions 114, a second die attach region 115, and a plurality of pad regions 117. In step S602, a chip 12 is disposed in the first die attach region 113 of the lead frame 11, and in step S603, the chip 12 is electrically connected to the bonding regions 114 of the lead frame 11 through the wires 16 by wire bonding. Further, the chip 12 may be directly disposed on the first die bonding area 113 of the lead frame 11, or in different embodiments, a heat dissipation film 17 may be disposed on the first die bonding area 113, but the chip 12 is disposed on the heat dissipation film 17, which is not limited herein. The chip 12 has a plurality of contacts 121, and two ends of each wire 16 can be respectively connected to the contacts 121 of the chip 12 and each wire bonding region 114, so as to achieve the purpose of electrically connecting the chip 12 and the lead frame 11.
In addition, the wires 16 may connect the chip 12 to the plurality of bonding areas 114 of the lead frame 11 by forward bonding or backward bonding, but not limited thereto. In order to allow heat generated by the chip 12 during operation to be conducted to the lead frame 11, the chip 12 may directly contact the first die attach region 113, or the chip 12 may contact the first die attach region 113 through the heat dissipation film 17, which is not limited herein, and it is well known to those skilled in the art how to dispose the chip 12 on the first die attach region 113 of the first surface 111 of the lead frame 11, and therefore, the description thereof is omitted.
In step S604, the lead frame 11 is filled with an encapsulant. In detail, the molding compound may be filled on the first surface 111 or the second surface 112 of the lead frame 11 at one time, and then the molding compound may automatically flow onto the second surface 112 or the first surface 111 to form the first portion 131 and the second portion 132 of the insulating housing 13 in the first embodiment and the second embodiment, or may be filled on the lead frame 11 at two times, first filled to form the second portion 132 of the insulating housing 13, and then filled to form the first portion 131 of the insulating housing 13 again. For example, after the wire bonding step of the lead frame 11 for mounting the chip 12 and the wires 16 is completed, the lead frame 11 is placed in a mold with a height difference (not shown), and the mold is filled with a material for forming the insulating housing 13 to the first surface 111 or the second surface 112 of the lead frame 11, wherein the first portion 131 of the insulating housing 13 is located between the plurality of leads 116 and covers the chip 12 and the wires 16, and the second portion 132 of the insulating housing 13 is disposed around the leads 116 and extends in a direction and surrounds the second surface 112 of the lead frame 11, so as to form a receiving groove 18 on the second surface 112 or form a flush surface with the surfaces of the plurality of pad regions 117. In the embodiment of the present invention, the color of the sealant is preferably black, because the black sealant can block most of the ambient light from transmitting to the sensor 14, so as to prevent the sensing accuracy of the sensor 14 from being degraded due to the ambient light. In addition, the insulating case 13 of the present invention allows only infrared light to be transmitted to the sensor 14, and blocks light other than infrared light.
In step S605, the sensor 14 is disposed on the second die attach region 115 of the second surface 112 of the lead frame 11. In detail, the sensor 14 is disposed on the lead frame 11 and located in the receiving groove 18 formed by the insulating housing 13 of the first embodiment or the receiving groove 18 formed by the protection layer 15 of the second embodiment, the sensor 14 contacts the second die attach region 115 of the lead frame 11, so as to transfer heat generated by the sensor 14 during operation to the lead frame 11, thereby achieving the effect of heat dissipation of the sensor 14. In step S606, the protection layer 15 is disposed on the sensor 14, and the protection layer 15 is located on the insulating housing 13, in detail, the protection layer 15 is disposed on the insulating housing 13, and the second portion 132 disposed around the pin 116 supports the protection layer 15, so as to protect the sensor 14 and prevent the sensor 14 from being irradiated by the external ambient light, thereby completing the step of disposing the protection layer 15. The protective layer 15 is preferably made of glass, and can prevent the sensor 14 from directly contacting the external environment, and can block light other than infrared rays from transmitting to the sensor 14. In the present invention, the protection layer 15 is preferably made of a glass material that only allows infrared light to pass through, or a special material can be coated on the protection layer 15 to block ambient light and only allow infrared light to transmit, and how to coat the protection layer 15 to only allow infrared light to transmit to the sensor 14 is well known to those skilled in the art and will not be described herein.
After the protective layer is disposed, the process steps of the sensing device package structure of the present invention are completed, and in addition, the present invention may further include an additional step of cutting the plurality of sensing device packages 10 manufactured in the mold into the sensing device packages 10 one by one, or in different embodiments, the present invention may further include a testing step of testing the sensing effect of each sensing device package 10, so as to complete the complete process steps of the sensing device package structure 10 of the present invention.
The sensing component package structure provided by the invention has the beneficial effect that the chip and the sensor are respectively arranged on the opposite first surface and the second surface, so that the purpose of reducing the volume of the sensing component package structure is achieved.
The disclosure is only a preferred embodiment of the invention and should not be taken as limiting the scope of the invention, which is defined by the appended claims.

Claims (10)

1. A sensing component package structure, comprising:
the lead frame is provided with a first surface and a second surface opposite to the first surface, a first solid crystal area and a plurality of wire bonding areas of the lead frame are arranged on the first surface, and a second solid crystal area is arranged on the second surface;
the chip is arranged in the first die bonding area of the lead frame and is electrically connected with the wire bonding areas of the lead frame;
the insulating shell coats the chip and part of the lead frame;
the sensor is arranged on the second die bonding area of the lead frame; and
and the protective layer is arranged above the sensor.
2. The package structure of claim 1, wherein the plurality of wire bonding areas of the lead frame are bent outward along a direction to form a plurality of leads, and the plurality of leads surround the first die attach area to protect the chip and the wires.
3. The sensing component package structure of claim 2, wherein a step is formed between a surface of the wire bonding area and a contact surface of the pin, and the contact surface of the pin is flush with a top surface of the insulating housing.
4. The package structure of claim 1, wherein the protection layer is a U-shaped glass or a plate glass, and defines an accommodating space together with the insulating housing, and the sensor is located in the accommodating space.
5. The sensing device package as claimed in claim 4, wherein the insulating housing includes a first portion and a second portion, the first portion covers the chip and a portion of the wires on the first surface, and the second portion surrounds the second surface and is connected to the protection layer to define a receiving space for receiving the sensor.
6. The sensing component package of claim 1, wherein the sensing component package further comprises: and the heat dissipation film is arranged between the chip and the first die bonding area of the lead frame.
7. The sensing component package structure of any one of claims 1 to 5, wherein a gap is formed between the sensor and the protection layer, and the insulation housing is a silicone or epoxy resin of black material.
8. A method of packaging a sensing assembly, comprising:
providing a lead frame;
arranging a chip in a first die bonding area of the lead frame;
electrically connecting the chip with a plurality of wire bonding areas of the lead frame;
filling an encapsulating material on the lead frame to form an insulating shell for coating the chip and part of the lead frame;
arranging a sensor in a second solid crystal area of the lead frame, wherein the first solid crystal area and the second solid crystal area are respectively positioned on different planes of the lead frame; and
a protective layer is disposed over the sensor.
9. The method of claim 8, wherein the lead bonding areas of the leadframe further comprise leads exposed from the insulative housing during the step of filling the encapsulant.
10. The method for packaging a sensor assembly as claimed in claim 9, wherein in the step of disposing the protection layer, the protection layer is a U-shaped glass or a plate glass, and defines a receiving space together with the insulation housing, and the sensor is located in the receiving space.
CN202010581038.8A 2020-06-23 2020-06-23 Sensing assembly packaging structure and packaging method thereof Pending CN113838839A (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Publications (1)

Publication Number Publication Date
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1507041A (en) * 2002-12-09 2004-06-23 先进封装解决方案私人有限公司 Non-lead semiconductor packaging structure with inverse bonding chip and producing method
CN1652335A (en) * 2004-02-03 2005-08-10 旺宏电子股份有限公司 Stacking packaging structure for light sensitive chips and semiconductor chips
TW200725861A (en) * 2005-12-29 2007-07-01 Advanced Semiconductor Eng Semiconductor package and process for making the same
CN101073152A (en) * 2004-12-20 2007-11-14 半导体元件工业有限责任公司 Electronic package having down-set leads and method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1507041A (en) * 2002-12-09 2004-06-23 先进封装解决方案私人有限公司 Non-lead semiconductor packaging structure with inverse bonding chip and producing method
CN1652335A (en) * 2004-02-03 2005-08-10 旺宏电子股份有限公司 Stacking packaging structure for light sensitive chips and semiconductor chips
CN101073152A (en) * 2004-12-20 2007-11-14 半导体元件工业有限责任公司 Electronic package having down-set leads and method
TW200725861A (en) * 2005-12-29 2007-07-01 Advanced Semiconductor Eng Semiconductor package and process for making the same

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