CN113824308B - Light-load noise suppression method for voltage conversion circuit and power management device - Google Patents

Light-load noise suppression method for voltage conversion circuit and power management device Download PDF

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Publication number
CN113824308B
CN113824308B CN202111253876.3A CN202111253876A CN113824308B CN 113824308 B CN113824308 B CN 113824308B CN 202111253876 A CN202111253876 A CN 202111253876A CN 113824308 B CN113824308 B CN 113824308B
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voltage
switch
input end
frequency
current source
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CN113824308A (en
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何仪修
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Meixinsheng Technology Beijing Co ltd
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Meixinsheng Technology Beijing Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The application provides a light load noise suppression method of a voltage conversion circuit and a power management device, wherein in a switch-mode power supply circuit, when the voltage conversion circuit is in a light load mode, the power management device of the switch-mode power supply circuit is in an intermittent power supply mode, based on a finite state machine, namely by detecting the frequency of a driving signal used for driving the voltage conversion circuit in real time, the frequency is outside a human ear perceivable frequency range, for example, the frequency of the driving signal is outside a human ear sensitive audio frequency range of 1 kHz-10 kHz, and the frequency of the driving signal can be controlled below 1kHz or above 10kHz by adjusting parameters influencing the frequency of the driving signal.

Description

Light-load noise suppression method for voltage conversion circuit and power management device
Technical Field
The application relates to the field of voltage conversion circuits, in particular to a light-load noise suppression method of a voltage conversion circuit and a power management device.
Background
Household electronic products such as computers, communication products, consumer products, and the like are generally configured with a switching power supply circuit.
In a switching power supply circuit, when the voltage conversion circuit is in a light load Mode, an intermittent power supply Mode (Burst Mode) is generally used to provide lower power required by an electronic device. In the intermittent power supply mode, the power management device controls the pulse width modulation circuit to pause for a preset time, and when the power supplied to the electronic device is lower than a lower limit, the pulse wave is output again, so that the voltage conversion circuit supplies power to the electronic device again.
In other words, the intermittent power supply mode divides the original continuous pulse into continuous pulse groups for outputting, so that the frequency of the pulse groups is lower than the frequency of the original pulse, and the supplied electric energy is reduced to the electronic device. However, in order to reduce the power supply of the electronic device, the switching power supply circuit generates audio noise when the frequency is as low as 1 kHz-10 kHz of the audio frequency sensitive to human ears during the process of reducing the frequency of the pulse group.
Disclosure of Invention
An objective of the embodiments of the present application is to provide a method for suppressing light-load noise of a voltage conversion circuit and a power management device, which are used for solving the problem that a switch-type voltage circuit generates audio noise with a frequency within an audio frequency range sensitive to human ears in an intermittent power supply mode.
The power management device of the switch type power supply circuit provided by the embodiment of the application comprises:
The pulse intermittent module is used for generating an intermittent pulse driving signal when the voltage conversion circuit is in a light load mode and driving the voltage conversion circuit to perform voltage conversion according to the driving signal; and the finite state machine is connected with the pulse intermittent module and is used for detecting the frequency of the driving signal in real time, and the frequency of the driving signal is out of the human-perceivable frequency range by adjusting parameters influencing the frequency of the driving signal.
In the above technical solution, in the switch-mode power supply circuit, when the voltage conversion circuit is in the light load mode, during the process that the power management device of the switch-mode power supply circuit is in the intermittent power supply mode, based on the finite state machine, that is, by detecting the frequency of the driving signal for driving the voltage conversion circuit in real time, the frequency can be controlled to be below 1kHz or above 10kHz by adjusting the parameters affecting the frequency of the driving signal so that the frequency is outside the human ear perceivable frequency range, for example, the driving signal frequency is outside the human ear sensitive audio frequency 1 kHz-10 kHz.
In some alternative embodiments, the finite state machine includes a detection circuit and a parameter adjustment module;
The detection circuit comprises a charging capacitance-current source, an energy discharging switch, an energy storage capacitor, a low-voltage comparator and a high-voltage comparator;
the output end of the charge capacitor current source is connected with one end of the energy storage capacitor, and the other end of the energy storage capacitor is grounded;
The output end of the charge-capacitance current source is also connected with one end of an energy discharging switch, the other end of the energy discharging switch is grounded, and the energy discharging switch is controlled by control pulse; wherein the control pulse is used for generating a driving signal together with the PWM pulse;
The output end of the charge-capacitance current source is also connected with the positive input end of the low-voltage comparator, the negative input end of the low-voltage comparator is used for inputting low-level voltage, and the output end of the low-voltage comparator is used for outputting a low-voltage comparison result;
The output end of the charge-capacitance current source is also connected with the positive input end of the high-voltage comparator, the negative input end of the high-voltage comparator is used for inputting high-order voltage, and the output end of the high-voltage comparator is used for outputting a high-voltage comparison result; wherein the high voltage is greater than the low voltage;
and the parameter adjusting module is connected with the low-voltage comparator and the high-voltage comparator and is used for adjusting down or up parameters influencing the frequency of the driving signal according to the low-voltage comparison result and the high-voltage comparison result.
In some alternative embodiments, the parameter adjustment module includes a voltage converter, a boost current source, a buck current source, a capacitor, a boost switch, a buck switch, and an adder;
The first input end of the voltage converter is used for inputting a low-voltage comparison result, and the first output end of the voltage converter controls the boost switch; one end of the boost switch is connected with the output end of the boost current source, and the other end of the boost switch is connected with the first input end of the adder;
The first input end of the adder is also connected with one end of a buck switch, the other end of the buck switch is connected with the input end of a buck current source, and the output end of the buck current source is grounded; the second input end of the voltage converter is used for inputting a high voltage comparison result, and the second output end of the voltage converter controls the step-down switch; the first input end (Vcomp) of the adder is also connected with one end of a capacitor, and the other end of the capacitor is grounded;
The second input end of the adder is used for inputting the high-voltage adjustment value, and the output end of the adder is used for outputting the adjusted high-voltage adjustment value; the power management device is used for outputting a high-level driving signal when the feedback voltage rises to the high-voltage adjustment value.
In some alternative embodiments, the parameter adjustment module includes a voltage converter, a boost current source, a buck current source, a capacitor, a boost switch, a buck switch, and a subtractor;
The first input end of the voltage converter is used for inputting a low-voltage comparison result, and the first output end of the voltage converter controls the boost switch; one end of the boost switch is connected with the output end of the boost current source, and the other end of the boost switch is connected with the first input end of the subtracter;
the first input end of the subtracter is also connected with one end of a buck switch, the other end of the buck switch is connected with the input end of a buck current source, and the output end of the buck current source is grounded; the second input end of the voltage converter is used for inputting a high voltage comparison result, and the second output end of the voltage converter controls the step-down switch; the first input end (Vcomp) of the subtracter is also connected with one end of a capacitor, and the other end of the capacitor is grounded;
The second input end of the subtracter is used for inputting the low-voltage adjustment value, and the output end of the subtracter is used for outputting the adjusted low-voltage adjustment value; the low voltage regulation value is used for outputting a low-level driving signal when the feedback voltage is reduced to the low voltage regulation value.
In some alternative embodiments, the parameter adjustment module includes a voltage converter, a boost current source, a buck current source, a capacitor, a boost switch, a buck switch, and a pulse width compensation circuit;
the first input end of the voltage converter is used for inputting a low-voltage comparison result, and the first output end of the voltage converter controls the boost switch; one end of the boost switch is connected with the output end of the boost current source, and the other end of the boost switch is connected with the first input end of the pulse width compensation circuit U6;
The first input end of the pulse width compensation circuit is also connected with one end of a buck switch, the other end of the buck switch is connected with the input end of a buck current source, and the output end of the buck current source is grounded; the second input end of the voltage converter is used for inputting a high voltage comparison result, and the second output end of the voltage converter controls the step-down switch; the first input end (Vcomp) of the pulse width compensation circuit is also connected with one end of a capacitor, and the other end of the capacitor is grounded;
the second input end of the pulse width compensation circuit is used for inputting PWM pulses, and the output end of the pulse width compensation circuit is used for outputting PWM pulses with adjusted pulse width; wherein the PWM pulse is used for generating a driving signal together with the control pulse.
In some alternative embodiments, the parameter adjustment module includes a voltage converter, a boost current source, a buck current source, a capacitor, a boost switch, a buck switch, an adder, an oscillator, and a flip-flop;
The first input end of the voltage converter is used for inputting a low-voltage comparison result, and the first output end of the voltage converter controls the boost switch; one end of the boost switch is connected with the output end of the boost current source, and the other end of the boost switch is connected with the first input end of the adder;
The first input end of the adder is also connected with one end of a buck switch, the other end of the buck switch is connected with the input end of a buck current source, and the output end of the buck current source is grounded; the second input end of the voltage converter is used for inputting a high voltage comparison result, and the second output end of the voltage converter controls the step-down switch; the first input end of the adder is also connected with one end of a capacitor, and the other end of the capacitor is grounded;
The second input end of the adder is used for inputting a clock signal with fixed frequency, the output end of the adder is connected with the input end of the oscillator, the oscillator outputs the clock signal with target frequency to the first input end of the trigger, the second input end of the trigger is used for inputting PWM pulse with fixed pulse width, and the output end of the trigger outputs the PWM pulse with adjusted frequency; the PWM pulse with the adjusted frequency is used for generating a driving signal together with the control pulse.
The embodiment of the application provides a light-load noise suppression method for a voltage conversion circuit, which is applied to a power management device of a switch type power supply circuit; in the switch type power supply circuit, when the voltage conversion circuit is in a light load mode, a drive signal of intermittent pulse is generated, and the voltage conversion circuit is driven to perform voltage conversion according to the drive signal;
The method comprises the following steps:
The frequency of the driving signal is detected in real time, and the frequency of the driving signal is outside the human ear perceivable frequency range by adjusting parameters influencing the frequency of the driving signal.
In some alternative embodiments, when the voltage conversion circuit is in the light load mode, the intermittent pulse driving signal is generated, and the voltage conversion circuit is driven to perform voltage conversion according to the driving signal, including:
When the load of the voltage conversion circuit is lighter, the output voltage of the voltage conversion circuit is increased, the feedback voltage is reduced, and the power management device outputs a low-level driving signal until the feedback voltage is reduced to a low-voltage regulation value, so that the voltage conversion circuit stops working;
when the voltage conversion circuit stops working, the output voltage of the voltage conversion circuit is reduced, the feedback voltage is increased, and the power management device outputs a high-level driving signal until the feedback voltage is increased to a high-voltage regulation value; wherein the low voltage adjustment value is less than the high voltage adjustment value.
According to the technical scheme, when the load of the voltage conversion circuit is lightened, the feedback voltage is reduced to the low-voltage adjustment value, the switch-mode power supply circuit starts an intermittent power supply mode, the power supply management device outputs a low-level driving signal to stop the voltage conversion circuit, after that, the feedback voltage is gradually increased along with the reduction of the output voltage of the voltage conversion circuit until the feedback voltage is increased to the high-voltage adjustment value, the voltage management device outputs a high-level driving signal, the voltage conversion circuit enters a working mode again, and the process is repeated, so that the switch-mode power supply circuit performs intermittent power supply.
In some alternative embodiments, the adjusting of the parameter affecting the frequency of the drive signal includes:
the low-voltage adjustment value and the high-voltage adjustment value are adjusted.
According to the technical scheme, the period of the driving signal is adjusted by adjusting the low-voltage adjusting value and the high-voltage adjusting value, so that the frequency of the driving signal is beyond the frequency range which can be perceived by human ears, and audio noise is avoided.
In some alternative embodiments, the power management device is further configured to:
Generating PWM pulses;
generating control pulses for controlling the driving signal to be high and low;
a drive signal is generated based on the PWM pulse and the control pulse.
According to the technical scheme, the power management device further generates PWM pulses and control pulses, and the PWM pulses and the control pulses are input into the logic circuit together to obtain the driving signals.
In some alternative embodiments, the adjusting the parameter affecting the frequency of the drive signal comprises:
the pulse width of the PWM pulse is adjusted.
According to the technical scheme, the pulse width of the PWM pulse is adjusted, so that the frequency of the driving signal is beyond the human ear perceivable frequency range, and audio noise is avoided.
In some alternative embodiments, the adjusting of the parameter affecting the frequency of the drive signal includes: the pulse frequency of the PWM pulse is adjusted.
According to the technical scheme, the pulse frequency of the PWM pulse is adjusted, so that the frequency of the driving signal is beyond the human ear perceivable frequency range, and audio noise is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a functional module of an intermittent power supply module according to an embodiment of the present application;
FIG. 2 is a schematic diagram of control pulse, PWM pulse and driving signal according to an embodiment of the present application;
Fig. 3 is a schematic structural diagram of a power management device of a switching power supply circuit according to an embodiment of the present application;
Fig. 4 is a schematic structural diagram of a power management device according to a first embodiment of the present application;
FIG. 5 is a schematic diagram of a triangle wave Saw_800, a control pulse, a PWM pulse and a driving signal according to an embodiment of the present application;
FIG. 6 is a diagram showing the relationship between the low voltage adjustment value, the high voltage adjustment value, the feedback voltage and the driving signal according to the embodiment of the present application;
fig. 7 is a circuit diagram of another power management device according to the first adjustment mode provided in this embodiment;
Fig. 8 is a circuit diagram of a power management device according to a second adjustment method according to the present embodiment;
Fig. 9 is a circuit configuration diagram of a power management device according to a third adjustment method according to the present embodiment.
Icon: the device comprises a power management device-1, a pulse intermittent module-11, a finite state machine-12, a parameter adjustment module-121, a detection circuit-122, a voltage conversion circuit-2 and a feedback circuit-3.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
At present, electronic products such as home computers, communication products, consumer products and the like are generally configured with a switch-mode power supply circuit. In a switching power supply circuit, when the voltage conversion circuit is in a light load Mode, an intermittent power supply Mode (Burst Mode) is generally used to provide lower power required by an electronic device. In the intermittent power supply mode, the power management device controls the pulse width modulation circuit to pause for a preset time, and when the power supplied to the electronic device is lower than a lower limit, the pulse wave is output again, so that the voltage conversion circuit supplies power to the electronic device again, and at the moment, the driving signal driving the voltage conversion circuit is a pulse wave group. In order to avoid audio noise in the audio frequency range of 1 kHz-10 kHz, which is sensitive to human ears, the method for suppressing light-load noise of the voltage conversion circuit and the power management device can control the frequency of the driving signal to be outside the human ears perceivable frequency, and the method for suppressing light-load noise of the voltage conversion circuit is described below by taking the control of the frequency of the driving signal to be about 800Hz as an example.
For describing aspects, first, a power management device of a switch mode power supply circuit provided in an embodiment of the present application will be described in detail:
the power management device of the embodiment of the application aims at: in the switching power supply circuit, when the voltage conversion circuit is in a light load mode, a drive signal of intermittent pulses is generated, and the voltage conversion circuit is driven to perform voltage conversion according to the drive signal. The frequency of the driving signal is detected in real time through the power management device, and the frequency of the driving signal is outside the human ear perceivable frequency range through adjusting parameters influencing the frequency of the driving signal.
The voltage management device of the embodiment of the application is based on a finite state machine to control a driving signal output in an intermittent pulse mode, namely: in the switch mode power supply circuit, when the voltage converting circuit is in the light load mode, the power supply management device of the switch mode power supply circuit is in the intermittent power supply mode, based on the finite state machine, the frequency of the driving signal for driving the voltage converting circuit is detected in real time, the frequency is outside the human ear perceivable frequency range by adjusting the parameter influencing the frequency of the driving signal, for example, the driving signal frequency is outside the human ear sensitive audio frequency of 1 kHz-10 kHz, the driving signal frequency can be controlled below 1kHz or above 10kHz, for example, the driving signal frequency can be controlled to be about 800 Hz.
Wherein, intermittent power supply mode is: when the load of the voltage conversion circuit is lighter, the output voltage of the voltage conversion circuit is increased, the feedback voltage is reduced, and the power management device outputs a low-level driving signal until the feedback voltage is reduced to a low-voltage regulation value, so that the voltage conversion circuit stops working; when the voltage conversion circuit stops working, the output voltage of the voltage conversion circuit is reduced, the feedback voltage is increased, and the power management device outputs a high-level driving signal until the feedback voltage is increased to a high-voltage regulation value; wherein the low voltage adjustment value is less than the high voltage adjustment value. When the feedback voltage is reduced to a low voltage adjustment value, the switch type power supply circuit starts an intermittent power supply mode, the power supply management device outputs a low-level driving signal to stop the operation of the voltage conversion circuit, and then the feedback voltage is gradually increased along with the reduction of the output voltage of the voltage conversion circuit until the feedback voltage is increased to a high voltage adjustment value, the voltage management device outputs a high-level driving signal, the voltage conversion circuit enters a working mode again, and the process is repeated to enable the switch type power supply circuit to perform intermittent power supply.
It should be clear that the voltage conversion circuit can be applied to various types of dc/dc converters, such as: a Buck converter (BuckConverter), a boost converter (BoostConverter), a Buck-boost converter (Buck-BoostConverter), a flyback converter (FlybackConverter), a forward converter (ForwardConverter), an LLC oscillating circuit, and the like. The following embodiments of the application are described with examples of flyback converters.
Referring to fig. 1, fig. 1 is a schematic diagram of a functional module of a pulse intermittent module 11, the pulse intermittent module 11 is configured to implement an intermittent power supply mode, vzd_h is a high voltage adjustment value, vzd_l is a low voltage adjustment value, vfb is a feedback voltage, and a pulse intermittent comparator U4 is used to determine whether the feedback voltage Vfb decreases to the low voltage adjustment value vzd_l, if yes, a low level control pulse ZD is output, so that the driving signal Gate is at a low level, and at this time, the voltage conversion circuit stops working. The intermittent pulse comparator U4 is used to determine whether the feedback voltage Vfb rises to the high voltage adjustment value vzd_h, if so, a high level control pulse ZD is output to make the driving signal Gate be high level, and at this time, the voltage conversion circuit starts to operate. Wherein, the control pulse ZD and the PWM pulse are input into the logic circuit U5 together, thereby generating a drive signal Gate, and the drive signal Gate is consistent with the PWM pulse when outputting the pulse; when the control pulse ZD is at low level, the driving signal Gate is also at low level; when the control pulse ZD is at a high level, the driving signal Gate is also at a high level, that is, the frequency of the control pulse is consistent with the frequency of the driving signal, as shown in fig. 2.
Accordingly, in some alternative embodiments, the power management device may be a PWM (pulse width modulation) chip, and the power management device is further configured to generate PWM pulses, and generate control pulses for controlling the driving signal to be high and low, and generate the driving signal according to the PWM pulses and the control pulses.
In some embodiments described below, various power management devices provided by various embodiments of the present application will be described in detail in connection with specific circuits.
Referring to fig. 3, fig. 3 is a schematic diagram of a power management device of a switch mode power supply circuit according to an embodiment of the application, and the power management device 1 includes a pulse intermittent module 11 and a finite state machine 12.
The input of the voltage conversion circuit 2 is Vin, the output Vout of the voltage conversion circuit 2 is connected to a load, the input end of the feedback circuit 3 is connected to the output Vout of the voltage conversion circuit, and the feedback circuit 3 outputs a feedback voltage to the pulse intermittent module 11. The intermittent pulse module 11 is configured to generate an intermittent pulse driving signal according to the feedback voltage when the voltage conversion circuit 2 is in the light load mode, and drive the voltage conversion circuit 2 to perform voltage conversion according to the driving signal. The finite state machine 12 is connected with the pulse intermittent module 11, and the finite state machine 12 is used for detecting the frequency of the driving signal in real time, and adjusting parameters affecting the frequency of the driving signal to enable the frequency of the driving signal to be out of a human-perceivable frequency range.
In some alternative embodiments, finite state machine 12 includes detection circuitry 122 and parameter adjustment module 121.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a power management device 1 adopting a first adjustment mode according to an embodiment of the present application, and a detection circuit 122 according to an embodiment of the present application includes a charging capacitor current source D1, an energy discharging switch K1, an energy storage capacitor C1, a low voltage comparator U1 and a high voltage comparator U2.
The output end of the charging capacitance current source D1 is connected with one end of the energy storage capacitor C1, and the other end of the energy storage capacitor C1 is grounded; the output end of the charging capacitance current source D1 is also connected with one end of the energy release switch K1, the other end of the energy release switch K1 is grounded, and the energy release switch K1 is controlled by a control pulse; wherein the control pulse is used for generating a driving signal together with the PWM pulse; the output end of the charging capacitance current source D1 is also connected with the positive input end of the low voltage comparator U1, the negative input end of the low voltage comparator U1 is used for inputting low-level voltage, and the output end of the low voltage comparator U1 is used for outputting a low voltage comparison result; the output end of the charging capacitance current source D1 is also connected with the positive input end of the high-voltage comparator U2, the negative input end of the high-voltage comparator U2 is used for inputting high-order voltage, and the output end of the high-voltage comparator U2 is used for outputting a high-voltage comparison result; wherein the high voltage is greater than the low voltage.
The parameter adjustment module 121 of the present embodiment is connected to the low voltage comparator U1 and the high voltage comparator U2, and is configured to adjust down or adjust up a parameter affecting the frequency of the driving signal according to the low voltage comparison result and the high voltage comparison result.
In some alternative implementations, the parameter adjustment module 121 of the present embodiment includes a voltage converter U3, a boost current source D2, a buck current source D3, a capacitor C2, a boost switch K2, a buck switch K3, and an adder;
The first input end of the voltage converter U3 is used for inputting a low-voltage comparison result, and the first output end of the voltage converter U3 controls the boost switch K2; one end of the boost switch K2 is connected with the output end of the boost current source D2, and the other end of the boost switch K2 is connected with the first input end of the adder; the first input end of the adder is also connected with one end of a buck switch K3, the other end of the buck switch K3 is connected with the input end of a buck current source D3, and the output end of the buck current source D3 is grounded; the second input end of the voltage converter U3 is used for inputting a high voltage comparison result, and the second output end of the voltage converter U3 controls the buck switch K3; the first input end (Vcomp) of the adder is also connected with one end of a capacitor C2, and the other end of the capacitor C2 is grounded; the second input end of the adder is used for inputting the high-voltage adjustment value, and the output end of the adder is used for outputting the adjusted high-voltage adjustment value; the high voltage adjustment value is used for outputting a high-level driving signal by the power management device 1 when the feedback voltage rises to the high voltage adjustment value.
The power management device 1 of this embodiment adopts a first adjustment mode, that is, fixes a low voltage adjustment value, and adjusts the magnitude of a high voltage adjustment value, which specifically includes:
The charge-capacitance current source D1 charges the energy storage capacitance C1, and simultaneously, the energy release switch K1 is periodically closed according to the period of the control pulse, thereby forming the triangular wave saw_800. Referring to fig. 5, in the triangular wave Saw_800 of the present embodiment, in a period of one control pulse, whether the triangular wave Saw_800 of the charge capacitor C1 is propped up to a voltage target value of 2V by the charge capacitor current source D1 corresponds to whether one period is 1.25ms, because: when one period is 1.25ms, the reciprocal of the corresponding period is the target frequency value 800Hz. That is, by judging that the triangular wave Saw_800 is at 2V, the frequency of the control pulse can be made 800Hz. Therefore, when the high voltage comparator U2 compares with the high voltage vtar_ hys of 2V, and the new value of new_800 does not reach 2V, i.e. the frequency f_bst of the driving signal is greater than 800Hz, the boost switch K2 is periodically turned on according to the period of the control pulse, and the boost output terminal of the voltage converter U3 is used to output the voltage to increase the value of Vcomp, so that the high voltage adjustment value vzd_h' =vzd_h+vcomp. Referring to fig. 6, when the high voltage adjustment value becomes larger and the low voltage adjustment value becomes unchanged, (the low voltage adjustment value, the high voltage adjustment value) becomes larger, the frequency f_bst of the driving signal decreases and approaches 800Hz.
Similarly, in a control period, if the triangular wave Saw_800 of the charge capacitor C1 exceeds a voltage target value of 2.1V by using the charge capacitor current source D1, the corresponding frequency value of the voltage target value is 760Hz, if Saw_800 exceeds 2.1V, that is, the frequency f_bst of the driving signal is smaller than 760Hz, the buck switch K3 is periodically closed, the buck output end of the voltage converter U3 is utilized to output, so that the value of Vcomp is reduced, the high voltage adjustment value is reduced, and the frequency f_bst approaches 760Hz.
In some alternative embodiments, please refer to fig. 7, fig. 7 is a circuit diagram of another power management device 1 adopting the first adjustment mode according to the present embodiment. The parameter adjustment module 121 of the present embodiment includes a voltage converter U3, a boost current source D2, a buck current source D3, a capacitor C2, a boost switch K2, a buck switch K3, and a subtractor.
The first input end of the voltage converter U3 is used for inputting a low-voltage comparison result, and the first output end of the voltage converter U3 controls the boost switch K2; one end of the boost switch K2 is connected with the output end of the boost current source D2, and the other end of the boost switch K2 is connected with the first input end of the subtracter; the first input end of the subtracter is also connected with one end of a buck switch K3, the other end of the buck switch K3 is connected with the input end of a buck current source D3, and the output end of the buck current source D3 is grounded; the second input end of the voltage converter U3 is used for inputting a high voltage comparison result, and the second output end of the voltage converter U3 controls the buck switch K3; the first input end (Vcomp) of the subtracter is also connected with one end of a capacitor C2, and the other end of the capacitor C2 is grounded; the second input end of the subtracter is used for inputting the low-voltage adjustment value, and the output end of the subtracter is used for outputting the adjusted low-voltage adjustment value; the low voltage adjustment value is used for outputting a low-level driving signal by the power management device 1 when the feedback voltage is reduced to the low voltage adjustment value.
The power management device 1 of this embodiment adopts a similar manner to the first adjustment manner, and slightly differs in that the high voltage adjustment value is fixed, and the low voltage adjustment value is adjusted, which specifically includes the following steps:
In one period, if the triangular wave Saw_800 of the charge capacitor C1 reaches a voltage target value of 2V, the frequency value corresponding to the voltage target value is 800Hz, if Saw_800 does not exceed 2V, that is, the frequency f_bst of the driving signal is greater than 800Hz, the boost switch K2 is periodically closed, the boost output end of the voltage converter U3 is utilized to output, so that the value of Vcomp is increased, and the low voltage regulation value can be reduced because of the low voltage regulation value VZD_L' =VZD_L-Vcomp, and the frequency f_bst approaches 800Hz.
In one period, if the triangular wave Saw_800 of the charge capacitor C1 exceeds a voltage target value of 2.1V and the corresponding frequency value of the voltage target value is 760Hz, if Saw_800 exceeds 2.1V, that is, the frequency f_bst of the driving signal is smaller than 760Hz, the step-down switch K3 is closed periodically, the step-down output end of the voltage converter U3 is utilized to output, so that the value of Vcomp is reduced, the low-voltage adjustment value is increased, and the frequency f_bst approaches 760Hz.
In some alternative embodiments, referring to fig. 8, fig. 8 is a circuit diagram of a power management device 1 according to a second adjustment mode provided in this embodiment. The parameter adjustment module 121 includes a voltage converter U3, a boost current source D2, a buck current source D3, a capacitor C2, a boost switch K2, a buck switch K3, and a pulse width compensation circuit U6;
The first input end of the voltage converter U3 is used for inputting a low-voltage comparison result, and the first output end of the voltage converter U3 controls the boost switch K2; one end of the boost switch K2 is connected with the output end of the boost current source D2, and the other end of the boost switch K2 is connected with the first input end of the pulse width compensation circuit U6; the first input end of the pulse width compensation circuit U6 is also connected with one end of a buck switch K3, the other end of the buck switch K3 is connected with the input end of a buck current source D3, and the output end of the buck current source D3 is grounded; the second input end of the voltage converter U3 is used for inputting a high voltage comparison result, and the second output end of the voltage converter U3 controls the buck switch K3; the first input end (Vcomp) of the pulse width compensation circuit U6 is also connected with one end of a capacitor C2, and the other end of the capacitor C2 is grounded; the second input end of the pulse width compensation circuit U6 is used for inputting PWM pulses, and the output end of the pulse width compensation circuit U6 is used for outputting PWM pulses with adjusted pulse width; wherein the PWM pulse is used for generating a driving signal together with the control pulse.
The power management device 1 of this embodiment adopts the second adjustment mode, fixes the low voltage adjustment value and the high voltage adjustment value, and performs pulse width compensation on the PWM pulse, and the specific process is as follows:
In one period, whether the triangular wave Saw_800 of the charge capacitor C1 reaches a voltage target value of 2V or not is charged by the charge capacitor current source D1, the frequency value corresponding to the voltage target value is 800Hz, if Saw_800 does not exceed 2V, namely, the frequency f_bst of a driving signal is greater than 800Hz, the boost switch K2 is closed periodically, the value of Vcomp is increased by utilizing the boost output end output of the voltage converter U3, the pulse width compensation circuit U6 is utilized for increasing the pulse to the PWM pulse according to the regulated Vcomp, the PWM pulse with the adjusted pulse width is obtained, and the frequency f_bst is reduced and approaches 800Hz.
In one period, whether the triangular wave Saw_800 of the charge capacitor C1 exceeds a voltage target value of 2.1V or not is utilized to charge the capacitor C1 by utilizing the charge capacitor current source D1, the corresponding frequency value of the voltage target value is 760Hz, if Saw_800 exceeds 2.1V, namely, the frequency f_bst of a driving signal is smaller than 760Hz, the buck switch K3 is closed periodically, the value of Vcomp is reduced by utilizing the buck output end output of the voltage converter U3, the PWM pulse is reduced by utilizing the pulse width compensation circuit U6 according to the regulated Vcomp, the PWM pulse with the adjusted pulse width is obtained, and the frequency f_bst is increased and approaches 760Hz.
In some alternative embodiments, please refer to fig. 9, fig. 9 is a circuit diagram of a power management device 1 adopting a third adjustment mode according to the present embodiment. The parameter adjustment module 121 includes a voltage converter U3, a boost current source D2, a buck current source D3, a capacitor C2, a boost switch K2, a buck switch K3, an adder, an oscillator U7, and a trigger U8; the oscillator U7 of the present embodiment needs to be an oscillator with voltage control, such as a voltage-controlled oscillator; the flip-flop U8 of the present embodiment adopts an RS flip-flop.
The first input end of the voltage converter U3 is used for inputting a low-voltage comparison result, and the first output end of the voltage converter U3 controls the boost switch K2; one end of the boost switch K2 is connected with the output end of the boost current source D2, and the other end of the boost switch K2 is connected with the first input end of the adder; the first input end of the adder is also connected with one end of a buck switch K3, the other end of the buck switch K3 is connected with the input end of a buck current source D3, and the output end of the buck current source D3 is grounded; the second input end of the voltage converter U3 is used for inputting a high voltage comparison result, and the second output end of the voltage converter U3 controls the buck switch K3; the first input end (Vcomp) of the adder is also connected with one end of a capacitor C2, and the other end of the capacitor C2 is grounded; the second input end of the adder is used for inputting a clock signal with fixed frequency, the output end of the adder is connected with the input end of the oscillator U7, the oscillator U7 outputs the clock signal with target frequency to the S end of the trigger U8, the R end of the trigger U8 is used for inputting PWM pulse with fixed pulse width, and the Q end of the trigger U8 outputs PWM pulse with adjusted frequency; wherein the PWM pulse is used for generating a driving signal together with the control pulse.
The power management device 1 of this embodiment adopts the third regulation mode, fixes the low voltage adjustment value, the high voltage adjustment value and the PWM pulse width unchanged, adjusts the frequency of the PWM pulse, and its specific process is:
In one period, whether the triangular wave Saw_800 of the charge capacitor C1 reaches a voltage target value of 2V or not is charged by the charge capacitor current source D1, the frequency value corresponding to the voltage target value is 800Hz, if Saw_800 does not exceed 2V, namely, the frequency f_bst of a driving signal is greater than 800Hz, the boost switch K2 is closed periodically, the value of Vcomp is increased by utilizing the output end output of the boost output end of the voltage converter U3, a VCLK clock signal with the original frequency of 20kHz is input into the adder, then enters the oscillator U7, the oscillator U7 outputs a signal CLK, the signal CLK is input into the S end of the trigger U8, the pulse width is fixed at the R end of the trigger U8, and the frequency f_bst is reduced to approach 800Hz by utilizing the PWM pulse with the increased output frequency of the trigger U8.
In one period, whether the triangular wave Saw_800 of the charge capacitor C1 exceeds a voltage target value of 2.1V or not is charged by using the charge capacitor current source D1, the corresponding frequency value of the voltage target value is 760Hz, if Saw_800 exceeds 2.1V, namely, the frequency f_bst of a driving signal is smaller than 760Hz, the buck switch K3 is closed periodically, the value of Vcomp is reduced by using the buck output end of the voltage converter U3, a VCLK clock signal with the original frequency of 20kHz is input into the adder, then enters the oscillator U7, the oscillator U7 outputs a signal CLK, the signal CLK is input into the S end of the trigger U8, the pulse width is fixed at the R end of the trigger U8, and the PWM pulse with the reduced frequency f_bst is output by the trigger U8 and approaches 760Hz.
The following embodiment will illustrate a light load noise suppression method for a voltage conversion circuit provided by the embodiment of the present application, which is specifically as follows:
The light-load noise suppression method for the voltage conversion circuit is applied to the power management device 1 of the switch type power supply circuit; in the switching power supply circuit, when the voltage conversion circuit 2 is in the light load mode, a drive signal of intermittent pulses is generated, and the voltage conversion circuit 2 is driven to perform voltage conversion according to the drive signal.
The noise suppression method of the embodiment of the application comprises the following steps: the frequency of the driving signal is detected in real time, and the frequency of the driving signal is outside the human ear perceivable frequency range by adjusting parameters influencing the frequency of the driving signal.
In the switch-mode power supply circuit, when the voltage converting circuit 2 is in the light-load mode, the power supply management apparatus 1 of the switch-mode power supply circuit can control the driving signal frequency to be 1kHz or less or 10kHz or more, for example, to control the driving signal frequency to be about 800Hz, by adjusting parameters affecting the driving signal frequency to be outside the human-ear perceivable frequency range, for example, to make the driving signal frequency be outside the human-ear sensitive audio frequency 1kHz to 10kHz, based on the finite state machine, that is, by detecting the frequency of the driving signal for driving the voltage converting circuit 2 in real time.
In some alternative embodiments, when the voltage conversion circuit 2 is in the light load mode, the intermittent pulse driving signal is generated, and the voltage conversion circuit 2 is driven to perform voltage conversion according to the driving signal, which includes: when the load of the voltage conversion circuit 2 becomes light, the output voltage of the voltage conversion circuit 2 increases, the feedback voltage decreases, and the power management device 1 outputs a low-level driving signal to stop the operation of the voltage conversion circuit 2 until the feedback voltage decreases to a low-voltage regulation value; when the voltage conversion circuit 2 stops working, the output voltage of the voltage conversion circuit 2 is reduced, the feedback voltage is increased, and the power management device 1 outputs a high-level driving signal until the feedback voltage is increased to a high-voltage adjustment value; wherein the low voltage adjustment value is less than the high voltage adjustment value.
When the load of the voltage conversion circuit 2 becomes light and the feedback voltage is reduced to the low voltage adjustment value, the switch mode power supply circuit starts an intermittent power supply mode, the power management device 1 outputs a low-level driving signal to stop the voltage conversion circuit 2, then the feedback voltage gradually rises along with the reduction of the output voltage of the voltage conversion circuit 2 until the feedback voltage rises to the high voltage adjustment value, the voltage management device outputs a high-level driving signal, the voltage conversion circuit 2 enters an operating mode again, and the above processes are repeated to enable the switch mode power supply circuit to perform intermittent power supply.
In some alternative embodiments, the power management device 1 may be a PWM (pulse width modulation) chip, and the power management device 1 is further configured to generate PWM pulses and generate control pulses for controlling the driving signal to be high and low, and generate the driving signal according to the PWM pulses and the control pulses.
In some alternative embodiments, by adjusting parameters affecting the frequency of the drive signal, at least the following three adjustment modes are included:
In the first adjusting mode, the period size of the driving signal is adjusted by adjusting the low-voltage adjusting value and the high-voltage adjusting value, so that the frequency of the driving signal is outside the frequency range which can be perceived by human ears, and audio noise is avoided.
In the second adjustment mode, the pulse width of the PWM pulse is adjusted to enable the frequency of the driving signal to be outside the frequency range which can be perceived by human ears, so that audio noise is avoided.
And in the third adjusting mode, the pulse frequency of the PWM pulse is adjusted so that the frequency of the driving signal is outside the frequency range which can be perceived by human ears, and audio noise is avoided.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (11)

1. A power management apparatus for a switching power supply circuit, comprising:
The pulse intermittent module (11) is used for generating an intermittent pulse driving signal when the voltage conversion circuit (2) is in a light load mode and driving the voltage conversion circuit (2) to perform voltage conversion according to the driving signal; and
-A finite state machine (12) connected to the pulse pause module (11), the finite state machine (12) being adapted to detect the frequency of the drive signal in real time, the frequency of the drive signal being outside a human perceptible frequency range by adjusting parameters affecting the frequency of the drive signal;
The finite state machine (12) comprises a charging capacitance current source (D1), an energy discharging switch (K1), an energy storage capacitor (C1), a low-voltage comparator (U1), a high-voltage comparator (U2) and a parameter adjusting module (121);
The output end of the charging capacitance current source (D1) is connected with one end of the energy storage capacitor (C1), and the other end of the energy storage capacitor (C1) is grounded;
The output end of the charging capacitance current source (D1) is also connected with one end of the energy release switch (K1), the other end of the energy release switch (K1) is grounded, and the energy release switch (K1) is controlled by control pulses; wherein the control pulse is used for generating the driving signal together with the PWM pulse;
the output end of the charging capacitance current source (D1) is also connected with the positive input end of the low-voltage comparator (U1), the negative input end of the low-voltage comparator (U1) is used for inputting low-level voltage, and the output end of the low-voltage comparator (U1) is used for outputting a low-voltage comparison result;
The output end of the charging capacitance current source (D1) is also connected with the positive input end of the high-voltage comparator (U2), the negative input end of the high-voltage comparator (U2) is used for inputting high-level voltage, and the output end of the high-voltage comparator (U2) is used for outputting a high-voltage comparison result; wherein the high voltage is greater than the low voltage;
The parameter adjustment module (121) is connected with the low-voltage comparator (U1) and the high-voltage comparator (U2) and is used for adjusting down or up parameters affecting the frequency of the driving signal according to the low-voltage comparison result and the high-voltage comparison result.
2. The apparatus of claim 1, wherein the parameter adjustment module (121) comprises a voltage converter (U3), a boost current source (D2), a buck current source (D3), a capacitor (C2), a boost switch (K2), a buck switch (K3), and an adder;
The first input end of the voltage converter (U3) is used for inputting the low-voltage comparison result, and the first output end of the voltage converter (U3) controls the boost switch (K2); one end of the boost switch (K2) is connected with the output end of the boost current source (D2), and the other end of the boost switch (K2) is connected with the first input end of the adder;
The first input end of the adder is also connected with one end of the buck switch (K3), the other end of the buck switch (K3) is connected with the input end of the buck current source (D3), and the output end of the buck current source (D3) is grounded; the second input end of the voltage converter (U3) is used for inputting the high voltage comparison result, and the second output end of the voltage converter (U3) controls the buck switch (K3); the first input end (Vcomp) of the adder is also connected with one end of the capacitor (C2), and the other end of the capacitor (C2) is grounded;
The second input end of the adder is used for inputting a high-voltage adjustment value, and the output end of the adder is used for outputting the adjusted high-voltage adjustment value; the power management device (1) is used for outputting a high-level driving signal when the feedback voltage rises to the high-voltage adjustment value.
3. The apparatus of claim 1, wherein the parameter adjustment module (121) comprises a voltage converter (U3), a boost current source (D2), a buck current source (D3), a capacitor (C2), a boost switch (K2), a buck switch (K3), and a subtractor;
The first input end of the voltage converter (U3) is used for inputting the low-voltage comparison result, and the first output end of the voltage converter (U3) controls the boost switch (K2); one end of the boost switch (K2) is connected with the output end of the boost current source (D2), and the other end of the boost switch (K2) is connected with the first input end of the subtracter;
The first input end of the subtracter is also connected with one end of a buck switch (K3), the other end of the buck switch (K3) is connected with the input end of the buck current source (D3), and the output end of the buck current source (D3) is grounded; the second input end of the voltage converter (U3) is used for inputting a high-voltage comparison result, and the second output end of the voltage converter (U3) controls the step-down switch (K3); the first input end (Vcomp) of the subtracter is also connected with one end of the capacitor (C2), and the other end of the capacitor (C2) is grounded;
The second input end of the subtracter is used for inputting a low-voltage adjustment value, and the output end of the subtracter is used for outputting the adjusted low-voltage adjustment value; the low voltage regulation value is used for outputting a low-level driving signal by the power management device (1) when the feedback voltage is reduced to the low voltage regulation value.
4. The apparatus of claim 1, wherein the parameter adjustment module (121) comprises a voltage converter (U3), a boost current source (D2), a buck current source (D3), a capacitor (C2), a boost switch (K2), a buck switch (K3), and a pulse width compensation circuit (U6);
the first input end of the voltage converter (U3) is used for inputting the low-voltage comparison result, and the first output end of the voltage converter (U3) controls the boost switch (K2); one end of the boost switch (K2) is connected with the output end of the boost current source (D2), and the other end of the boost switch (K2) is connected with the first input end of the pulse width compensation circuit (U6);
The first input end of the pulse width compensation circuit (U6) is also connected with one end of the buck switch (K3), the other end of the buck switch (K3) is connected with the input end of the buck current source (D3), and the output end of the buck current source (D3) is grounded; the second input end of the voltage converter (U3) is used for inputting a high-voltage comparison result, and the second output end of the voltage converter (U3) controls the step-down switch (K3); the first input end (Vcomp) of the pulse width compensation circuit (U6) is also connected with one end of the capacitor (C2), and the other end of the capacitor (C2) is grounded;
The second input end of the pulse width compensation circuit (U6) is used for inputting PWM pulses, and the output end of the pulse width compensation circuit (U6) is used for outputting PWM pulses with adjusted pulse width; the PWM pulse with the adjusted pulse width is used for generating the driving signal together with the control pulse.
5. The apparatus of claim 1, wherein the parameter adjustment module (121) comprises a voltage converter (U3), a boost current source (D2), a buck current source (D3), a capacitor (C2), a boost switch (K2), a buck switch (K3), an adder, an oscillator (U7), and a flip-flop (U8);
The first input end of the voltage converter (U3) is used for inputting the low-voltage comparison result, and the first output end of the voltage converter (U3) controls the boost switch (K2); one end of the boost switch (K2) is connected with the output end of the boost current source (D2), and the other end of the boost switch (K2) is connected with the first input end of the adder;
The first input end of the adder is also connected with one end of the buck switch (K3), the other end of the buck switch (K3) is connected with the input end of the buck current source (D3), and the output end of the buck current source (D3) is grounded; the second input end of the voltage converter (U3) is used for inputting the high voltage comparison result, and the second output end of the voltage converter (U3) controls the buck switch (K3); the first input end (Vcomp) of the adder is also connected with one end of the capacitor (C2), and the other end of the capacitor (C2) is grounded;
The second input end of the adder is used for inputting a clock signal with fixed frequency, the output end of the adder is connected with the input end of the oscillator (U7), the oscillator (U7) outputs the clock signal with target frequency to the first input end of the trigger (U8), the second input end of the trigger (U8) is used for inputting PWM pulse with fixed pulse width, and the output end of the trigger (U8) outputs PWM pulse with adjusted frequency; the PWM pulse with the adjusted frequency is used for generating the driving signal together with the control pulse.
6. A method of light load noise suppression for a voltage conversion circuit, characterized in that the method is applied to a power management device (1) of a switching power supply circuit as claimed in any one of claims 1-5; in the switch type power supply circuit, when the voltage conversion circuit (2) is in a light load mode, a drive signal of intermittent pulse is generated, and the voltage conversion circuit (2) is driven to perform voltage conversion according to the drive signal;
the method comprises the following steps:
The frequency of the driving signal is detected in real time, and the frequency of the driving signal is outside the human ear perceivable frequency range by adjusting parameters influencing the frequency of the driving signal.
7. The method according to claim 6, wherein generating a drive signal of intermittent pulses when the voltage converting circuit (2) is in the light load mode and driving the voltage converting circuit (2) to perform voltage conversion according to the drive signal, comprises:
when the load of the voltage conversion circuit (2) is lighter, the output voltage of the voltage conversion circuit (2) is increased, the feedback voltage is reduced, and the power management device (1) outputs a low-level driving signal until the feedback voltage is reduced to a low-voltage regulation value, so that the voltage conversion circuit stops working;
When the voltage conversion circuit (2) stops working, the output voltage of the voltage conversion circuit (2) is reduced, the feedback voltage is increased, and the power management device (1) outputs a high-level driving signal until the feedback voltage is increased to a high-voltage regulation value; wherein the low voltage adjustment value is less than the high voltage adjustment value.
8. The method of claim 7, wherein said adjusting parameters affecting the frequency of said drive signal comprises:
And adjusting the low-voltage adjustment value and the high-voltage adjustment value.
9. The method according to claim 7, wherein the power management device (1) is further configured to:
Generating PWM pulses;
generating control pulses for controlling the driving signal to be high and low;
a drive signal is generated based on the PWM pulse and the control pulse.
10. The method of claim 7, wherein the influencing the frequency of the drive signal by adjusting a parameter comprises:
the pulse width of the PWM pulse is adjusted.
11. The method of claim 7, wherein said adjusting parameters affecting the frequency of said drive signal comprises:
the pulse frequency of the PWM pulse is adjusted.
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