CN113821257B

CN113821257B - Method and device for inquiring information of processor kernel call stack

Info

Publication number: CN113821257B
Application number: CN202111146841.XA
Authority: CN
Inventors: 范保平
Original assignee: Hangzhou DPTech Technologies Co Ltd
Current assignee: Hangzhou DPTech Technologies Co Ltd
Priority date: 2021-09-29
Filing date: 2021-09-29
Publication date: 2023-05-23
Anticipated expiration: 2041-09-29
Also published as: CN113821257A

Abstract

The disclosure relates to a method and a device for querying information of a processor core call stack and electronic equipment. The method for inquiring the information of the call stack of the processor core comprises the following steps: determining an interrupt handling function in response to a first inter-core interrupt message from a host processor, the first inter-core interrupt message including a query identification bit, the query identification bit of the first inter-core interrupt message being a first value; acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register; and storing the kernel call stack information in a preset cache address. According to the embodiment of the disclosure, the kernel call stack information of the target processor can be obtained without stopping the device.

Description

Method and device for inquiring information of processor kernel call stack

Technical Field

The disclosure relates to the technical field of computers, in particular to a method and a device for querying information of a processor core call stack and electronic equipment.

Background

In the operation and maintenance process of a system provided with a plurality of processors, if a problem occurs in the system, kernel call stack information of a certain target processor needs to be checked to determine whether the problem of high processor utilization rate or channel congestion occurs.

In the related art, it is often necessary to take a device into kernel debug mode (KernelDebug, KDB) to stop running or shut down to view kernel call stack information on each processor, locating problems. In this process, there is a high probability of system operation risk caused by entering KDB mode.

Therefore, how to view the kernel call stack information of each processor under the condition of ensuring the normal operation of the system is an urgent problem to be solved in the field.

It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

The disclosure aims to provide a method, a device and an electronic device for querying information of a processor kernel call stack, which are used for solving the problem that the system is at risk in running when the system is stopped to view the kernel call stack information due to the limitations and defects of the related art at least to a certain extent.

According to a first aspect of embodiments of the present disclosure, there is provided a processor core call stack information query method, executed by any one of a plurality of processors, comprising: determining an interrupt handling function in response to a first inter-core interrupt message from a host processor, the first inter-core interrupt message including a query identification bit, the query identification bit of the first inter-core interrupt message being a first value; acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register; and storing the kernel call stack information in a preset cache address.

In an exemplary embodiment of the present disclosure, the interrupt handling function includes a do_nmi function, and the preset register includes a pt_regs register.

In an exemplary embodiment of the present disclosure, the determining the kernel call stack information according to the value of the preset register includes:

calling a stack_frame function according to the value of the preset register to acquire a stack frame bp pointer of the processor;

and calling a get_context_stack function according to the value of the bp pointer to obtain the kernel call stack information.

In an exemplary embodiment of the present disclosure, the preset cache address includes a g_x86_cpu_info character array.

In one exemplary embodiment of the present disclosure, the first inter-core interrupt message includes an interrupt descriptor, and determining an interrupt processing function according to the first inter-core interrupt message includes:

and determining the interrupt processing function according to the interrupt descriptor.

In an exemplary embodiment of the present disclosure, further comprising:

stopping the response action to the first inter-core interrupt message in response to a second inter-core interrupt message from the main processor, wherein the second inter-core interrupt message triggers the main processor to respond to a preset event, the preset event comprises at least one of a plurality of preset non-maskable interrupt events, the second inter-core interrupt message comprises a query identification bit, and the query identification bit of the second inter-core interrupt message is a second value;

and executing subsequent actions according to the second inter-core interrupt message.

According to a second aspect of the present disclosure, there is provided a processor core call stack information query method, executed by a user mode program, comprising:

generating a preset inter-core interrupt instruction for checking the kernel call stack information of a target processor in response to a standard command line instruction, so that a main processor responds to the preset inter-core interrupt instruction and sends a first inter-core interrupt message to the target processor, wherein the first inter-core interrupt message comprises a query identification bit, and the value of the query identification bit of the first inter-core interrupt message is a first value;

and acquiring a value of a preset cache address after a preset time period, and outputting the kernel call stack information of the target processor according to the value of the preset cache address.

According to a third aspect of the present disclosure, there is provided a processor core call stack information query method, executed by a main processor, comprising:

transmitting a first inter-core interrupt message to a target processor in response to a preset inter-core interrupt instruction from a user mode program, wherein the preset inter-core interrupt instruction is used for checking kernel call stack information of the target processor, the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

and responding to a preset cache address reading instruction from the user mode program, and returning the value of the preset cache address.

In an exemplary embodiment of the present disclosure, further comprising:

and responding to a preset event to send a second inter-core interrupt message to the target processor, wherein the preset event comprises at least one of a plurality of preset non-maskable interrupt events, the second inter-core interrupt message comprises a query identification bit, and the query identification bit of the second inter-core interrupt message is a second value.

According to a fourth aspect of embodiments of the present disclosure, there is provided a processor core call stack information query apparatus, including:

an interrupt function determination module configured to determine an interrupt processing function in response to a first inter-core interrupt message from a host processor, the first inter-core interrupt message including a query identification bit, the query identification bit of the first inter-core interrupt message being a first value;

the register reading module is used for acquiring the value of a preset register through the interrupt processing function and determining kernel call stack information according to the value of the preset register;

and the cache writing module is used for storing the kernel call stack information in a preset cache address.

According to a fifth aspect of the present disclosure, there is provided an electronic device comprising: a memory; and a processor coupled to the memory, the processor configured to perform the method of any of the above based on instructions stored in the memory.

According to a sixth aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a program which, when executed by a processor, implements a processor core call stack information query method as described in any one of the above.

According to the embodiment of the disclosure, the first inter-core interrupt message processing logic is arranged on each processor, so that the processor can return the core call stack information without entering a core debugging mode, the system problem positioning efficiency can be effectively improved, and the system operation risk caused by problem positioning is reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.

FIG. 1 is a schematic diagram of a system logic architecture of a processor core call stack information query method application in an exemplary embodiment of the present disclosure.

FIG. 2 is a flowchart of a processor core call stack information query method performed by any of a plurality of processors in an exemplary embodiment of the present disclosure.

FIG. 3 is a flowchart of a processor core call stack information query method performed by a user mode program in an exemplary embodiment of the present disclosure.

FIG. 4 is a flowchart of a processor core call stack information query method performed by a host processor in an exemplary embodiment of the present disclosure.

Fig. 5 is an interactive schematic diagram in an embodiment of the present disclosure.

Fig. 6 is a block diagram of a processor core call stack information query apparatus in an exemplary embodiment of the present disclosure.

Fig. 7 is a block diagram of an electronic device in an exemplary embodiment of the present disclosure.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the present disclosure. One skilled in the relevant art will recognize, however, that the aspects of the disclosure may be practiced without one or more of the specific details, or with other methods, components, devices, steps, etc. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the present disclosure.

Furthermore, the drawings are only schematic illustrations of the present disclosure, in which the same reference numerals denote the same or similar parts, and thus a repetitive description thereof will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor devices and/or microcontroller devices.

The following describes example embodiments of the present disclosure in detail with reference to the accompanying drawings.

The method of the embodiment of the disclosure can be operated under a Linux system or other operating systems for operating the multi-core processor.

Referring to fig. 1, the logical structure of the system 100 may include:

a user mode program 11 for providing a man-machine interaction function;

a main processor 12 running a user mode program 11 and a kernel mode program;

a plurality of processors 13, communicatively coupled to the main processor 12, for executing in response to instructions sent by the main processor 12.

The above user mode program 11, the main processor 12, and the processor 13 are all logical concepts, and may run on one or more physical processors at the same time, and the main processor 12 and the processor 13 may also be referred to as virtual processors or virtual CPUs (Virtual Central Processing Unit, VCPUs). Wherein the plurality of processors 13 may run on one or more Virtual Machines (VMs).

Referring to fig. 2, a method 200 performed by any one of a plurality of processors may include:

step S21, determining an interrupt processing function in response to a first inter-core interrupt message from a main processor, wherein the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

step S22, obtaining a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register;

step S23, the kernel call stack information is stored in a preset cache address.

To understand the method 200, an inter-core interrupt message and interrupt handling functions are first described.

An Inter-core interrupt message (IPI) is a message that a host CPU sends an interrupt signal to a target CPU in a system to cause the target CPU to perform a specific operation. The main CPU transmits an inter-processor interrupt message (IPI) as a signal directly on an APIC (Advanced Programmable Interrupt Controller ) bus, and does not pass through an IRQ interrupt line. The APICs on the motherboard are mainly used for processing interrupts caused by the I/O devices, and each CPU has its own APIC (referred to as the local APIC of the CPU) mainly used for processing interrupt coordination among multiple CPUs. When the host CPU wishes to send an inter-core interrupt message to the target CPU, the interrupt vector and the target CPU's local APIC identifier are stored in its own local APIC Interrupt Command Register (ICR). The inter-core interrupt message is then sent to the local APIC of the target CPU via the APIC bus, where the local APIC is responsible for collecting the local interrupt request and the interrupt message sent from the outside, and then sending the interrupt message to the local CPU for processing.

In the disclosed embodiment, the interrupt handler function corresponding to the first inter-core interrupt message employs a do_nmi () function interface. The do_nmi () function interface is typically used to handle NMI interrupts. NMI (non-maskable interrupt ) interrupts are typically used to notify the operating system that unrecoverable hardware errors have occurred, including, for example, chip errors, memory ECC check errors, bus data corruption, and the like. On many x86/x86-64 types of hardware, the generation of "watchdog NMI interrupts (watchdog NMI interrupt)" may be triggered for debugging hard core locks. By periodically executing NMI interrupts, the kernel can monitor whether any CPU is locked, and if so, print out CPU kernel call stack information. All NMI interrupts have C entries that are do_nmi functions.

In general, the default do_nmi function first needs to determine if nmi_state is for 32-bit mode, then save the CR2 register value to nmi_cr2 and finally resume. This is because an NMI interrupt may preempt the page fault code, which in turn may trigger the page fault to cause the CR2 register value to change. The default do_nmi () function of the system calls an nmi_handle function to execute all registered NMI handles once, the nmi_handle function monitors the execution time of each Handler, and if the CPU is occupied for too long, calls an irq_work_queue function to print the debug information in irq context. During this process, the system is in kernel debug state (KDB mode), task processing is suspended, and system risks may occur during resume operation.

In the application, the function entry of the do_nmi function is utilized to realize that the kernel call stack information of the target processor can be queried without entering a KDB mode.

In step S21, when the target processor receives the inter-core interrupt message from the host processor, it is first determined whether the inter-core interrupt message is the agreed first inter-core interrupt message. Embodiments of the present disclosure distinguish between a first inter-core interrupt message for querying a core call stack and a second inter-core interrupt message based on a generally non-maskable interrupt event by a preset value of a query identification bit. The second inter-core interrupt message is triggered by the main processor in response to a preset event, wherein the preset event comprises at least one of a plurality of preset non-maskable interrupt events, such as a chip error, a memory ECC check error, bus data corruption and the like.

In one embodiment, the first inter-core interrupt message and the second inter-core interrupt message each include a query identification bit, the value of the query identification bit of the first inter-core interrupt message is a first value, and the value of the query identification bit of the second inter-core interrupt message is a second value. The first value may be, for example, 1 and the second value may be, for example, 0; alternatively, the first value may be True, for example, and the second value may be False, for example. The first value and the second value are only used for distinguishing different kinds of inter-core interrupt messages, and can be set by a person skilled in the art according to actual situations.

In another embodiment, if the target processor is provided with a query identification bit, the first inter-core interrupt message and the second inter-core interrupt message may be identical in form, with the query identification bit being provided in a preset address of the target processor. Before the user state program transmits the first inter-core interrupt message to inquire the core call stack information, firstly, the inquiry identification bit of the target processor is set to be a first value, and then the inter-core interrupt message is triggered through a normal flow. And after receiving the inter-core interrupt message, the target processor determines which task the current inter-core interrupt message corresponds to according to the value of the local query identification bit. This process corresponds to identifying heterogeneous inter-core interrupt messages.

In addition to the query identification bit, the first inter-core interrupt message may also include an interrupt descriptor. After receiving the first inter-core interrupt message, the local APIC of the target processor searches the interrupt VECTOR table to obtain an interrupt descriptor corresponding to the nmi_vector, and invokes an interrupt processing function in the interrupt descriptor to perform subsequent processing. In one embodiment of the present disclosure, the interrupt processing function corresponding to the first inter-core interrupt message may be a do_nmi function corresponding to the actions of steps S22 and S23. Unlike the default do_nmi function, the do_nmi function whose content is the operation corresponding to steps S22 and S23 only performs the operations shown in steps S22 and S23.

In step S22, the value of the preset register is obtained by the interrupt handling function, and the kernel call stack information is determined according to the value of the preset register. The preset register may be, for example, a pt_regs register.

In one embodiment of the present disclosure, step S22 may specifically be: and calling a stack_frame function according to the value of a preset register to acquire a stack frame bp pointer of the processor, and then calling a get_context_stack function according to the value of the bp pointer to acquire kernel call stack information.

After the kernel call stack information is determined, in step S23, the kernel call stack information is stored in a preset cache address, for example, a g_x86_cpu_info character array.

In this process, if the target processor receives a second inter-core interrupt message with the query identification bit of the second value, the response action to the first inter-core interrupt message is stopped in response to the second inter-core interrupt message from the main processor, and then a subsequent action is performed according to the second inter-core interrupt message. This may avoid losing the NMI interrupt on the target processor because the NMI interrupt on the target processor is not detectable and processable on other processors. In some cases, when an NMI interrupt handler processes multiple current NMI interrupt events, one of the events may be queued in the next NMI interrupt that would result in an unknown NMI interrupt if the event queued in the next NMI interrupt had been processed when the previous NMI interrupt event was processed. This class of events involving two NMI interrupts can therefore be marked as potential NMI interrupts, for preferential treatment.

Referring to fig. 3, a processor core call stack information query method 300 may include:

step S31, a preset inter-core interrupt instruction for checking the core call stack information of the target processor is generated in response to the standard command line instruction, so that the main processor sends a first inter-core interrupt message to the target processor in response to the preset inter-core interrupt instruction, wherein the first inter-core interrupt message comprises a query identification bit, and the value of the query identification bit of the first inter-core interrupt message is a first value;

and step 32, acquiring a value of a preset cache address after the preset time length, and outputting the kernel call stack information of the target processor according to the value of the preset cache address.

In the embodiment of the disclosure, a user can control the generation of the first inter-core interrupt message through a standard command line instruction, directly read the value of the preset buffer address after the preset duration, and print out the core call stack information of the target processor so as to know what service the target processor is processing. Wherein the standard command line instruction may include an identifier of the target processor that is desired to be viewed. The standard command line instruction may be, for example, executing a show cpu-stack (all|cpu-id) command under the developer's view to call a send_ipi_ interrupt (cpu) function executing in kernel mode through the system, which function is used to send the first inter-core interrupt message.

In one embodiment, the preset duration may be, for example, 50ms, so as to ensure completion of deduction and saving of the kernel call stack information, and avoid that the kernel call stack information is not deducted and completed due to too short time, and the value in the preset cache address is null.

Referring to fig. 4, a method 400 performed by a host processor may include:

step S41, a first inter-core interrupt message is sent to a target processor in response to a preset inter-core interrupt instruction from a user mode program, wherein the preset inter-core interrupt instruction is used for checking the kernel call stack information of the target processor, the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

step S42, the value of the preset cache address is returned in response to the preset cache address reading instruction from the user mode program.

The above-described method of the host processor is performed in kernel mode. The main processor sends the first inter-core interrupt message to the target processor, for example, by executing the send_ipi_ interrupt (cpu) function in kernel mode, making the local APIC bus execute APIC- > send_ipi_mask (cpu), nmi_vector, and sending the first inter-core interrupt message to the local APIC bus on the target processor.

In addition to initiating actions between the user mode program and the target processor, the host processor also sends a second inter-core interrupt message to the target processor in response to a preset event comprising at least one of a plurality of preset non-maskable interrupt events.

Referring to fig. 5, the interaction process of the user mode program, the main processor, and the target processor includes:

in step S51, the user mode receives a standard command line instruction and executes a show cpu-stack (all|cpu-id) command under the developer view.

In step S52, the main processor local APIC bus executes the APIC- > send_ipi_mask (cpu), nmi_vector function, by executing the send_ipi_ interrupt (cpu) function in kernel mode with the system call, and sends the first inter-core interrupt message to the local APIC bus on the target processor.

In step S53, the local APIC of the target processor receives the first inter-core interrupt message, searches the interrupt VECTOR table to obtain an interrupt descriptor corresponding to the nmi_vector interrupt VECTOR, and invokes an interrupt processing function in the interrupt descriptor to process. The interrupt handling function corresponding to nmi_vector is the do_nmi function.

In step S54, the target processor calls the stack_frame function according to the value of the pt_regs register to obtain the stack frame bp pointer of the current CPU, calls the get_context_stack function according to the value of the bp pointer to derive the kernel call stack information of the CPU, and stores the kernel call stack information into the g_x86_cpu_info character array.

In step S55, the user mode obtains the value of g_x86_cpu_info through system call, and prints out the kernel call stack information of the target processor.

In the embodiment shown in fig. 5, by using nmi_vector interrupt to enable the target processor to acquire the bp pointer of the current stack frame by using the pt_regs register in the do_nmi interrupt processing program, the memory call stack information of the target processor can be acquired without stopping the device, the system running risk and the processor work interrupt caused by entering the KDB environment are avoided, the efficiency of checking the processor core call stack information can be effectively improved, and the system security is improved.

Corresponding to the method embodiment, the disclosure further provides a processor core call stack information query device, which can be used for executing the method embodiment.

Referring to fig. 6, a processor core call stack information query apparatus 600 may include:

an interrupt function determination module 61 arranged to determine an interrupt handling function in response to a first inter-core interrupt message from the host processor, the first inter-core interrupt message comprising a query identification bit, the query identification bit of the first inter-core interrupt message being a first value;

a register reading module 62, configured to obtain a value of a preset register through the interrupt processing function, and determine kernel call stack information according to the value of the preset register;

the cache writing module 63 is configured to store the kernel call stack information in a preset cache address.

Since each function of the apparatus 600 is described in detail in the corresponding method embodiments, the disclosure is not repeated here.

In summary, in most current networking environments, it is necessary to look at the kernel call stack of some CPU when a problem occurs. In most cases, the KDB must be entered, but there is a risk in entering the KDB, so we need to obtain the kernel call stack information of the CPU without entering the KDB. Therefore, the method and the device for obtaining the core call stack information on the target CPU can be used for solving the problems of high CPU utilization rate, channel congestion and the like under the condition that equipment enters the KDB to stop running or flow stopping. In particular, the method comprises the steps of,

the invention provides a method for acquiring a kernel call stack of a target CPU by executing a related command in a user mode when KDB is not allowed to be used and the related problem of the CPU is required to be positioned in the running process of equipment. From the stack information it can be determined what traffic the CPU is handling. When the target CPU core call stack is deduced, the time consumption is short, so that the target CPU core call stack can respond to normal NMI interrupt or process the next request for obtaining the target CPU core call stack. A sleep interval of about 50ms is required to acquire the core call stack of the target CPU and display stack information in the user mode. The stack information is deduced and stored completely, so that the time is prevented from being too short, and the stack information is empty when the stack information is not deduced completely. First, using a standard command line in user state, a show CPU-stack (all|cpu-id) command is executed under developer view, send_ipi_ interrupt (CPU) is executed in kernel state by system call, and finally the local APIC bus executes APIC- > send_ipi_mask (CPU), nmi_vector, and the message is sent to the local APIC bus on the target CPU. And secondly, after receiving the interrupt signal, the local APIC of the target CPU searches an interrupt VECTOR table to further obtain an interrupt descriptor corresponding to the NMI_VECTOR interrupt VECTOR, and finally, an interrupt processing function in the interrupt descriptor is called for processing. The interrupt handling function corresponding to NMI_VECTOR is do_nmi. Further, the original do_nmi interface firstly judges the nmi_state state to determine whether the nmi_state is in a 32-bit mode, saves the value of the cr2 register to the nmi_cr2, restores the value after the processing is completed, and the default_do_nmi () calls nmi_handle () to execute all the NMI handers registered in advance once. Under the condition that the equipment normally operates, only the target CPU is enabled to enter an interrupt state briefly, so that the values of the nmi_state and the cr2 register are not required to be judged any more at the moment, the stack_frame is called to obtain the stack frame bp pointer of the current CPU only according to the values of the pt_regs register and the target CPU, the get_context_stack is called according to the bp value to deduce the kernel call stack information of the CPU, and the kernel call stack information is stored in the g_x86_cpu_info character array. Finally, the user mode obtains the value of g_x86_cpu_info through system call, and then prints out call stack information. Thus, the call stack information of the target cpu can be acquired without stopping the device. The present disclosure utilizes an interrupt handling mechanism of NMI, but the handling of the interrupt callback function of do_nmi is not the same. The original processing mode of do_nmi is automatically called after the system is trapped in kdb, and the system acquires a call stack by using a pt_regs register in do_nmi after sending an IPI interrupt to a target core under the condition of normal operation. The present disclosure thus uses nmi_vector interrupts to bring the target CPU into a transient non-running state, and in the do_nmi interrupt handler, uses the pt_regs register to obtain the current stack frame bp pointer. And the processing mode of the original NMI interrupt is separated from the processing mode of acquiring the current CPU core call stack by utilizing a switch, so that the NMI interrupt request of the equipment can be normally processed, and the current CPU can be acquired as the core call stack.

It should be noted that although in the above detailed description several modules or units of a device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit in accordance with embodiments of the present disclosure. Conversely, the features and functions of one module or unit described above may be further divided into a plurality of modules or units to be embodied.

In an exemplary embodiment of the present disclosure, an electronic device capable of implementing the above method is also provided.

Those skilled in the art will appreciate that the various aspects of the invention may be implemented as a system, method, or program product. Accordingly, aspects of the invention may be embodied in the following forms, namely: an entirely hardware embodiment, an entirely software embodiment (including firmware, micro-code, etc.) or an embodiment combining hardware and software aspects may be referred to herein as a "circuit," module "or" system.

An electronic device 700 according to this embodiment of the invention is described below with reference to fig. 7. The electronic device 700 shown in fig. 7 is merely an example, and should not be construed as limiting the functionality and scope of use of embodiments of the present invention.

As shown in fig. 7, the electronic device 700 is embodied in the form of a general purpose computing device. Components of electronic device 700 may include, but are not limited to: the at least one processing unit 710, the at least one memory unit 720, and a bus 730 connecting the different system components, including the memory unit 720 and the processing unit 710.

Wherein the storage unit stores program code that is executable by the processing unit 710 such that the processing unit 710 performs steps according to various exemplary embodiments of the present invention described in the above-mentioned "exemplary methods" section of the present specification. For example, the processing unit 710 may perform the methods as shown in the embodiments of the present disclosure.

The memory unit 720 may include readable media in the form of volatile memory units, such as Random Access Memory (RAM) 7201 and/or cache memory 7202, and may further include Read Only Memory (ROM) 7203.

The storage unit 720 may also include a program/utility 7204 having a set (at least one) of program modules 7205, such program modules 7205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment.

Bus 730 may be a bus representing one or more of several types of bus structures including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

The electronic device 700 may also communicate with one or more external devices 800 (e.g., keyboard, pointing device, bluetooth device, etc.), one or more devices that enable a user to interact with the electronic device 700, and/or any device (e.g., router, modem, etc.) that enables the electronic device 700 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 750. Also, electronic device 700 may communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN) and/or a public network, such as the Internet, through network adapter 760. As shown, network adapter 760 communicates with other modules of electronic device 700 over bus 730. It should be appreciated that although not shown, other hardware and/or software modules may be used in connection with electronic device 700, including, but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.

From the above description of embodiments, those skilled in the art will readily appreciate that the example embodiments described herein may be implemented in software, or may be implemented in software in combination with the necessary hardware. Thus, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (may be a CD-ROM, a U-disk, a mobile hard disk, etc.) or on a network, including several instructions to cause a computing device (may be a personal computer, a server, a terminal device, or a network device, etc.) to perform the method according to the embodiments of the present disclosure.

In an exemplary embodiment of the present disclosure, a computer-readable storage medium having stored thereon a program product capable of implementing the method described above in the present specification is also provided. In some possible embodiments, the various aspects of the invention may also be implemented in the form of a program product comprising program code for causing a terminal device to carry out the steps according to the various exemplary embodiments of the invention as described in the "exemplary methods" section of this specification, when said program product is run on the terminal device.

The program product for implementing the above-described method according to an embodiment of the present invention may employ a portable compact disc read-only memory (CD-ROM) and include program code, and may be run on a terminal device such as a personal computer. However, the program product of the present invention is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: an electrical connection having one or more wires, a portable disk, a hard disk, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

The computer readable signal medium may include a data signal propagated in baseband or as part of a carrier wave with readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Program code for carrying out operations of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).

Furthermore, the above-described drawings are only schematic illustrations of processes included in the method according to the exemplary embodiment of the present invention, and are not intended to be limiting. It will be readily appreciated that the processes shown in the above figures do not indicate or limit the temporal order of these processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, for example, among a plurality of modules.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A method of processor core call stack information query, performed by any one of a plurality of processors, comprising:

determining an interrupt handling function in response to a first inter-core interrupt message from a host processor, the first inter-core interrupt message including a query identification bit, the query identification bit of the first inter-core interrupt message being a first value;

acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register, wherein the method comprises the steps of acquiring a stack frame bp pointer of the processor according to a stack_frame function called by the value of the preset register and obtaining the kernel call stack information by calling a get_context_stack function according to the value of the bp pointer;

and storing the kernel call stack information in a preset cache address.

2. A method as defined in claim 1, wherein the interrupt handling function comprises a do_nmi function and the preset register comprises a pt_regs register.

3. The method of claim 2, wherein the default cache address comprises a g_x86_cpu_info array.

4. The method of claim 1, wherein the first inter-core interrupt message includes an interrupt descriptor, and determining an interrupt handling function from the first inter-core interrupt message comprises:

5. The method as recited in claim 1, further comprising:

6. A method for querying information of a processor core call stack, which is executed by a user mode program, comprising:

and acquiring a value of a preset cache address after a preset duration, and outputting kernel call stack information of the target processor according to the value of the preset cache address, wherein the method comprises the steps of acquiring a stack frame bp pointer of the processor according to a stack_frame function called by a value of a preset register, and obtaining the kernel call stack information by calling a get_context_stack function according to the value of the bp pointer.

7. A method for querying information of a call stack of a processor core, which is executed by a main processor, comprising:

transmitting a first inter-core interrupt message to a target processor in response to a preset inter-core interrupt instruction from a user mode program, wherein the preset inter-core interrupt instruction is used for checking kernel call stack information of the target processor, and comprises the steps of calling a stack_frame function according to a value of a preset register to obtain a stack frame bp pointer of the processor, and calling a get_context_stack function according to a value of the bp pointer to obtain the kernel call stack information, wherein the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

8. The method as recited in claim 7, further comprising:

9. A processor core call stack information query apparatus, comprising:

the register reading module is used for storing the kernel call stack information in a preset cache address, wherein the checking of the kernel call stack information comprises the steps of calling a stack_frame function according to the value of a preset register to obtain a stack frame bp pointer of the processor and calling a get_context_stack function according to the value of the bp pointer to obtain the kernel call stack information;