CN113821257A

CN113821257A - Processor kernel call stack information query method and device

Info

Publication number: CN113821257A
Application number: CN202111146841.XA
Authority: CN
Inventors: 范保平
Original assignee: Hangzhou DPTech Technologies Co Ltd
Current assignee: Hangzhou DPTech Technologies Co Ltd
Priority date: 2021-09-29
Filing date: 2021-09-29
Publication date: 2021-12-21
Anticipated expiration: 2041-09-29
Also published as: CN113821257B

Abstract

The disclosure relates to a processor kernel call stack information query method and device and electronic equipment. The method for inquiring the call stack information of the processor kernel comprises the following steps: responding a first inter-core interrupt message from a main processor to determine an interrupt processing function, wherein the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value; acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register; and storing the kernel call stack information in a preset cache address. The method and the device for acquiring the kernel call stack information of the target processor can acquire the kernel call stack information of the target processor without stopping the equipment.

Description

Processor kernel call stack information query method and device

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a processor core call stack information query method, apparatus, and electronic device.

Background

In the operation and maintenance process of a system with multiple processors, if a problem occurs in the system, the kernel call stack information of a certain target processor needs to be checked to determine whether the problem of high processor utilization rate or channel congestion occurs.

In the related art, it is generally necessary to bring the device into kernel debug mode (KDB) to stop running or to block off to view kernel call stack information on each processor to locate problems. In this process, there is a high probability of system operational risk caused by entering KDB mode.

Therefore, how to view the kernel call stack information of each processor under the condition of ensuring the normal operation of the system becomes an urgent problem to be solved in the field.

It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

The invention aims to provide a processor kernel call stack information query method, a processor kernel call stack information query device and electronic equipment, which are used for overcoming the problem that the operation risk of a system is caused by stopping the system when kernel call stack information is viewed due to the limitations and defects of the related art at least to a certain extent.

According to a first aspect of the embodiments of the present disclosure, there is provided a processor kernel call stack information query method, executed by any one of a plurality of processors, including: responding a first inter-core interrupt message from a main processor to determine an interrupt processing function, wherein the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value; acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register; and storing the kernel call stack information in a preset cache address.

In an exemplary embodiment of the present disclosure, the interrupt handling function includes a do _ nmi function, and the preset register includes a pt _ regs register.

In an exemplary embodiment of the present disclosure, the determining kernel call stack information according to the value of the preset register includes:

calling a stack _ frame function according to the value of the preset register to obtain a stack frame bp pointer of the processor;

and calling a get _ context _ stack function according to the value of the bp pointer to obtain the kernel call stack information.

In an exemplary embodiment of the present disclosure, the preset cache address includes a g _ x86_ cpu _ info character array.

In an exemplary embodiment of the disclosure, the first inter-core interrupt message includes an interrupt descriptor, and determining the interrupt handling function from the first inter-core interrupt message includes:

determining the interrupt handling function according to the interrupt descriptor.

In an exemplary embodiment of the present disclosure, further comprising:

responding to a second inter-core interrupt message from the main processor to stop a response action to the first inter-core interrupt message, wherein the second inter-core interrupt message is triggered by the main processor responding to a preset event, the preset event comprises at least one of a plurality of preset unmaskable interrupt events, the second inter-core interrupt message comprises a query identification bit, and the query identification bit of the second inter-core interrupt message is a second value;

and executing subsequent actions according to the second inter-core interrupt message.

According to a second aspect of the present disclosure, there is provided a processor core call stack information query method, executed by a user mode program, including:

responding to a standard command line instruction to generate a preset inter-core interrupt instruction for checking kernel call stack information of a target processor, so that a main processor responds to the preset inter-core interrupt instruction to send a first inter-core interrupt message to the target processor, wherein the first inter-core interrupt message comprises a query identification bit, and the value of the query identification bit of the first inter-core interrupt message is a first value;

and acquiring a value of a preset cache address after a preset time length, and outputting kernel call stack information of the target processor according to the value of the preset cache address.

According to a third aspect of the present disclosure, there is provided a processor core call stack information query method, executed by a host processor, including:

responding a preset inter-core interrupt instruction from a user mode program to send a first inter-core interrupt message to a target processor, wherein the preset inter-core interrupt instruction is used for checking kernel call stack information of the target processor, the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

and responding to a preset cache address reading instruction from the user mode program to return the value of the preset cache address.

In an exemplary embodiment of the present disclosure, further comprising:

and responding to a preset event to send a second inter-core interrupt message to the target processor, wherein the preset event comprises at least one of a plurality of preset unmaskable interrupt events, the second inter-core interrupt message comprises a query identification bit, and the query identification bit of the second inter-core interrupt message is a second value.

According to a fourth aspect of the embodiments of the present disclosure, there is provided an apparatus for querying processor core call stack information, including:

an interrupt function determining module configured to determine an interrupt processing function in response to a first inter-core interrupt message from a host processor, where the first inter-core interrupt message includes a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

the register reading module is set to acquire the value of a preset register through the interrupt processing function and determine kernel call stack information according to the value of the preset register;

and the cache writing module is set to store the kernel call stack information in a preset cache address.

According to a fifth aspect of the present disclosure, there is provided an electronic device comprising: a memory; and a processor coupled to the memory, the processor configured to perform the method of any of the above based on instructions stored in the memory.

According to a sixth aspect of the present disclosure, there is provided a computer-readable storage medium having stored thereon a program which, when executed by a processor, implements the processor core call stack information query method as described in any one of the above.

According to the method and the device, the first inter-core interrupt message processing logic is arranged on each processor, so that the processor can return the kernel call stack information without entering a kernel debugging mode, the system problem positioning efficiency can be effectively improved, and the system operation risk caused by problem positioning is reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty.

Fig. 1 is a schematic diagram of a system logic structure of an application of a processor kernel call stack information query method in an exemplary embodiment of the disclosure.

Fig. 2 is a flowchart of a processor core call stack information query method executed by any one of a plurality of processors in an exemplary embodiment of the present disclosure.

Fig. 3 is a flowchart of a processor core call stack information query method performed by a user mode program in an exemplary embodiment of the present disclosure.

Fig. 4 is a flowchart of a processor core call stack information query method performed by a host processor in an exemplary embodiment of the disclosure.

FIG. 5 is an interaction diagram in an embodiment of the disclosure.

Fig. 6 is a block diagram of a processor core call stack information query apparatus in an exemplary embodiment of the present disclosure.

Fig. 7 is a block diagram of an electronic device in an exemplary embodiment of the disclosure.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and the like. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the present disclosure.

Further, the drawings are merely schematic illustrations of the present disclosure, in which the same reference numerals denote the same or similar parts, and thus, a repetitive description thereof will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.

The following detailed description of exemplary embodiments of the disclosure refers to the accompanying drawings.

The method of the embodiment of the disclosure can be operated in a Linux system or other operating systems operating a multi-core processor.

Referring to fig. 1, the logical structure of the system 100 may include:

a user mode program 11 for providing a man-machine interaction function;

a main processor 12 for running the user mode program 11 and the kernel mode program;

and a plurality of processors 13, communicatively coupled to the main processor 12, for operating in response to instructions sent by the main processor 12.

The user mode program 11, the main processor 12, and the processor 13 are all logical concepts, and may run on one or more physical processors at the same time, and the main processor 12 and the processor 13 may also be referred to as a Virtual Central Processing Unit (VCPU). Wherein, a plurality of processors 13 can run on one or more Virtual Machines (VMs).

Referring to fig. 2, a method 200 performed by any of a plurality of processors may include:

step S21, determining an interrupt handling function in response to a first inter-core interrupt message from a main processor, where the first inter-core interrupt message includes a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

step S22, obtaining the value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register;

and step S23, storing the kernel call stack information in a preset cache address.

To understand the method 200, the inter-core interrupt message and interrupt handling functions are first introduced.

An Inter-Processor Interrupt (IPI) message is a message in which a main CPU sends an Interrupt signal to a target CPU in a system to cause the target CPU to execute a specific operation. The main CPU transmits an inter-processor Interrupt message (IPI) as a signal directly on an APIC (Advanced Programmable Interrupt Controller) bus without passing through an IRQ Interrupt line. The APIC on the mainboard is mainly used for processing interrupts caused by I/O devices, and each CPU has an own APIC (local APIC of the CPU) and is mainly used for processing interrupt coordination among multiple CPUs. When the master CPU wishes to send an inter-core interrupt message to the target CPU, the interrupt vector and the local APIC identifier of the target CPU are stored in its local APIC Interrupt Command Register (ICR). The inter-core interrupt message is then sent to the local APIC of the target CPU via the APIC bus, and the local APIC is responsible for collecting the local interrupt request and the externally sent interrupt message and sending the interrupt message to the local CPU for processing.

In the disclosed embodiment, the interrupt handler function corresponding to the first inter-core interrupt message employs a do _ nmi () function interface. The do _ NMI () function interface is typically used to handle NMI interrupts. NMI (non-maskable interrupt) interrupts are commonly used to notify the operating system of unrecoverable hardware errors, including, for example, chip errors, memory ECC check errors, bus data corruption, and the like. On many types of hardware, x86/x86-64, the generation of a "watchdog NMI interrupt" may be triggered for debugging hardmac locks. By periodically executing NMI interrupts, the kernel can monitor whether any CPU is locked and, if so, print out CPU kernel call stack information. All the C entries for NMI interrupts are do _ NMI functions.

In general, the default do _ nmi function first needs to determine if nmi _ state is for 32-bit mode, then save the value of the CR2 register to nmi _ CR2 and finally restore. This is because an NMI interrupt may preempt a page fault code, which in turn may trigger a page fault causing the value of the CR2 register to change. The default do _ NMI () function of the system calls NMI _ handle function to execute all registered NMI handlers (NMI handles) once, the NMI _ handle function monitors the execution time of each Handler, and if the CPU is occupied for too long time, the default do _ NMI () function calls irq _ word _ queue function to print the debugging information in irq context (interrupt text). In this process, the system is in a kernel debug state (KDB mode), task processing is suspended, and system risks may occur during the resume operation.

In the application, the function entry of the do _ nmi function is utilized to realize that the kernel call stack information of the target processor can be inquired without entering the KDB mode.

In step S21, when the target processor receives the inter-core interrupt message from the main processor, it is first determined whether the inter-core interrupt message is the first inter-core interrupt message in agreement. The embodiment of the disclosure distinguishes a first inter-core interrupt message for querying a kernel call stack and a second inter-core interrupt message based on a generally unmasked interrupt event by a preset value of a query identification bit. The second inter-core interrupt message is triggered by the main processor responding to a preset event, wherein the preset event comprises at least one of a plurality of preset unmasked interrupt events, such as a chip error, a memory ECC check error, bus data damage and the like.

In one embodiment, the first inter-core interrupt message and the second inter-core interrupt message each include a query identification bit, a value of the query identification bit of the first inter-core interrupt message is a first value, and a value of the query identification bit of the second inter-core interrupt message is a second value. The first value may be, for example, 1, and the second value may be, for example, 0; alternatively, the first value may be True, for example, and the second value may be False, for example. The first value and the second value are only used for distinguishing different kinds of inter-core interrupt messages, and can be set by a person skilled in the art according to actual conditions.

In another embodiment, the first inter-core interrupt message and the second inter-core interrupt message may be in the same form if the target processor is provided with the query flag, which is set in a preset address of the target processor. Before sending a first inter-core interrupt message to query kernel call stack information, a user mode program firstly sets a query identification bit of a target processor to be a first value, and then triggers the inter-core interrupt message through a normal flow. And after receiving the inter-core interrupt message, the target processor determines which task the current inter-core interrupt message corresponds to according to the value of the local query identification bit. This process amounts to identifying different kinds of inter-core interrupt messages.

In addition to querying the identification bits, the first inter-core interrupt message may also include an interrupt descriptor. After receiving the first inter-core interrupt message, the local APIC of the target processor searches an interrupt VECTOR table to obtain an interrupt descriptor corresponding to the NMI _ VECTOR, and invokes an interrupt processing function in the interrupt descriptor to perform subsequent processing. In an embodiment of the present disclosure, the interrupt processing function corresponding to the first inter-core interrupt message may be a do _ nmi function corresponding to the actions of steps S22 and S23. Unlike the default do _ nmi function, the do _ nmi function having the corresponding operation contents of steps S22 and S23 performs only the operations shown in steps S22 and S23.

In step S22, the value of the preset register is obtained by the interrupt processing function, and the kernel call stack information is determined according to the value of the preset register. The preset register may be, for example, a pt _ regs register.

In an embodiment of the present disclosure, step S22 may specifically be: and calling a stack _ frame function according to the value of a preset register to obtain a stack frame bp pointer of the processor, and then calling a get _ context _ stack function according to the value of the bp pointer to obtain kernel call stack information.

After determining the kernel call stack information, in step S23, the kernel call stack information is saved in a preset cache address, for example, a g _ x86_ cpu _ info character array.

In the process, if the target processor receives a second inter-core interrupt message of which the query identification bit is a second value, the response action of the second inter-core interrupt message from the main processor is stopped for the first inter-core interrupt message, and then the follow-up action is executed according to the second inter-core interrupt message. This avoids losing NMI interrupts on the target processor because NMI interrupts on the target processor are undetectable and processable on other processors. In some cases, when an NMI interrupt handler processes multiple current NMI interrupt events, one of which may be queued in a next NMI interrupt that will result in an unknown NMI interrupt if the event queued in the next NMI interrupt has been processed while the previous NMI interrupt event was processed. This class of events involving two NMI interrupts can therefore be marked as potential NMI interrupts, with priority for processing.

Referring to FIG. 3, a processor core call stack information query method 300 may include:

step S31, responding to the standard command line instruction to generate a preset inter-core interrupt instruction for checking the kernel call stack information of the target processor, so that the main processor responds to the preset inter-core interrupt instruction to send a first inter-core interrupt message to the target processor, wherein the first inter-core interrupt message comprises a query identification bit, and the value of the query identification bit of the first inter-core interrupt message is a first value;

step 32, obtaining a value of a preset cache address after a preset duration, and outputting kernel call stack information of the target processor according to the value of the preset cache address.

In the embodiment of the present disclosure, a user may control generation of an inter-core interrupt message through a standard command line instruction, and directly read a value of a preset cache address after a preset duration, and print out kernel call stack information of a target processor, so as to know what service is being processed by the target processor. Where the standard command line instructions may include an identifier of the target processor desired to be viewed. The standard command line instruction may be, for example, executing a show cpu-stack (all | cpu-id) command under a developer view to invoke, by the system, a send _ ipi _ interrupt (cpu) function executing in kernel mode to send a first inter-core interrupt message.

In one embodiment, the preset duration may be, for example, 50ms, so as to ensure that the derivation and saving of the kernel call stack information is completed, and avoid that the derivation of the kernel call stack information is not completed due to too short time and the value in the preset cache address is empty.

Referring to fig. 4, a method 400 performed by a host processor may include:

step S41, responding to a preset inter-core interrupt instruction from a user mode program to send a first inter-core interrupt message to a target processor, wherein the preset inter-core interrupt instruction is used for checking the kernel call stack information of the target processor, the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

in step S42, the value of the preset cache address is returned in response to the preset cache address read instruction from the user mode program.

The above method of the host processor is performed in kernel mode. The way that the host processor sends the first inter-core interrupt message to the target processor is, for example, to execute a send _ IPI _ interrupt (cpu) function in a kernel mode, so that the local APIC bus executes APIC- > send _ IPI _ mask (cpu _ of (cpu), NMI _ VECTOR), and the first inter-core interrupt message is sent to the local APIC bus on the target processor.

In addition to invoking actions between the user mode program and the target processor, the main processor also sends a second inter-core interrupt message to the target processor in response to a preset event, wherein the preset event comprises at least one of a plurality of preset unmaskable interrupt events.

FIG. 5 is an interaction diagram in an embodiment of the disclosure.

Referring to fig. 5, the interactive process of the user mode program, the main processor and the target processor includes:

in step S51, the user mode receives the standard command line instruction and executes the show cpu-stack (all | cpu-id) command under the developer view.

Step S52, the main processor local APIC bus executes APIC- > send _ IPI _ mask (cpu _ of (cpu), NMI _ VECTOR) function by calling the send _ IPI _ interrupt (cpu) function in kernel mode, and sends the first inter-core interrupt message to the local APIC bus on the target processor.

Step S53, the local APIC of the target processor receives the first inter-core interrupt message, searches the interrupt VECTOR table to obtain an interrupt descriptor corresponding to the NMI _ VECTOR interrupt VECTOR, and invokes an interrupt handling function in the interrupt descriptor to process. The interrupt handling function for NMI _ VECTOR is the do _ NMI function.

Step S54, the target processor calls the stack _ frame function according to the value of the pt _ regs register to obtain the stack frame bp pointer of the current CPU, calls the get _ context _ stack function according to the bp pointer value to derive the kernel calling stack information of the CPU, and stores the kernel calling stack information into the g _ x86_ CPU _ info character array.

In step S55, the user mode obtains the value of g _ x86_ cpu _ info through system call, and prints out kernel call stack information of the target processor.

In the embodiment shown in fig. 5, the NMI _ VECTOR interrupt is used to enable the target processor to obtain the current stack frame bp pointer by using the pt _ regs register in the do _ NMI interrupt handler, so that the memory call stack information of the target processor can be obtained on the premise of not stopping the device from running, the system running risk and the processor work interrupt caused by entering the KDB environment are avoided, the efficiency of checking the processor kernel call stack information can be effectively improved, and the system security is improved.

Corresponding to the above method embodiment, the present disclosure further provides a device for querying information of a call stack of a processor core, which may be used to execute the above method embodiment.

Referring to fig. 6, the processor core call stack information query apparatus 600 may include:

an interrupt function determining module 61, configured to determine an interrupt processing function in response to a first inter-core interrupt message from a host processor, where the first inter-core interrupt message includes a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

the register reading module 62 is configured to obtain a value of a preset register through the interrupt processing function, and determine kernel call stack information according to the value of the preset register;

and the cache writing module 63 is configured to store the kernel call stack information in a preset cache address.

Since the functions of the apparatus 600 have been described in detail in the corresponding method embodiments, the disclosure is not repeated herein.

In summary, in most current networking environments, it is necessary to look at the kernel call stack of a certain CPU when a problem arises. In most cases, the KDB is required to be entered, and the entering of the KDB has risks, so that the kernel call stack information of the CPU can be acquired without entering the KDB. Therefore, the method and the device aim to acquire the kernel call stack information on the target CPU under the condition that the device does not enter KDB to stop running or cut off, and can solve the problems of high CPU utilization rate or channel congestion and the like. In particular, the method of manufacturing a semiconductor device,

the invention provides a method for acquiring a kernel call stack of a target CPU by executing a relevant command in a user mode when KDB is not allowed to be used and the relevant problems of the CPU need to be positioned in the running process of equipment. It can be determined by the stack information what traffic the CPU is processing. And when the target CPU kernel call stack is deduced, the consumed time is short, so that the target CPU kernel call stack can respond to normal NMI interruption or process the next target CPU kernel call stack acquisition request. A sleep interval of about 50ms is required to acquire the kernel call stack of the target CPU and display stack information in a user mode. The stack information is guaranteed to be deduced and stored completely, and the situation that the stack information is not deduced completely due to too short time is avoided, so that the stack information seen by a user is empty. First, using the standard command line in user mode, execute the show CPU-stack (all | CPU-id) command under the developer view, execute send _ IPI _ interrupt (CPU) in kernel mode through system call, finally local APIC bus executes APIC- > send _ IPI _ mask (CPU _ of (CPU), NMI _ VECTOR), sends the message to local APIC bus on target CPU. Secondly, after receiving the interrupt signal, the local APIC of the target CPU searches the interrupt VECTOR table to obtain an interrupt descriptor corresponding to the NMI _ VECTOR interrupt VECTOR, and finally invokes an interrupt processing function in the interrupt descriptor for processing. The interrupt handling function for NMI _ VECTOR is do _ NMI. Further, the original do _ NMI interface firstly judges the NMI _ state to determine whether the interface is in a 32-bit mode, stores the value of the cr2 register to NMI _ cr2 for recovery after the completion of the processing, and then defaults _ do _ NMI () calls NMI _ handle () to execute all the NMI handlers registered in advance once. Under the condition that the equipment normally operates, the target CPU is only enabled to enter an interrupt state temporarily, so that the nmi _ state does not need to be judged and the value of the cr2 register is not needed to be saved, only the stack _ frame needs to be called to obtain a stack frame bp pointer of the current CPU according to the value of the pt _ regs register and the target CPU, the get _ context _ stack is called according to the bp value to derive kernel calling stack information of the CPU, and the kernel calling stack information is saved into a g _ x86_ CPU _ info character array. Finally, the user mode obtains the value of g _ x86_ cpu _ info through system call, and then prints out the call stack information. Thus, the call stack information of the target cpu can be acquired without stopping the device from running. The present disclosure utilizes the interrupt handling mechanism of NMI, but does not handle the interrupt callback function of do _ NMI in the same way. The original do _ nmi processing mode is automatically called after the system is trapped in kdb, and after the IPI interruption is sent to the target core under the condition of normal operation, the call stack is acquired in do _ nmi by using the pt _ regs register. Therefore, the present disclosure uses the NMI _ VECTOR interrupt to make the target CPU enter a transient non-running state, and uses the pt _ regs register to obtain the bp pointer of the current stacked frame in the do _ NMI interrupt handler. And the processing mode of the original NMI interrupt is separated from the processing mode of acquiring the current CPU kernel call stack by using the switch, so that the NMI interrupt request of the equipment can be normally processed, and the current CPU kernel call stack can be acquired.

It should be noted that although in the above detailed description several modules or units of the device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the present disclosure. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.

In an exemplary embodiment of the present disclosure, an electronic device capable of implementing the above method is also provided.

As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or program product. Thus, various aspects of the invention may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.

An electronic device 700 according to this embodiment of the invention is described below with reference to fig. 7. The electronic device 700 shown in fig. 7 is only an example and should not bring any limitation to the functions and the scope of use of the embodiments of the present invention.

As shown in fig. 7, electronic device 700 is embodied in the form of a general purpose computing device. The components of the electronic device 700 may include, but are not limited to: the at least one processing unit 710, the at least one memory unit 720, and a bus 730 that couples various system components including the memory unit 720 and the processing unit 710.

Wherein the storage unit stores program code that is executable by the processing unit 710 such that the processing unit 710 performs the steps according to various exemplary embodiments of the present invention as described in the above section "exemplary method" of the present specification. For example, the processing unit 710 may perform a method as shown in the embodiments of the present disclosure.

The storage unit 720 may include readable media in the form of volatile memory units, such as a random access memory unit (RAM)7201 and/or a cache memory unit 7202, and may further include a read only memory unit (ROM) 7203.

The storage unit 720 may also include a program/utility 7204 having a set (at least one) of program modules 7205, such program modules 7205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.

Bus 730 may be any representation of one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

The electronic device 700 may also communicate with one or more external devices 800 (e.g., keyboard, pointing device, bluetooth device, etc.), with one or more devices that enable a user to interact with the electronic device 700, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 700 to communicate with one or more other computing devices. Such communication may occur via an input/output (I/O) interface 750. Also, the electronic device 700 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network such as the internet) via the network adapter 760. As shown, the network adapter 760 communicates with the other modules of the electronic device 700 via the bus 730. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in conjunction with the electronic device 700, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.

Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.

In an exemplary embodiment of the present disclosure, there is also provided a computer-readable storage medium having stored thereon a program product capable of implementing the above-described method of the present specification. In some possible embodiments, aspects of the invention may also be implemented in the form of a program product comprising program code means for causing a terminal device to carry out the steps according to various exemplary embodiments of the invention described in the above section "exemplary methods" of the present description, when said program product is run on the terminal device.

The program product for implementing the above method according to an embodiment of the present invention may employ a portable compact disc read only memory (CD-ROM) and include program codes, and may be run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited in this regard and, in the present document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

A computer readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., through the internet using an internet service provider).

Furthermore, the above-described figures are merely schematic illustrations of processes involved in methods according to exemplary embodiments of the invention, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A processor core call stack information query method, executed by any one of a plurality of processors, comprising:

responding a first inter-core interrupt message from a main processor to determine an interrupt processing function, wherein the first inter-core interrupt message comprises a query identification bit, and the query identification bit of the first inter-core interrupt message is a first value;

acquiring a value of a preset register through the interrupt processing function, and determining kernel call stack information according to the value of the preset register;

and storing the kernel call stack information in a preset cache address.

2. The method of claim 1, wherein the interrupt handling function comprises a do _ nmi function and the preset register comprises a pt _ regs register.

3. The method of claim 2, wherein said determining kernel call stack information from the value of the preset register comprises:

4. The method as claimed in claim 2 or 3, wherein the predetermined buffer address comprises a g _ x86_ cpu _ info character array.

5. The method of claim 1, wherein the first inter-core interrupt message includes an interrupt descriptor, and wherein determining an interrupt handling function from the first inter-core interrupt message comprises:

6. The method of claim 1, further comprising:

7. A method for inquiring processor kernel call stack information is characterized in that the method is executed by a user mode program and comprises the following steps:

8. A method for querying information of a call stack in a processor core, which is executed by a main processor, comprises the following steps:

9. The method of claim 8, further comprising:

10. An apparatus for querying information of a call stack in a processor core, comprising:

the register reading module is used for storing the kernel call stack information in a preset cache address;