CN113810147B - Multi-channel ultrasonic flaw detector synchronization and data transmission device and control method - Google Patents

Multi-channel ultrasonic flaw detector synchronization and data transmission device and control method Download PDF

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CN113810147B
CN113810147B CN202111093941.0A CN202111093941A CN113810147B CN 113810147 B CN113810147 B CN 113810147B CN 202111093941 A CN202111093941 A CN 202111093941A CN 113810147 B CN113810147 B CN 113810147B
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data
channel
information stream
control
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CN113810147A (en
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刘斌
林歆博
郭大勇
杨春垒
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Allrising Beijing Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N29/00Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
    • G01N29/04Analysing solids
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N29/00Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
    • G01N29/22Details, e.g. general constructional or apparatus details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • Life Sciences & Earth Sciences (AREA)
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  • General Health & Medical Sciences (AREA)
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  • Acoustics & Sound (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)

Abstract

The invention provides a synchronization and data transmission device and a control method of a multichannel ultrasonic flaw detector, comprising the following steps: the probe, the transmitting circuit and the receiving amplifying circuit are connected to the channel control circuit, the receiving amplifying circuit and the channel control circuit are connected to the multiplexing circuit, the multiplexing circuit is connected to the digital-to-analog conversion circuit through the data acquisition line, the channel control circuit is connected to the control unit through the control bus, the digital-to-analog conversion circuit is connected to the control unit, and the control unit is connected to the flaw detector CPU and the bus interface circuit. The synchronization and data transmission device and the control method of the multichannel ultrasonic flaw detector realize one-to-many control with high bandwidth and high-precision synchronization of the multichannel, have high data throughput, and can finish a large amount of data transmission work in a short time.

Description

Multi-channel ultrasonic flaw detector synchronization and data transmission device and control method
Technical Field
The invention relates to the technical field of industrial ultrasonic flaw detection and measurement, in particular to a multi-channel ultrasonic flaw detector synchronization and data transmission device and a control method.
Background
The multi-channel ultrasonic flaw detector is widely applied to industrial automatic ultrasonic flaw detection. Conventional multi-channel ultrasonic flaw detectors typically require the use of multiple signal lines to achieve transmission of synchronization signals, control signals, and ultrasonic signals. The control signal line is mainly used for controlling multi-channel switching and setting pre-amplification parameters. The number of control signal lines is directly related to the number of channels and the number of pre-amplification stages. In the prior art, some flaw detectors transmit synchronous signals, control signals and ultrasonic signals by adopting a single-wire transmission signal technology, but in many cases, the single-wire transmission data throughput can not meet the requirements far under the influence of parallel operation of channels. For example, in a flaw detection system for medium steel plates, the highest sampling repetition frequency is required to be 8KHz, hundreds of channels need to be subjected to flaw detection simultaneously, real-time control is also required, and a large amount of data transmission work cannot be completed in a short time by single line transmission. Therefore, it is necessary to design a synchronization and data transmission device and control method for a multi-channel ultrasonic flaw detector.
Disclosure of Invention
The invention aims to provide a synchronization and data transmission device and a control method of a multichannel ultrasonic flaw detector, which realize one-to-many control with high bandwidth and high-precision synchronization of multiple channels, have high data throughput and can finish a large amount of data transmission work in a short time.
In order to achieve the above object, the present invention provides the following solutions:
a multi-channel ultrasonic flaw detector synchronization and data transmission device, comprising: the probe is connected with the front-end circuit, and the front-end circuit is connected with the rear-end circuit through the transmission line;
the transmission line comprises a control bus and a data acquisition line;
the front-end circuit comprises a multiplexing circuit, a first PHY circuit, a channel control circuit, a plurality of groups of transmitting circuits and receiving amplifying circuits, the probe is connected with the transmitting circuits and the receiving amplifying circuits, the transmitting circuits and the receiving amplifying circuits are connected with the channel control circuit, the receiving amplifying circuits and the channel control circuits are connected with the multiplexing circuit, the channel control circuit is connected with the first PHY circuit, the first PHY circuit is connected with the rear-end circuit through a control bus, and the multiplexing circuit is connected with the rear-end circuit through the data acquisition line;
the back-end circuit comprises a digital-to-analog conversion circuit, a control unit, a second PHY circuit, a flaw detector CPU and a bus interface circuit, wherein the multiplexing circuit is connected with the digital-to-analog conversion circuit through the data acquisition line, the first PHY circuit is connected with the second PHY circuit through a control bus, the second PHY circuit and the digital-to-analog conversion circuit are connected with the control unit, and the control unit is connected with the flaw detector CPU and the bus interface circuit.
Optionally, the channel control circuit is an FPGA or a microcontroller, the control unit is an FPGA or a microcontroller, and the data acquisition line is a radio frequency analog signal transmission line.
The invention also provides a method for controlling the synchronization and data transmission of the multi-channel ultrasonic flaw detector, which is applied to the synchronization and data transmission device of the multi-channel ultrasonic flaw detector, and is characterized by comprising the following steps:
step 1: the control unit encodes the synchronous signal and the control signal to obtain an encoded information stream, the encoded information stream is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and the high-precision clock is obtained through the CDR technology;
step 2: the channel control circuit simultaneously controls the multi-channel transmitting circuit, the receiving amplifying circuit and the multiplexing circuit according to the decoded information flow, the multi-channel transmitting circuit transmits excitation signals to the probes in parallel, the probes transmit ultrasonic signals in parallel, the multi-channel receiving amplifying circuit receives ultrasonic echoes in parallel, and the amplified ultrasonic echo signals are input into the digital-to-analog conversion circuit through the data acquisition line with the assistance of the multiplexing circuit;
step 3: the digital-to-analog conversion circuit converts the ultrasonic echo signal into a digital signal and sends the digital signal to the control unit, and the control unit reads and processes the data and sends the processed data to the flaw detector CPU and the bus interface circuit.
Optionally, in step 1, the encoded information stream is transmitted to the channel control circuit by using the control bus through the ethernet transmission protocol, specifically:
the control unit transmits the encoded information stream to the data link layer of the back-end circuit, the data link layer of the back-end circuit transmits the encoded information stream to the physical layer of the back-end circuit, the physical layer of the back-end circuit transmits the encoded information stream to the physical layer of the front-end circuit via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
Optionally, the physical layer of the back-end circuit transmits the encoded information stream to all the physical layers of the front-end circuit via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
Optionally, the physical layer of the back-end circuit transmits the encoded information stream to the physical layer of one or more front-end circuits via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit, and after the transmission is completed, the front-end circuit forwards the encoded information stream to other front-end circuits which do not receive the encoded information stream in a data copy mode.
Optionally, in step 1, the encoded information stream is transmitted to the channel control circuit by using the control bus through the ethernet transmission protocol, specifically:
the control unit directly carries out circuit connection with the channel control circuit by using the MAC protocol, the control unit transmits the coded information stream to the channel control circuit through the control bus, and the channel control circuit forwards the coded information stream to other channel control circuits in a data copying mode.
Optionally, in step 1, the control unit encodes the control signal to obtain an encoded information stream, and transmits the encoded information stream to the channel control circuit by using the control bus through the ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and obtains a high-precision clock through the CDR technology, specifically:
the control unit detects that control data need to be sent, sequentially performs transmission control according to the priority of data transmission, encodes the data to be transmitted into an MAC frame, wherein the data field of the MAC frame is divided into three parts, namely a data type field, a data length field and the data field to be transmitted, after the encoding is completed, the MAC frame is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the MAC frame, and data distribution is performed according to the data type field.
Optionally, in step 1, the control unit encodes the synchronization signal to obtain an encoded information stream, and transmits the encoded information stream to the channel control circuit by using the control bus through the ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and obtains a high-precision clock through the CDR technology, specifically:
the control unit acquires synchronous data of the time service system, encodes the synchronous data into an MAC frame, the MAC frame is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the MAC frame, the synchronous data is provided, the first PHY circuit and the second PHY circuit are used for obtaining a high-precision clock through a CDR technology, the channel control circuit obtains the self synchronous state according to the synchronous data according to the high-precision clock and corrects the synchronous state according to the synchronous data, the synchronous state is kept consistent with the control unit, and the control unit circularly executes a synchronous flow, so that the channel control circuit continuously corrects the self synchronous state.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects: the invention provides a multi-channel ultrasonic flaw detector synchronization and data transmission device and a control method, which can realize one-to-many control with high bandwidth and high precision synchronization of multiple channels, wherein the device comprises a back-end circuit, a transmission line, a plurality of front-end circuits and a probe, wherein the front-end circuit and the back-end circuit are in modularized design, the function expansion capability is strong, the front-end circuit comprises a multiplexing circuit, a channel control circuit, a plurality of groups of transmitting circuits and receiving amplifying circuits, the back-end circuit comprises a digital-to-analog conversion circuit, a control unit, a flaw detector CPU and a bus interface circuit, the control unit and the channel control circuit can carry a self-defined communication protocol to finish data interaction on a data link layer, and can also directly carry out circuit connection by using a MAC protocol to finish data interaction; the device can form a more complex topological structure, enhances the expansion capacity and data throughput of the multichannel ultrasonic flaw detection system, and simultaneously provides solid guarantee for the time-sharing multiplexing function of the system; the control method comprises the steps that a control unit encodes a synchronous signal and a control signal to obtain an encoded information stream, the encoded information stream is transmitted to a channel control circuit through an Ethernet transmission protocol by using a control bus, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, the channel control circuit simultaneously controls a multi-channel transmitting circuit, a receiving amplifying circuit and a multiplexing circuit transmitting circuit according to the decoded information stream, the probe transmits an excitation signal to a probe, the probe transmits an ultrasonic wave signal, the receiving amplifying circuit receives an ultrasonic wave echo, the amplified ultrasonic wave echo signal is input into a digital-to-analog conversion circuit through a data acquisition line with the assistance of the multiplexing circuit, the digital-to-analog conversion circuit converts the ultrasonic wave echo signal into a digital signal and transmits the digital signal to a control unit, the control unit reads the data and processes the digital signal and transmits the digital signal to a flaw detector CPU and a bus interface circuit after the processing is finished, the synchronous signal is transmitted to other front-end circuits, the front-end circuits decode the digital synchronous signal and apply the digital synchronous signal to a timing system of the probe for equipment synchronization, and compared with the traditional synchronous pulse excitation signal synchronization method, the synchronous signal is not only reduced, but the jitter precision of the synchronous signal is greatly improved; in the method, the control unit is in an active working state, the channel control circuit is in a passive working state, the control signals of the channels are transmitted only by the control bus, and are isolated from each other and do not interfere with the data acquisition lines for transmitting analog signals, so that the method is particularly suitable for the conditions of large number of channels, long propagation distance and high requirement on parallel operation of the channels.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a synchronization and data transmission device of a multi-channel ultrasonic flaw detector according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for synchronizing and transmitting data of a multi-channel ultrasonic flaw detector according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of data transmission between an Ethernet transmission protocol implementation control unit and a channel control circuit;
FIG. 4 is a schematic diagram of data transmission of a control unit and a channel control circuit implemented with a MAC protocol;
FIG. 5 is a schematic diagram showing the expansion structure of the synchronization and data transmission device of the multi-channel ultrasonic flaw detector according to the embodiment of the invention;
fig. 6 is a schematic diagram of a data domain structure of a MAC frame.
Reference numerals: 1. a probe; 2. a transmitting circuit; 3. a receiving amplifying circuit; 4. a channel control circuit; 5. a multiplexing circuit; 6. a first PHY circuit; 7. a radio frequency analog signal transmission line; 8. a control bus; 9. a digital-to-analog conversion circuit; 10. a second PHY circuit; 11. a control unit; 12. a flaw detector CPU and a bus interface circuit; 13. a front-end circuit; 14. a back-end circuit; 15. a data link layer; 16. a physical layer; 17. a data type field; 18. a data length field; 19. the data field is to be transmitted.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention aims to provide a synchronization and data transmission device and a control method of a multichannel ultrasonic flaw detector, which realize one-to-many control with high bandwidth and high-precision synchronization of multiple channels, have high data throughput and can finish a large amount of data transmission work in a short time.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
As shown in fig. 1, a multi-channel ultrasonic flaw detector synchronization and data transmission device provided by an embodiment of the present invention includes: a back-end circuit 14, a transmission line, a plurality of front-end circuits 13, and a probe 1, wherein the probe 1 is connected to the front-end circuit 11, and the front-end circuit 11 is connected to the back-end circuit 12 through the transmission line;
the front-end circuit 13 comprises a multiplexing circuit 5, a first PHY circuit 6, a channel control circuit 4, a plurality of groups of transmitting circuits 2 and receiving amplifying circuits 3, the probe 1 is connected with the transmitting circuits 2 and the receiving amplifying circuits 3, the transmitting circuits 2 and the receiving amplifying circuits 3 are connected with the channel control circuit 4, the receiving amplifying circuits 3 and the channel control circuit 4 are connected with the multiplexing circuit 5, the channel control circuit 4 is connected with the first PHY circuit 6, the first PHY circuit 6 is connected with the rear-end circuit 14 through a control bus 8, and the multiplexing circuit 5 is connected with the rear-end circuit 14 through the data acquisition line;
the back-end circuit 14 comprises a digital-to-analog conversion circuit 9, a control unit 11, a second PHY circuit 10, a flaw detector CPU and a bus interface circuit 12, the multiplexing circuit 5 is connected with the digital-to-analog conversion circuit 9 through the data acquisition line, the first PHY circuit 6 is connected with the second PHY circuit 10 through the control bus 8, the second PHY circuit 10 and the digital-to-analog conversion circuit 9 are connected with the control unit 11, and the control unit 11 is connected with the flaw detector CPU and the bus interface circuit 12.
The number of the probes 1 corresponds to the number of the transmitting circuits 2 and the receiving and amplifying circuits 3, the number of the transmitting circuits 2 and the receiving and amplifying circuits 3 is set according to specific requirements, and the number of the front-end circuits 13 is set according to the requirements.
The channel control circuit 4 is an FPGA or a microcontroller, the control unit 11 is an FPGA or a microcontroller, and the data acquisition line is a radio frequency analog signal transmission line 7.
The first PHY circuit and the second PHY circuit output control signals, and a high-precision clock can be obtained by using a CDR technology.
As shown in fig. 2, the invention also provides a method for controlling synchronization and data transmission of the multi-channel ultrasonic flaw detector, which comprises the following steps:
step 1: the control unit encodes the synchronous signal and the control signal to obtain an encoded information stream, the encoded information stream is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and the high-precision clock is obtained through the CDR technology;
step 2: the channel control circuit simultaneously controls the multipath transmitting circuit, the receiving and amplifying circuit and the multiplexing circuit according to the decoded information flow, the multipath transmitting circuit transmits excitation signals to the probes in parallel, piezoelectric wafers are arranged on the probes, under the action of the excitation signals, the probes transmit ultrasonic signals in parallel, the multipath receiving and amplifying circuit receives ultrasonic echoes in parallel, and the amplified ultrasonic echo signals are input into the digital-to-analog conversion circuit through the data acquisition line with the assistance of the multiplexing circuit;
step 3: the digital-to-analog conversion circuit converts the ultrasonic echo signal into a digital signal and sends the digital signal to the control unit, and the control unit reads and processes the data and sends the processed data to the flaw detector CPU and the bus interface circuit.
In a first embodiment, in step 1, a method for transmitting a coded information stream to a channel control circuit by using a control bus through an ethernet transmission protocol includes:
as shown in fig. 3, the control bus performs data transmission by using a mature ethernet transmission protocol, a custom communication protocol is carried to interact with data on a data link layer, the control unit transmits the encoded information stream to the data link layer of the back-end circuit, the data link layer of the back-end circuit transmits the encoded information stream to the physical layer of the back-end circuit, the physical layer of the back-end circuit transmits the encoded information stream to the physical layer of the front-end circuit via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
Two methods exist for obtaining the coded information stream by the multipath front-end circuit, one is: the physical layer of the back-end circuit transmits the encoded information stream to the physical layers of all the front-end circuits via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
The other is: the physical layer of the back-end circuit transmits the coded information stream to the physical layer of one or more front-end circuits through the control bus, the physical layer of the front-end circuit transmits the coded information stream to the data link layer of the front-end circuit, the data link layer of the front-end circuit transmits the coded information stream to the channel control circuit, and after the transmission is finished, the front-end circuit forwards the coded information stream to other front-end circuits which do not receive the coded information stream in a data copying mode.
In the second embodiment, in step 1, another method for transmitting the encoded information stream to the channel control circuit by using the control bus through the ethernet transmission protocol is as follows:
as shown in fig. 4, with the advantage of ethernet layered transmission, the data transmission is not only based on 1000BASE-X optical fiber transmission and 1000BASE-T twisted pair transmission, but the control unit may also directly perform circuit connection with the channel control circuit by using the MAC protocol, and the control unit transmits the encoded information stream to the channel control circuit through the control bus, where the control unit may transmit the encoded information stream to the channel control circuits of all front-end circuits, or may transmit the encoded information stream to one or more channel control circuits, and the channel control circuits forwards the encoded information stream to other channel control circuits in a data replication manner.
Through the above data transmission scheme, the synchronization and data transmission device of the multi-channel ultrasonic flaw detector can form a more complex topological structure, for example, as shown in fig. 5, in one embodiment of the invention, the control unit of the back-end circuit is connected with the channel control circuits of the three front-end circuits, the channel control circuit of one front-end circuit is connected with the channel control circuit of the new front-end circuit, and the channel control circuit of the new front-end circuit is connected with the channel control circuit of the other new front-end circuit.
In the data transmission control, in step 1, a control unit encodes a control signal to obtain an encoded information stream, and transmits the encoded information stream to a channel control circuit by using a control bus through an ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and a high-precision clock is obtained through a CDR technology, specifically:
the control unit detects that control data needs to be sent, sequentially performs transmission control according to the priority of data transmission, encodes the data to be transmitted into an MAC frame, as shown in fig. 6, where the data field of the MAC frame is divided into three parts, namely a data type field 17, a data length field 18 and a data field 19 to be transmitted, after the encoding is completed, the MAC frame is transmitted to a channel control circuit by using a control bus through an ethernet transmission protocol, and the channel control circuit decodes the MAC frame and performs data distribution according to the data type field.
In the synchronous control, in step 1, a control unit encodes a synchronous signal to obtain an encoded information stream, and transmits the encoded information stream to a channel control circuit by using a control bus through an ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and a high-precision clock is obtained through a CDR technology, specifically:
the control unit acquires and digitizes the synchronizing signal of the time service system to obtain synchronizing data, codes the synchronizing signal into an MAC frame, transmits the MAC frame to the channel control circuit by using the control bus through the Ethernet transmission protocol, decodes the MAC frame by the channel control circuit, puts forward the synchronizing data, and obtains a high-precision clock by using the first PHY circuit and the second PHY circuit through the CDR technology, the channel control circuit obtains the self synchronizing state according to the synchronizing data and corrects the self synchronizing state according to the high-precision clock, so that the synchronous state is consistent with the control unit, and the control unit circularly executes the synchronizing flow to enable the channel control circuit to continuously correct the self synchronizing state.
One embodiment of the invention is: when the control signal is transmitted, the RGMII transmission protocol is adopted to transmit data, the control unit detects that the control signal needs to be transmitted, the control signal is converted into control data through the digital-to-analog conversion circuit, transmission control is sequentially carried out according to the priority of data transmission, the data to be transmitted is encoded into an MAC frame, wherein the data field of the MAC frame is divided into three parts, namely a data type field, a data length field and the data field to be transmitted, the MAC frame is transmitted through the RGMII transmission protocol, and the rear end circuit of the embodiment is not provided with a physical layer module, the data is transmitted into the channel control circuit of the front end circuit in a direct connection mode, the channel control circuit decodes the MAC frame, and data distribution is carried out according to the data type field obtained after decoding, so that the data transmission work is completed.
The most important is synchronous control in multichannel control, the method adopts the form of digitizing the synchronous signals for transmission, and by means of the data communication mode, the back-end circuit transmits the synchronous signals to other front-end circuits, the front-end circuit decodes the digitized synchronous signals and applies the digital synchronous signals to a self timing system for equipment synchronization, and compared with the traditional method of synchronizing pulse excitation signals, the method not only reduces the need of synchronous signal lines, but also greatly improves the jitter precision of the synchronous signals, and particularly comprises the following steps:
the control unit obtains the synchronous signal of the time service system, digitizes the synchronous signal to obtain synchronous data, encodes the synchronous data into an MAC frame, transmits the MAC frame to the channel control circuit by utilizing the RGMII transmission protocol by utilizing the control bus, decodes the MAC frame by the channel control circuit, provides synchronous data, obtains a high-precision clock by utilizing the first PHY circuit and the second PHY circuit through the CDR technology, obtains the self synchronous state according to the synchronous data by the channel control circuit according to the high-precision clock, corrects the synchronous data to keep the synchronous state consistent with the control unit, and circularly executes a synchronous flow by the control unit, so that the synchronous state among multiple channels is excellent because all channels are based on the synchronous data of the same control unit, and the error between the synchronous time of the channel control circuit and the control unit is only 0.5ns according to actual measurement
Through the use of the control bus data transmission, the requirements of simultaneous acquisition, real-time control and synchronous uploading of the sampling data of the multi-channel data are fully met, and the method is applied to multi-channel ultrasonic flaw detection, and the flaw detection flow is as follows:
the control unit digitizes the synchronous signal and the control signal and encodes the synchronous signal onto the control bus, and transmits the synchronous signal and the control signal to the channel control circuit, the channel control circuit decodes the encoded data, the channel control circuit controls the multipath transmitting circuit, the receiving amplifying circuit and the multiplexing circuit in parallel according to the decoded data, wherein the multipath transmitting circuit, the receiving amplifying circuit receives the ultrasonic wave echo, the amplifying circuit amplifies the ultrasonic wave echo by the real-time control of the channel control circuit, the data converting circuit converts the amplified ultrasonic wave echo signal into the digital-to-analog conversion circuit through the data acquisition line, the data converting circuit converts the ultrasonic wave echo signal into the digital signal, and then inputs the digital signal into the control unit, the control unit processes the digital signal and transmits the digital signal to the flaw detector CPU and the bus interface circuit, the control unit is in an active working state, the channel control circuit is in a passive working state, the control signal of the channel is transmitted only by the control bus and does not interfere with the data acquisition line transmitting the analog signal, and the method is particularly suitable for the conditions of multiple channels, long propagation distance and high working requirements.
The invention provides a multi-channel ultrasonic flaw detector synchronization and data transmission device and a control method, which can realize one-to-many control with high bandwidth and high precision synchronization of multiple channels, wherein the device comprises a back-end circuit, a transmission line, a plurality of front-end circuits and a probe, wherein the front-end circuit and the back-end circuit are in modularized design, the function expansion capability is strong, the front-end circuit comprises a multiplexing circuit, a channel control circuit, a plurality of groups of transmitting circuits and receiving amplifying circuits, the back-end circuit comprises a digital-to-analog conversion circuit, a control unit, a flaw detector CPU and a bus interface circuit, the control unit and the channel control circuit can carry a self-defined communication protocol to finish data interaction on a data link layer, and can also directly carry out circuit connection by using a MAC protocol to finish data interaction; the device can form a more complex topological structure, enhances the expansion capacity and data throughput of the multichannel ultrasonic flaw detection system, and simultaneously provides solid guarantee for the time-sharing multiplexing function of the system; the control method comprises the steps that a control unit encodes a synchronous signal and a control signal to obtain an encoded information stream, the encoded information stream is transmitted to a channel control circuit through an Ethernet transmission protocol by using a control bus, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, the channel control circuit controls a transmitting circuit according to the decoded information stream, a receiving amplifying circuit and a multiplexing circuit, the transmitting circuit transmits an excitation signal to a probe, the probe transmits an ultrasonic wave signal, the receiving amplifying circuit receives an ultrasonic wave echo, the amplified ultrasonic wave echo signal is input into a digital-to-analog conversion circuit through a data acquisition line with the aid of the multiplexing circuit, the digital-to-analog conversion circuit converts the ultrasonic wave echo signal into a digital signal and transmits the digital signal to a control unit, the control unit reads data and processes the digital signal and transmits the digital signal to a flaw detector CPU and a bus interface circuit after processing, the synchronous signal is transmitted to other front-end circuits, and the front-end circuits decode the digital synchronous signal and apply the digital synchronous signal to a self-timing system to perform equipment synchronization, and compared with the traditional synchronous pulse excitation signal method, the synchronous signal is not reduced, and the synchronous signal jitter precision is greatly improved; in the method, the control unit is in an active working state, the channel control circuit is in a passive working state, the control signals of the channels are transmitted only by the control bus, and are isolated from each other and do not interfere with the data acquisition lines for transmitting analog signals, so that the method is particularly suitable for the conditions of large number of channels, long propagation distance and high requirement on parallel operation of the channels.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; also, it is within the scope of the present invention to be modified by those of ordinary skill in the art in light of the present teachings. In view of the foregoing, this description should not be construed as limiting the invention.

Claims (9)

1. A multi-channel ultrasonic flaw detector synchronization and data transmission device, comprising: the probe is connected with the front-end circuit, and the front-end circuit is connected with the rear-end circuit through the transmission line;
the transmission line comprises a control bus and a data acquisition line;
the front-end circuit comprises a multiplexing circuit, a first PHY circuit, a channel control circuit, a plurality of groups of transmitting circuits and receiving amplifying circuits, the probe is connected with the transmitting circuits and the receiving amplifying circuits, the transmitting circuits and the receiving amplifying circuits are connected with the channel control circuit, the receiving amplifying circuits and the channel control circuits are connected with the multiplexing circuit, the channel control circuit is connected with the first PHY circuit, the first PHY circuit is connected with the rear-end circuit through a control bus, and the multiplexing circuit is connected with the rear-end circuit through the data acquisition line;
the back-end circuit comprises a digital-to-analog conversion circuit, a control unit, a second PHY circuit, a flaw detector CPU and a bus interface circuit, wherein the multiplexing circuit is connected with the digital-to-analog conversion circuit through the data acquisition line, the first PHY circuit is connected with the second PHY circuit through a control bus, the second PHY circuit and the digital-to-analog conversion circuit are connected with the control unit, and the control unit is connected with the flaw detector CPU and the bus interface circuit.
2. The multi-channel ultrasonic flaw detector synchronization and data transmission device according to claim 1, wherein the channel control circuit is an FPGA or a microcontroller, the control unit is an FPGA or a microcontroller, and the data acquisition line is a radio frequency analog signal transmission line.
3. A method for controlling synchronization and data transmission of a multi-channel ultrasonic flaw detector, which is applied to the synchronization and data transmission device of the multi-channel ultrasonic flaw detector as claimed in any one of claims 1 to 2, and is characterized by comprising the following steps:
step 1: the control unit encodes the synchronous signal and the control signal to obtain an encoded information stream, the encoded information stream is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and the high-precision clock is obtained through the CDR technology;
step 2: the channel control circuit simultaneously controls the multi-channel transmitting circuit, the receiving amplifying circuit and the multiplexing circuit according to the decoded information flow, the multi-channel transmitting circuit transmits excitation signals to the probes in parallel, the probes transmit ultrasonic signals in parallel, the multi-channel receiving amplifying circuit receives ultrasonic echoes in parallel, and the amplified ultrasonic echo signals are input into the digital-to-analog conversion circuit through the data acquisition line with the assistance of the multiplexing circuit;
step 3: the digital-to-analog conversion circuit converts the ultrasonic echo signal into a digital signal and sends the digital signal to the control unit, and the control unit reads and processes the data and sends the processed data to the flaw detector CPU and the bus interface circuit.
4. The method for controlling synchronization and data transmission of a multi-channel ultrasonic flaw detector according to claim 3, wherein in step 1, the encoded information is streamed to the channel control circuit by using the control bus through the ethernet transmission protocol, specifically:
the control unit transmits the encoded information stream to the data link layer of the back-end circuit, the data link layer of the back-end circuit transmits the encoded information stream to the physical layer of the back-end circuit, the physical layer of the back-end circuit transmits the encoded information stream to the physical layer of the front-end circuit via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
5. The method according to claim 4, wherein the physical layer of the back-end circuit transmits the encoded information stream to the physical layers of all the front-end circuits via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, and the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit.
6. The method according to claim 4, wherein the physical layer of the back-end circuit transmits the encoded information stream to the physical layer of one or more front-end circuits via the control bus, the physical layer of the front-end circuit transmits the encoded information stream to the data link layer of the front-end circuit, the data link layer of the front-end circuit transmits the encoded information stream to the channel control circuit, and the front-end circuit forwards the encoded information stream to other front-end circuits which do not receive the encoded information stream in a data copy manner after the transmission is completed.
7. The method for controlling synchronization and data transmission of a multi-channel ultrasonic flaw detector according to claim 3, wherein in step 1, the encoded information is streamed to the channel control circuit by using the control bus through the ethernet transmission protocol, specifically:
the control unit directly carries out circuit connection with the channel control circuit by using the MAC protocol, the control unit transmits the coded information stream to the channel control circuit through the control bus, and the channel control circuit forwards the coded information stream to other channel control circuits in a data copying mode.
8. The method for controlling synchronization and data transmission of a multi-channel ultrasonic flaw detector according to claim 3, wherein in step 1, the control unit encodes the control signal to obtain an encoded information stream, and transmits the encoded information stream to the channel control circuit by using the control bus through the ethernet transmission protocol, and the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and obtains the high-precision clock through the CDR technique, specifically:
the control unit detects that control data need to be sent, sequentially performs transmission control according to the priority of data transmission, encodes the data to be transmitted into an MAC frame, wherein the data field of the MAC frame is divided into three parts, namely a data type field, a data length field and the data field to be transmitted, after the encoding is completed, the MAC frame is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the MAC frame, and data distribution is performed according to the data type field.
9. The method for controlling synchronization and data transmission of a multi-channel ultrasonic flaw detector according to claim 3, wherein in step 1, the control unit encodes the synchronization signal to obtain an encoded information stream, and transmits the encoded information stream to the channel control circuit by using the control bus through the ethernet transmission protocol, the channel control circuit decodes the encoded information stream to obtain a decoded information stream, and obtains the high-precision clock through the CDR technique, specifically:
the control unit acquires synchronous data of the time service system, encodes the synchronous data into an MAC frame, the MAC frame is transmitted to the channel control circuit by using the control bus through the Ethernet transmission protocol, the channel control circuit decodes the MAC frame, the synchronous data is provided, the first PHY circuit and the second PHY circuit are used for obtaining a high-precision clock through a CDR technology, the channel control circuit obtains the self synchronous state according to the synchronous data according to the high-precision clock and corrects the synchronous state according to the synchronous data, the synchronous state is kept consistent with the control unit, and the control unit circularly executes a synchronous flow, so that the channel control circuit continuously corrects the self synchronous state.
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