CN113809202A - Solar cell and preparation method thereof - Google Patents
Solar cell and preparation method thereof Download PDFInfo
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- CN113809202A CN113809202A CN202110972671.4A CN202110972671A CN113809202A CN 113809202 A CN113809202 A CN 113809202A CN 202110972671 A CN202110972671 A CN 202110972671A CN 113809202 A CN113809202 A CN 113809202A
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- 238000002360 preparation method Methods 0.000 title abstract description 8
- 238000009792 diffusion process Methods 0.000 claims abstract description 130
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 115
- 239000010703 silicon Substances 0.000 claims abstract description 115
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 113
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 90
- 229910052796 boron Inorganic materials 0.000 claims abstract description 90
- 238000007639 printing Methods 0.000 claims abstract description 59
- 239000005388 borosilicate glass Substances 0.000 claims abstract description 50
- 238000002161 passivation Methods 0.000 claims abstract description 47
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 40
- 239000011574 phosphorus Substances 0.000 claims abstract description 40
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 39
- 238000005498 polishing Methods 0.000 claims abstract description 11
- 239000003513 alkali Substances 0.000 claims abstract description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 25
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 25
- 238000007650 screen-printing Methods 0.000 claims description 22
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 15
- 238000004140 cleaning Methods 0.000 claims description 13
- 239000002243 precursor Substances 0.000 claims description 11
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 10
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 claims description 10
- 239000012670 alkaline solution Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 7
- 239000000243 solution Substances 0.000 claims description 5
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 9
- 238000011049 filling Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 128
- 238000006243 chemical reaction Methods 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 125000004437 phosphorous atom Chemical group 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
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Abstract
The invention provides a method for preparing a solar cell and the solar cell, and relates to the technical field of solar photovoltaics. In the preparation process, firstly, carrying out double-sided polishing on an alkali solution to obtain a silicon wafer with a square block structure on the surface, then carrying out single-sided boron diffusion to obtain a boron diffusion layer, removing a corresponding borosilicate glass layer on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer according to a printing region of a back electrode, and then carrying out double-sided texturing; and then carrying out phosphorus diffusion on one side of the silicon wafer far away from the boron diffusion layer to form a phosphorus diffusion layer. At the moment, the printing area corresponding to the back electrode on the back surface is of a suede structure, other areas are of square structures, the suede structure and the back electrode form good contact, series resistance is reduced, and filling factors are improved; the surface of the square structure is smooth, a passivation film can be better deposited, the formed film is more compact, the passivation effect is improved, the open-circuit voltage is effectively improved, and the efficiency is further improved.
Description
Technical Field
The invention relates to the technical field of solar photovoltaics, in particular to a solar cell and a preparation method thereof.
Background
PERC (Passivated Emitter and reader Cell) is a technology that adds a dielectric passivation layer, such as an alumina/silicon nitride layer, on the back of a solar Cell to reduce recombination loss on the back of the Cell, thereby improving the conversion efficiency of the Cell.
However, with the upgrading of the process and equipment technology, the efficiency improvement of the PERC battery is a bottleneck, and how to improve the structure of the PERC battery to further improve the efficiency of the PERC battery is a problem to be solved.
Disclosure of Invention
The invention provides a solar cell and a preparation method thereof, aiming at further improving the efficiency conversion efficiency of a PERC cell.
In a first aspect, an embodiment of the present invention provides a method for manufacturing a solar cell, where the method may include:
performing alkaline solution double-sided polishing on the silicon wafer to obtain the silicon wafer with a square structure on the surface;
carrying out single-side boron diffusion on the polished silicon wafer to obtain a boron diffusion layer;
removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer, wherein the printing area is an area for preparing a back electrode by screen printing;
performing double-sided texturing on the silicon wafer with the borosilicate glass layer removed;
and carrying out phosphorus diffusion on one side of the silicon wafer after texturing, which is far away from the boron diffusion layer, so as to form a phosphorus diffusion layer.
Optionally, the thickness of the silicon wafer is 150 μm to 180 μm;
the alkali solution adopts 3.5 to 4.5 percent potassium hydroxide solution.
Optionally, the removing the borosilicate glass layer corresponding to the printing region on the surface of the boron diffusion layer and the borosilicate glass layer on the side of the silicon wafer far away from the boron diffusion layer includes:
removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer by adopting laser film opening, wherein the power of the laser is 13W-17W;
and removing the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer by adopting hydrofluoric acid with the concentration of 38% -42%.
Optionally, the double-sided texturing is performed on the silicon wafer after the borosilicate glass layer is removed, and includes:
and (3) performing double-sided texturing on the silicon wafer after the borosilicate glass layer is removed by adopting a potassium hydroxide solution with the concentration of 0.8-1.2%.
Optionally, the sheet resistance of the phosphorus diffusion layer is 45 Ω/□ -55 Ω/□.
Optionally, the method further comprises cleaning, annealing, passivating, screen printing and sintering the silicon wafer after phosphorus diffusion, wherein:
cleaning the silicon wafer after phosphorus diffusion, wherein the cleaning comprises removing a borosilicate glass layer corresponding to a non-printing area on the surface of the silicon wafer;
the annealing is to anneal the cleaned silicon wafer at the temperature of 650-750 ℃;
the passivation comprises the steps of preparing an aluminum oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the boron diffusion layer, and preparing a silicon oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the phosphorus diffusion layer;
the screen printing comprises the steps of preparing a back electrode precursor on the surface of the aluminum oxide and silicon nitride passivation film through screen printing, and preparing a front electrode precursor on the surface of the silicon oxide and silicon nitride passivation film through screen printing;
and sintering the silicon wafer subjected to screen printing to obtain the solar cell.
In a second aspect, embodiments of the present invention provide a solar cell, which is prepared according to the method of the first aspect;
the back surface of the solar cell comprises a non-printing area and a printing area corresponding to the printing position of the back electrode, wherein the non-printing area is of a square structure, and the printing area is of a suede structure.
Optionally, the back surface of the solar cell further comprises a silicon wafer body, a boron diffusion layer and an aluminum oxide and/or silicon nitride passivation layer in sequence from inside to outside.
Optionally, the size of the squares distributed in the square structure is 4 μm to 6 μm.
Optionally, the sheet resistance of the boron diffusion layer is 120 Ω/□ -140 Ω/□.
In a third aspect, an embodiment of the present invention further provides an apparatus, where the apparatus includes: an interface, a bus, a memory and a processor, wherein the interface, the memory and the processor are connected through the bus, the memory is used for storing an executable program, and the processor is configured to execute the executable program to realize the steps of the method for preparing the solar cell according to the first aspect.
In a fourth aspect, the embodiments of the present invention further provide a computer storage medium, where the computer storage medium stores an executable program, and the executable program is executed by a processor to implement the steps of the method for manufacturing a solar cell according to the first aspect.
In the embodiment of the invention, in the preparation process, firstly, carrying out double-sided polishing on an alkaline solution to obtain a silicon wafer with a square block structure on the surface, then carrying out single-sided boron diffusion to obtain a boron diffusion layer, then removing a corresponding borosilicate glass layer on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer according to a printing region of a back electrode, and then carrying out double-sided texturing; and then carrying out phosphorus diffusion on one side of the silicon wafer far away from the boron diffusion layer to form a phosphorus diffusion layer. At the moment, the printing area corresponding to the back electrode on the back surface of the prepared solar cell is of a suede structure, other areas are of square structures, the suede structure of the printing area can be in good contact with the back electrode, so that the overall series resistance of the solar cell is reduced, the filling factor is improved, in addition, the surface of the square structure is smooth, a passivation film can be better deposited relative to the suede structure, the formed film is more compact, the passivation effect of the solar cell is improved, the open-circuit voltage of the solar cell is effectively improved, and the efficiency of the solar cell is further integrally improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a flow chart illustrating steps of a method for manufacturing a solar cell according to an embodiment of the present invention;
fig. 2 is a flow chart illustrating steps of another method for manufacturing a solar cell according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a square structure of a silicon wafer according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a solar cell according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart illustrating steps of a method for manufacturing a solar cell according to an embodiment of the present invention, and referring to fig. 1, the method may include:
In the embodiment of the invention, the square structure refers to a structure that a plurality of squares are distributed on the surface of a silicon wafer, the surface of each square is flat, wherein the silicon wafer can be polished to obtain the silicon wafer with the square structure on the surface, an alkaline solution double-side polishing process can be selected, optionally, the type and concentration of the alkaline solution, and the size of the square in the square structure can be selected according to specific requirements.
And 102, performing single-side boron diffusion on the polished silicon wafer to obtain a boron diffusion layer.
In the embodiment of the invention, single-side boron diffusion can be carried out on the polished silicon wafer to form the boron diffusion layer, wherein the boron diffusion layer can be used as a P + region of the silicon wafer, and the field effect passivation effect of the aluminum oxide/silicon nitride passivation layer is enhanced on the back surface of the solar cell, so that the carrier collection capability of a PN junction (Positive negative junction) in the solar cell is improved, and the conversion efficiency of the solar cell is further improved.
103, removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer and the borosilicate glass layer on the side, far away from the boron diffusion layer, of the silicon chip, wherein the printing area is an area for preparing a back electrode by screen printing.
In the embodiment of the invention, in the process of single-sided boron diffusion, borosilicate glass layers are formed on the surface of the boron diffusion layer and on the side, far away from the boron diffusion layer, of the silicon wafer, and at the moment, the borosilicate glass layer corresponding to a printing region on the surface of the boron diffusion layer and the borosilicate glass layer on the side, far away from the boron diffusion layer, of the silicon wafer can be removed, so that the borosilicate glass layers are prevented from influencing the processing of the subsequent process.
And 104, performing double-sided texturing on the silicon wafer with the borosilicate glass layer removed.
In the embodiment of the invention, double-sided texturing can be performed on the silicon wafer after the borosilicate glass layer is removed, at this time, the borosilicate glass layer retained on the surface of the boron diffusion layer in step 103 can partially protect the boron diffusion layer, so that the boron diffusion layer retains a square structure of the surface, and a pyramid light trapping structure, namely a textured structure, is formed on the double-sided texturing in the printing region on the surface of the boron diffusion layer and the side, far away from the boron diffusion layer, of the silicon wafer.
And 105, performing phosphorus diffusion on one side, far away from the boron diffusion layer, of the silicon wafer after texturing to form a phosphorus diffusion layer.
In the embodiment of the present invention, phosphorus atoms are implanted into a side of the silicon wafer away from the boron diffusion layer to perform phosphorus diffusion, so as to form an N + region to form a PN junction, and optionally, phosphorus sources with different concentrations may be selected according to a sheet resistance required by the phosphorus diffusion layer.
In the embodiment of the present invention, in the method for manufacturing a solar cell, the back surface of the solar cell is manufactured by adopting the processes of step 101 to step 105, where the back surface includes the printing region of the textured structure, other regions of the square structure, and a back electrode in the printing region, and for other functional layers, electrode structures, and the like in the solar cell, a person skilled in the art may select the back surface according to the application requirements and process conditions of the solar cell, and the method is not particularly limited in the embodiment of the present invention.
In the embodiment of the invention, in the preparation process, firstly, carrying out double-sided polishing on an alkaline solution to obtain a silicon wafer with a square block structure on the surface, then carrying out single-sided boron diffusion to obtain a boron diffusion layer, then removing a corresponding borosilicate glass layer on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer according to a printing region of a back electrode, and then carrying out double-sided texturing; and then carrying out phosphorus diffusion on one side of the silicon wafer far away from the boron diffusion layer to form a phosphorus diffusion layer. At the moment, the printing area corresponding to the back electrode on the back surface of the prepared solar cell is of a suede structure, other areas are of square structures, the suede structure of the printing area can be in good contact with the back electrode, so that the overall series resistance of the solar cell is reduced, the filling factor is improved, in addition, the surface of the square structure is smooth, a passivation film can be better deposited relative to the suede structure, the formed film is more compact, the passivation effect of the solar cell is improved, the open-circuit voltage of the solar cell is effectively improved, and the efficiency of the solar cell is further integrally improved.
Fig. 2 is a flowchart illustrating steps of another method for manufacturing a solar cell according to an embodiment of the present invention, and referring to fig. 2, the method may include:
In the embodiment of the present invention, step 201 may refer to the related description of step 101, and is not described herein again to avoid repetition.
Optionally, the thickness of the silicon wafer is 150 μm to 180 μm;
optionally, the alkali solution is potassium hydroxide solution with the concentration of 3.5% -4.5%.
In the embodiment of the present invention, the silicon wafer may be a silicon wafer with a thickness of any thickness between 150 μm and 180 μm, and the concentration may be a mass fraction, alternatively, the silicon wafer may be polished by alkali double-side polishing, and the polished surface of the silicon wafer forms a square block structure, where the alkali polishing may be performed by using a 3.5% to 4.5% potassium hydroxide solution, for example, by using a 3.5%, 3.8%, 4.0%, 4.3%, or 4.5% potassium hydroxide solution, and this is not particularly limited in the embodiment of the present invention.
Fig. 3 is a schematic view of a square structure of a silicon wafer according to an embodiment of the present invention, and as shown in fig. 3, after polishing the silicon wafer with an alkaline solution, a plurality of squares are distributed on the surface of the silicon wafer, and the surface of the squares is relatively flat.
In the embodiment of the present invention, a single-sided boron diffusion may be performed on one side of the silicon wafer to obtain the boron diffusion layer, after the boron diffusion layer is obtained, the surface on which the boron diffusion layer is located may be determined as the back surface, and the other side away from the boron diffusion layer may be determined as the front surface, and step 202 may refer to the related description of step 102, and is not repeated here to avoid repetition.
Optionally, the sheet resistance of the boron diffusion layer is 120 Ω/□ -140 Ω/□.
In the embodiment of the present invention, when performing single-sided boron diffusion on a polished silicon wafer, the sheet resistance of the boron diffusion layer may be adjusted to 120 Ω/□ -140 Ω/□, where the sheet resistance of the boron diffusion layer may be 120 Ω/□, 125 Ω/□, 130 Ω/□, 140 Ω/□, and the like, and this is not particularly limited in the embodiment of the present invention.
And 203, removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer by adopting laser film opening, wherein the laser power is 13W-17W, and the printing area is an area for preparing a back electrode by screen printing.
In the embodiment of the invention, the borosilicate glass layer on the surface of the boron diffusion layer can be partially ablated by laser film opening, wherein the pattern of the laser film opening can be the pattern of a screen printing back electrode, so that the borosilicate glass layer corresponding to the printing area can be correspondingly removed, namely the part of the printing area in the borosilicate glass layer on the back surface is removed, optionally, the power of the laser can be any power of 13W to 17W, for example, the power of the laser can be 13W, 14W, 15W, 16W, 17W, and the like.
And 204, removing the borosilicate glass layer on the side, far away from the boron diffusion layer, of the silicon wafer by adopting hydrofluoric acid with the concentration of 38% -42%.
In the embodiment of the present invention, the borosilicate glass layer on the side of the silicon wafer far from the boron diffusion layer may be removed, that is, the borosilicate glass layer on the front surface may be completely removed, wherein hydrofluoric acid with a concentration of 38% to 42% may be selected to remove, for example, hydrofluoric acid with a mass fraction of 38%, 38.5%, 40%, 41%, 42%, or the like may be used in a chain type cleaning machine to remove the borosilicate glass layer on the front surface.
And 205, performing double-sided texturing on the silicon wafer after the borosilicate glass layer is removed by adopting a potassium hydroxide solution with the concentration of 0.8% -1.2%.
In the embodiment of the invention, after the borosilicate glass layer is removed, the silicon wafer can be subjected to double-sided texturing, wherein potassium hydroxide solution with the concentration of 0.8-1.2% can be adopted for double-sided texturing, for example, potassium hydroxide solution with the mass fraction of 0.8%, 0.9%, 1% or 1.2% can be adopted as a texturing additive in a groove type cleaning machine, the silicon wafer is subjected to double-sided texturing, and the printing areas on the front surface and the back surface of the silicon wafer are prepared into textured structures.
And 206, performing phosphorus diffusion on one side of the silicon wafer after texturing, which is far away from the boron diffusion layer, to form a phosphorus diffusion layer.
In the embodiment of the present invention, step 206 may refer to the related description of step 105, and is not repeated herein to avoid repetition.
Optionally, the sheet resistance of the phosphorus diffusion layer is 45 Ω/□ -55 Ω/□.
In the embodiment of the present invention, phosphorus diffusion is performed on the side of the textured silicon wafer away from the boron diffusion layer, that is, the front surface, so that the sheet resistance of the phosphorus diffusion layer can be adjusted to 45 Ω/□ -55 Ω/□, where the sheet resistance of the phosphorus diffusion layer may be 45 Ω/□, 46 Ω/□, 50 Ω/□, 55 Ω/□, and the embodiment of the present invention is not particularly limited thereto.
And step 207, cleaning, annealing, passivating, screen printing and sintering the silicon wafer after phosphorus diffusion.
In the embodiment of the invention, the silicon wafer after phosphorus diffusion can be further cleaned to remove a borosilicate glass layer and other dirt and impurities reserved on the surface of the boron diffusion layer, annealing is carried out to activate doped phosphorus atoms, passivation is carried out to reduce surface carrier recombination, and the influence of the impurities, the defects and the like on the surface of the silicon wafer on the performance of the cell is reduced.
Optionally, in step 207, the step of,
and step S11, cleaning the silicon wafer after phosphorus diffusion, including removing the borosilicate glass layer corresponding to the non-printing area on the surface of the silicon wafer.
In the embodiment of the present invention, after a phosphorus diffusion layer is formed on the front surface of the silicon wafer, the silicon wafer may be cleaned, so as to remove a borosilicate glass layer corresponding to a non-printing region remaining on the surface of the boron diffusion layer, and expose the surface of the covered square structure, optionally, RCA standard cleaning is performed on the silicon wafer with phosphorus diffusion, where the RCA standard cleaning is a commonly used wet cleaning method, and the main process includes removing organic contaminants, dissolving an oxide film, removing contaminants such as particles and metals, and passivating the surface of the silicon wafer, and the like.
And step S12, annealing the cleaned silicon wafer at 650-750 ℃.
In this embodiment of the present invention, after the silicon wafer is cleaned, the silicon wafer may be annealed at a temperature of 650 to 750 ℃ to activate phosphorus atoms doped on the front surface in the phosphorus diffusion, where the annealing temperature may be 650 ℃, 660 ℃, 680 ℃, 700 ℃, 725 ℃, 750 ℃, and the like, and this is not limited in this embodiment of the present invention.
And step S13, passivating the silicon wafer by preparing an aluminum oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the boron diffusion layer and preparing a silicon oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the phosphorus diffusion layer.
In the embodiment of the invention, the passivation can be realized by preparing an aluminum oxide passivation film and a silicon nitride passivation film on one side of the annealed silicon wafer close to the boron diffusion layer, namely the back surface of the silicon wafer, and preparing the silicon nitride passivation film on one side of the silicon wafer close to the phosphorus diffusion layer, namely the front surface of the silicon wafer, so as to passivate the silicon wafer.
And step S14, the screen printing comprises the steps of preparing a back electrode precursor on the surface of the aluminum oxide and silicon nitride passivation film through screen printing, and preparing a front electrode precursor on the surface of the silicon oxide and silicon nitride passivation film through screen printing.
In the embodiment of the invention, after the passivation film is prepared, a back electrode and a front electrode can be respectively prepared, wherein a back electrode precursor can be prepared on the surface of the aluminum oxide passivation film and the silicon nitride passivation film through screen printing, and at the moment, the position of the back electrode precursor is positioned in the printing area and directly contacted with a suede structure of the back surface, but not contacted with a square structure of a non-printing area; the front electrode precursor is prepared on the surface of the silicon oxide and silicon nitride passivation film by screen printing, and is in contact with the textured structure on the front surface, optionally, the front electrode may be a silver electrode, and the back electrode may be an aluminum electrode or a silver electrode, which is not particularly limited in this embodiment of the present invention.
And step S15, sintering the silicon wafer after screen printing to obtain the solar cell.
In the embodiment of the invention, the field effect of the passivation layers of the aluminum oxide and the silicon nitride can be activated by sintering, the minority carrier lifetime of the silicon wafer is prolonged, the corresponding solar cell is obtained, and meanwhile, the front electrode precursor and the back electrode precursor are sintered into the front electrode and the back electrode. The sintering temperature can be determined according to parameters such as the particle size of the aluminum powder, the proportion of the aluminum paste and the like, or requirements such as the thickness of the aluminum back surface field, the filling rate, the electrical property and the like, and the embodiment of the invention is not particularly limited to this. Furthermore, the obtained solar cells can be tested and sorted, and electrical parameters such as open-circuit voltage, short-circuit current, filling efficiency and the like of the solar cells are tested by simulating solar spectrum, so that the electrical properties of the solar cells are graded for subsequent application.
In the embodiment of the invention, in the preparation process, firstly, carrying out double-sided polishing on an alkaline solution to obtain a silicon wafer with a square block structure on the surface, then carrying out single-sided boron diffusion to obtain a boron diffusion layer, then removing a corresponding borosilicate glass layer on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer according to a printing region of a back electrode, and then carrying out double-sided texturing; and then carrying out phosphorus diffusion on one side of the silicon wafer far away from the boron diffusion layer to form a phosphorus diffusion layer. At the moment, the printing area corresponding to the back electrode on the back surface of the prepared solar cell is of a suede structure, other areas are of square structures, the suede structure of the printing area can be in good contact with the back electrode, so that the overall series resistance of the solar cell is reduced, the filling factor is improved, in addition, the surface of the square structure is smooth, a passivation film can be better deposited relative to the suede structure, the formed film is more compact, the passivation effect of the solar cell is improved, the open-circuit voltage of the solar cell is effectively improved, and the efficiency of the solar cell is further integrally improved.
Fig. 4 is a schematic structural diagram of a solar cell according to an embodiment of the present invention, the solar cell can be prepared according to any one of the methods shown in fig. 1 to 3, and as shown in fig. 4, the solar cell includes a silicon wafer body 1;
the back surface of the solar cell comprises a non-printing area 12 and a printing area 11 corresponding to the printing position of the back electrode 4, wherein the non-printing area 12 is of a square structure, and the printing area 11 is of a textured structure.
In the embodiment of the present invention, the solar cell may be a PERC cell, wherein the back surface of the solar cell may include a non-printing region 12 having a square structure and a printing region 11 having a textured structure. As shown in fig. 4, the textured structure of the printing region 11 is in direct contact with the back electrode 4, at this time, the square structure can improve the deposition effect of the aluminum oxide passivation film, so that the passivation effect is improved, and the textured structure can be in good contact with the back electrode, so that the conversion efficiency of the battery is improved.
Optionally, the size of the squares distributed in the square structure is 4 μm to 6 μm.
In the embodiment of the present invention, the size of each block in the block structure may be distributed within a required range, for example, the size of each block may be independently located between 4 μm and 6 μm, for example, the size may be 4 μm, 4.5 μm, 5 μm, or 6 μm, and the embodiment of the present invention is not limited thereto.
And the back surface of the solar cell sequentially comprises a silicon wafer body 1, a boron diffusion layer 2 and an aluminum oxide and/or silicon nitride passivation layer 3 from inside to outside.
In the embodiment of the invention, a boron diffusion layer 2 can be arranged between the silicon wafer body 1 and the aluminum oxide and/or silicon nitride passivation layer 3 on the back surface of the solar cell, and the boron diffusion layer 2 added on the back surface can enhance the field passivation effect of the passivation layer, so that the capability of collecting electrons and holes by a PN junction is improved, the efficiency of the solar cell is further improved, and further, the back surface of the solar cell can also comprise a back electrode 4.
Optionally, the sheet resistance of the boron diffusion layer is 120 Ω/□ -140 Ω/□.
In this embodiment of the present invention, the sheet resistance of the boron diffusion layer may be any sheet resistance between 120 Ω/□ and 140 Ω/□, for example, the sheet resistance of the boron diffusion layer may be 120 Ω/□, 125 Ω/□, 130 Ω/□, or 140 Ω/□, and this is not limited in this embodiment of the present invention.
And the front surface of the solar cell sequentially comprises a silicon wafer body 1, a phosphorus diffusion layer 5, a silicon nitride passivation layer 6 and a front electrode 7 from inside to outside.
In the embodiment of the present invention, as shown in fig. 4, the solar cell may further include a front surface far away from the back surface, wherein the front surface sequentially includes, from inside to outside, a silicon wafer body 1, a phosphorus diffusion layer 5, a silicon nitride passivation layer 6, a front electrode 7, and the like, thereby constituting an improvement of the PERC cell.
In the embodiment of the invention, the solar cell shown in fig. 4 is taken as an example, and a comparative performance test is performed on the solar cell and a conventional PERC cell. Compared with a conventional PERC cell, experimental tests show that the open-circuit voltage of the solar cell shown in FIG. 4 is increased from 690mV to 695mV, the overall series resistance Rs (short circuit resistance) of the cell is reduced by about 1.1m omega, the absolute value of the fill factor FF (fill factor) is increased by about 0.2%, and the absolute value of the conversion efficiency of the solar cell is increased by about 0.2%. It can be seen that the solar cell provided by the application and shown in fig. 4 breaks through the bottleneck of conversion efficiency of the conventional PERC cell, and further improves the conversion efficiency of the solar cell.
In the embodiment of the invention, the back surface of the solar cell comprises the non-printing area and the printing area corresponding to the back electrode, wherein the printing area is of a suede structure, the non-printing area is of a square structure, and the suede structure of the printing area can be in good contact with the back electrode, so that the overall series resistance of the solar cell can be reduced, the filling factor is improved, in addition, the surface of the square structure is flat, a passivation film can be better deposited relative to the suede structure, the film forming is more compact, the passivation effect is improved, the open-circuit voltage of the solar cell is effectively improved, and the efficiency of the solar cell is further integrally improved.
An embodiment of the present invention further provides an apparatus, where the apparatus includes: an interface, a bus, a memory and a processor, wherein the interface, the memory and the processor are connected through the bus, the memory is used for storing an executable program, and the processor is configured to execute the executable program to realize the steps of the method for preparing the solar cell as shown in any one of fig. 1 to 3.
The embodiment of the invention also provides a computer storage medium, which is characterized in that an executable program is stored on the computer readable storage medium, and the executable program is executed by a processor to implement the steps of the method for manufacturing the solar cell shown in any one of fig. 1 to 3.
It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the embodiments of the application.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A method of fabricating a solar cell, the method comprising:
performing alkaline solution double-sided polishing on the silicon wafer to obtain the silicon wafer with a square structure on the surface;
carrying out single-side boron diffusion on the polished silicon wafer to obtain a boron diffusion layer;
removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer and the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer, wherein the printing area is an area for preparing a back electrode by screen printing;
performing double-sided texturing on the silicon wafer with the borosilicate glass layer removed;
and carrying out phosphorus diffusion on one side of the silicon wafer after texturing, which is far away from the boron diffusion layer, so as to form a phosphorus diffusion layer.
2. The method of claim 1, wherein the silicon wafer has a thickness of 150 to 180 μm;
the alkali solution adopts 3.5 to 4.5 percent potassium hydroxide solution.
3. The method according to claim 1, wherein the removing the borosilicate glass layer corresponding to the printing region on the surface of the boron diffusion layer and the borosilicate glass layer on the side of the silicon wafer far away from the boron diffusion layer comprises:
removing the borosilicate glass layer corresponding to the printing area on the surface of the boron diffusion layer by adopting laser film opening, wherein the power of the laser is 13W-17W;
and removing the borosilicate glass layer on one side of the silicon wafer far away from the boron diffusion layer by adopting hydrofluoric acid with the concentration of 38% -42%.
4. The method of claim 1, wherein the double-sided texturing of the silicon wafer after removing the borosilicate glass layer comprises:
and (3) performing double-sided texturing on the silicon wafer after the borosilicate glass layer is removed by adopting a potassium hydroxide solution with the concentration of 0.8-1.2%.
5. The method of claim 1, wherein the sheet resistance of the phosphorus diffusion layer is 45 Ω/□ -55 Ω/□.
6. The method of claim 1, further comprising cleaning, annealing, passivating, screen printing, and sintering the silicon wafer after phosphorous diffusion, wherein:
cleaning the silicon wafer after phosphorus diffusion, wherein the cleaning comprises removing a borosilicate glass layer corresponding to a non-printing area on the surface of the silicon wafer;
the annealing is to anneal the cleaned silicon wafer at the temperature of 650-750 ℃;
the passivation comprises the steps of preparing an aluminum oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the boron diffusion layer, and preparing a silicon oxide and silicon nitride passivation film on one side of the annealed silicon wafer close to the phosphorus diffusion layer;
the screen printing comprises the steps of preparing a back electrode precursor on the surface of the aluminum oxide and silicon nitride passivation film through screen printing, and preparing a front electrode precursor on the surface of the silicon oxide and silicon nitride passivation film through screen printing;
and sintering the silicon wafer subjected to screen printing to obtain the solar cell.
7. A solar cell, characterized in that it is prepared according to the method of any one of claims 1 to 6;
the back surface of the solar cell comprises a non-printing area and a printing area corresponding to the printing position of the back electrode, wherein the non-printing area is of a square structure, and the printing area is of a suede structure.
8. The solar cell of claim 7, wherein the back surface of the solar cell further comprises a silicon wafer body, a boron diffusion layer and an aluminum oxide and/or silicon nitride passivation layer in sequence from inside to outside.
9. The solar cell according to claim 7, wherein the square structure has a square size of 4 μm to 6 μm.
10. The solar cell of claim 8, wherein the sheet resistance of the boron diffusion layer is 120 Ω/□ -140 Ω/□.
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| CN110854241A (en) * | 2019-12-13 | 2020-02-28 | 浙江晶科能源有限公司 | Manufacturing method of solar cell with surface selective texture and solar cell |
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| CN110854241A (en) * | 2019-12-13 | 2020-02-28 | 浙江晶科能源有限公司 | Manufacturing method of solar cell with surface selective texture and solar cell |
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