CN113794850B - Timing correction method, apparatus, electronic device and readable storage medium - Google Patents
Timing correction method, apparatus, electronic device and readable storage medium Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
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Abstract
The application relates to the technical field of data transmission, and particularly discloses a time sequence correction method, a time sequence correction device, electronic equipment and a readable storage medium. The method comprises the following steps: transmitting a time sequence correction instruction to each transmission node of each transmission channel; receiving feedback information of each transmission node; determining timing parameters to be changed of each transmission node according to the feedback information, and sending the timing parameters to be changed to each transmission node so that each transmission node changes the timing parameters of the transmission node according to the timing parameters to be changed; and adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter. The time sequence correction method can realize time sequence change in a seamless mode, and avoid the occurrence of abnormal display caused by time delay due to time sequence change.
Description
Technical Field
The present invention relates to the field of data transmission technologies, and in particular, to a timing correction method, apparatus, electronic device, and readable storage medium.
Background
Currently, in a video image processing system, especially a video image processing system related to DisplayPort (DP, digital video interface standard) with VESA (Video Electronics Standards Association ), MIPI (Mobile Industry Processor Interface, mobile industry processor interface standard), HDMI (High Definition Multimedia Interface, high definition multimedia interface standard) and the like, in a process of driving a display terminal such as a liquid crystal display, an organic light emitting diode and the like to perform multi-channel display, when a panel area is refreshed, if a video data transmission link is closed, a transmission node in each transmission link needs to accurately and reliably determine the start and end of refreshing the panel area, when a plurality of areas in the panel area are refreshed simultaneously, then, a transmission node corresponding to a plurality of areas to be refreshed needs to maintain an accurate and reliable time sequence, or when a panel self-refresh state is entered, if a subsequent data frame needs to change the time sequence to a new state, since each transmission node has to be switched between different time sequences, a time delay is brought about, and thus, an abnormal image display is caused.
Therefore, how to quickly and accurately adjust the timing of the transmission node without affecting the normal display of the image is one of the problems that needs to be solved in the art.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a timing correction method, apparatus, electronic device, and readable storage medium.
The timing correction method is applied to a video image processing system, and the video image processing system comprises a video source end, wherein the video source end externally transmits video data through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the timing correction method includes:
Transmitting a time sequence correction instruction to each transmission node of each transmission channel;
receiving feedback information of each transmission node;
Determining timing parameters to be changed of each transmission node according to the feedback information, and sending the timing parameters to be changed to each transmission node so that each transmission node changes the timing parameters of the transmission node according to the timing parameters to be changed;
And adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
In one embodiment, the feedback information includes a timing state of each of the transmission nodes; the step of determining the timing parameters to be changed of each transmission node according to the feedback information comprises the following steps: and determining the time sequence parameters to be changed of the transmission nodes according to the time sequence state of the transmission nodes.
In one embodiment, the feedback information includes timing parameters to be changed, which are determined by each of the transmission nodes according to the self timing state; the step of determining the timing parameters to be changed of each transmission node according to the feedback information comprises the following steps: and determining the time sequence parameters to be changed of the transmission nodes according to the time sequence parameters to be changed fed back by the transmission nodes.
In one embodiment, the timing parameters include at least one of a row leading edge, a row sync, a row trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, a pixel clock.
In one embodiment, the step of adjusting a data frame according to the timing parameter to be changed and sending the data frame to each transmission channel includes:
filling the time sequence parameters to be changed into time sequence parameter information bits in a data frame to form a new data frame;
and sending a new data frame to each transmission channel.
In one embodiment, after the step of adjusting a data frame according to the timing parameter to be changed and sending the data frame to each transmission channel, so that each transmission node receives video data according to the changed timing parameter, the timing correction method further includes:
judging whether the video data display is abnormal or not;
and when the video data is abnormal in display, adjusting the arrangement sequence of the time sequence parameter information bits in the data frame.
In one embodiment, after the step of filling the timing parameter to be changed into the timing parameter information bits in the data frame, the timing correction method further includes: and determining and removing unused time sequence parameter information bits in the data frame.
The timing correction device is applied to a video image processing system, and the video image processing system comprises a video source end, wherein the video source end externally transmits video data through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the timing correction device includes:
the first sending module is used for sending a time sequence correction instruction to each transmission node of each transmission channel;
the receiving module is used for receiving feedback information of each transmission node;
The second sending module is used for determining the time sequence parameters to be changed of each transmission node according to the feedback information and sending the time sequence parameters to be changed to each transmission node so that each transmission node can change the own time sequence parameters according to the time sequence parameters to be changed;
And the third sending module is used for adjusting the data frame according to the time sequence parameter to be changed and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
An electronic device comprising a memory storing a computer program and a processor implementing a timing correction method as described above when executing the computer program.
A computer readable storage medium having stored therein computer instructions which when executed by a processor implement a timing correction method as described above.
According to the time sequence correction method, when the time sequence parameters of the transmission nodes are corrected, the data frame structure is synchronously corrected according to the time sequence parameters to be changed, so that when each transmission node receives video data according to the changed time sequence parameters, the time sequence can be changed in a seamless mode, and the situation that time delay is caused by changing the time sequence and display abnormality is caused is avoided.
Drawings
FIG. 1 is a schematic diagram of a video image processing system according to an embodiment of the present application;
FIG. 2 is a flow chart of a timing correction method according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a modified data frame according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a timing correction device according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. The drawings illustrate preferred embodiments of the invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
As described in the background art, in an application scenario in which a display terminal is driven by a video image processing system to perform multi-channel display, when a panel region is refreshed, a video data channel is closed, at this time, transmission nodes in each transmission channel need to accurately and reliably determine the start and end of the refresh of the panel region, and when a plurality of regions in the panel region are refreshed simultaneously, transmission nodes corresponding to a plurality of regions to be refreshed need to maintain accurate and reliable time sequences, and when a panel self-refresh state is entered, if a subsequently transmitted data frame needs to change the time sequence to a new state, since each transmission node needs to be switched between different time sequences, time delay is brought, and image display abnormality is further caused.
Therefore, how to quickly and accurately adjust the timing of the transmission node without affecting the normal display of the image is one of the problems that needs to be solved.
Therefore, the application provides a time sequence correction method, a time sequence correction device, electronic equipment and a computer readable storage medium, so as to ensure that each transmission node can quickly and accurately adjust the time sequence in the multi-channel display process without affecting the normal display of images.
First, a video image processing system according to the present application will be described:
Referring to fig. 1, the video image processing system includes an embedded control module, an FPGA module, an external storage module, a flash memory module, a peripheral module, a video interface physical layer implementation module, and a video transmission link.
Specifically, the embedded control module may use any embedded chip and system, and is mainly responsible for initiating signaling interactions, such as reading/writing registers, enabling/disabling video display modules, peripheral control, video display module parameter settings, and the like; the FPGA module is mainly responsible for realizing the implementation parts which need a large amount of data processing and low round trip delay (latency) such as storage control, peripheral control, video interface IP core implementation and the like; the external storage module is mainly responsible for storing the original data stream of the video image to be displayed in the video image processing system, and storage media such as NANDFLASH, SSD are applied to the part, but not limited to the part; the fast memory module is used in the implementation process of the FPGA module requiring a large amount of data processing and low round trip delay (latency), and is used for storing the delay in order to reduce the delay, and the module applies fast and low-delay physical devices, such as DDR3, but is not limited to the modules; the peripheral modules include GPIO (General-purpose input/output), UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous receiver Transmitter), USB (Universal Serial Bus ), network port, etc., but are not limited thereto; the video interface physical layer implementation module is mainly responsible for the physical layer implementation required for driving the display module, such as, but not limited to, TX/RX (Transmitter/Receiver) -PHY of DisplayPort, DPHY of MIPI, etc.
The FPGA module comprises a bus interaction module, an MCU (Microcontroller Unit, micro control module) video stream preprocessing module, a video data stream transmission control module, a clock control module, an embedded soft core control module, a bus controller module, an internal storage controller module, a peripheral control module, a display clock generator module, a video time sequence controller module, a video pattern processing module and a video interface IP core module.
The bus interaction module is mainly responsible for the functions of selection, decision and the like of all other modules connected to the bus interaction module; the MCU video stream preprocessing module is mainly responsible for preprocessing and converting the video data stream input from the external storage module according to the format and parameter type set by the system so as to facilitate the processing of the later stage; the video data stream transmission control module is mainly responsible for controlling the time sequence, parameters and the like of the data stream after the data stream pretreatment and conversion; the clock control module is mainly responsible for generating and controlling a global clock in the video image processing system; the embedded soft core control module is a control core of the FPGA module and is mainly responsible for the core functions of time sequence control, parameter configuration, physical process realization and the like of all modules in the FPGA module, and the embedded soft core control module can be used in the realization of the time sequence control, parameter configuration, physical process realization and the like, such as Xilinx MicroBlaze and the like, but is not limited to the realization of the time sequence control; the bus controller module is mainly responsible for controlling all modules connected with the bus interaction module, but is not limited to the control; the video pattern processing module is mainly responsible for mode conversion, time sequence control and the like of a video image data stream corresponding to the video interface IP core module, but is not limited to the mode conversion, the time sequence control and the like; the internal memory controller module is mainly responsible for the control of the fast memory module, including writing/reading of data stream, frame control, etc., but not limited thereto; the peripheral control module is mainly responsible for controlling all peripheral modules, including the starting/closing of peripheral, the control of working mode and the like, but is not limited to the same; the display clock generator module is mainly responsible for time sequence control of all the IP core modules and the physical layer realization modules of the video interface, but is not limited to the time sequence control; the video timing controller module is mainly responsible for processing such as data conversion and timing control when data input from the video pattern processing module is transmitted to the video interface IP core module, but is not limited thereto.
The video transmission link (i.e., transmission channel) includes a video source (i.e., video transmission source) and each transmission node (including an embedded physical repeater, a cable with an active ID, a detachable physical repeater, and a video receiving end), but is not limited thereto.
In one embodiment, a timing correction method is provided, which is applied to the video image processing system, wherein the video image processing system comprises a video source end, the video source end externally transmits video data through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes.
Referring to fig. 2, the timing correction method provided in the present embodiment includes the following steps:
Step 200, sending a timing correction command to each transmission node of each transmission channel.
Firstly, a video source end sends a time sequence correction instruction to each transmission node of each transmission channel so as to start the whole time sequence correction flow. The time sequence correction instruction can be used for indicating each transmission node to correct own time sequence parameters according to the requirements and then feeding back the time sequence parameters to the video source end; the method can also be used for indicating each transmission node to measure the state of the transmission node and feed the state back to the video source end, and the video source end initiates active correction of the time sequence of each transmission node.
Step S400, receiving feedback information of each transmission node.
After receiving the time sequence correction instruction, the transmission node of each transmission channel analyzes the time sequence correction instruction and feeds back information to the video source end according to the analysis result. The feedback information may include the current timing status of each transmission node, or may be related information of timing parameters to be corrected, which are determined by each transmission node according to the requirement.
Step S600, determining the time sequence parameters to be changed of each transmission node according to the feedback information, and sending the time sequence parameters to be changed to each transmission node so that each transmission node changes the own time sequence parameters according to the time sequence parameters to be changed.
After receiving the feedback information of each transmission node, the video source side can determine the timing parameter to be changed of each transmission node according to the feedback information, where the timing parameter refers to a parameter affecting the timing of the transmission node, and in this embodiment, the timing parameter includes at least one of a line leading edge (HFP, horizontal Front Porch), a line synchronization (HS, horizontal Synchronization), a line trailing edge (HBP, horizontal Back Porch), a field leading edge (VFP, vertical Front Porch), a field synchronization (VS, verticalSynchronization), a field trailing edge (VBP, vertical Back Porch), a refresh rate, and a pixel clock. The time sequence parameter to be changed refers to the time sequence parameter to be changed, which can be determined by the video source terminal according to the time sequence state of the transmission node, or can be determined by the transmission node according to the requirement, and the video source terminal takes the time sequence parameter to be changed fed back by the transmission node as the finally determined time sequence parameter to be changed of each transmission node.
After the video source end determines the time sequence parameters to be changed of each transmission node, the time sequence parameters to be changed can be sent to each transmission node so as to instruct each transmission node to change the own time sequence parameters according to the received time sequence parameters to be changed, and therefore correction of the time sequence parameters is achieved.
Step S800, adjusting the data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel, so that each transmission node receives video data according to the changed time sequence parameter.
After the transmission node finishes the correction of the time sequence parameter, the video source end adjusts the data frame according to the time sequence parameter to be changed, namely, the transmission node synchronously modifies the data frame structure according to the time sequence parameter to be changed while correcting the time sequence parameter, so that when each transmission node receives the video data according to the changed time sequence parameter, the time sequence change can be realized in a seamless mode, and the occurrence of abnormal display caused by time delay due to the time sequence change is avoided.
In one embodiment, the feedback information includes a timing state of each transmission node. That is, each transmission node receives the timing correction instruction sent by the video source end, and can measure the timing state of itself and feed back to the video source end. The timing state includes a link state, an MSA (MAIN STREAM Attribute) parameter state, and timing parameter information. The link state comprises a link opening state and a link closing state, when the link is opened, the video image processing system defaults to a data transmission state, and when the link is closed, the video image processing system defaults to a panel self-refreshing state; the MSA parameter state includes the nodes passing the timing parameters through the MSA parameters and the nodes ignoring the MSA parameters to generate the timing parameters by way of self-recovery, typically ignoring the MSA parameters when the nodes enter a panel self-refresh state.
Step S600, namely, the step of determining the timing parameters to be changed of each transmission node according to the feedback information includes: and determining the time sequence parameters to be changed of each transmission node according to the time sequence state of each transmission node.
When the video source receives the self time sequence state fed back by each transmission node, the video source can determine which time sequence parameters need to be changed when each transmission node subsequently enters the data transmission state, namely the time sequence parameters to be changed.
In one embodiment, the feedback information includes timing parameters to be changed determined by each transmission node according to its own timing state. In this embodiment, the timing correction includes an active correction mode and a passive correction mode, where the active correction mode refers to that the video source initiates correction of the timing of each transmission node, and the passive correction mode refers to that each transmission node initiates correction of its own timing. Under the passive correction mode, each transmission node can determine the time sequence parameter to be changed according to the self time sequence state, and then the time sequence parameter to be changed is fed back to the video source end.
Step S600, namely, the step of determining the timing parameters to be changed of each transmission node according to the feedback information includes: and determining the time sequence parameters to be changed of each transmission node according to the time sequence parameters to be changed fed back by each transmission node. That is, the video source end may directly take the respective timing parameter to be changed fed back by each transmission node as the timing parameter to be changed of each transmission node.
In one embodiment, step S800, that is, the step of adjusting the data frame according to the timing parameter to be changed and transmitting the data frame to each transmission channel, includes:
step 810, filling the timing parameter to be changed into the timing parameter information bits in the data frame to form a new data frame.
Step S820, send a new data frame to each transmission channel.
The conventional standard frame structure includes BS (Blanking Start), VB-ID (Vertical Blanking Identifier, field Blanking flag), mvid (timer value of Video data), naud (timer value of audio data), dummyVideo (for dummy data padding), BE (Blanking End), pixel data (for transmission of Video data), FS (FILL START, padding Start), fill Video (padding data, for padding when data is insufficient), and FE (Fill End). Referring to fig. 3, in the data frame structure of this embodiment, a plurality of timing parameter information bits are added on the basis of a conventional standard frame structure, where the timing parameter information bits are used to carry timing parameters, and the setting positions of the timing parameter information bits may be inserted into the standard frame structure according to requirements, or may be shared with an existing structure, or may be inserted into the standard frame structure as a separate part, and when the data frame structure is inserted alone, in order not to affect normal display, the timing parameters of the HFP, HBP, VFP, VBP parts may be appropriately adjusted, so as to ensure that when the timing parameter information bits are added, the total duration of one frame is the same as that of the standard frame structure, and thus, seamless display after subsequent timing correction is facilitated.
After the video source end determines the time sequence parameters to be changed, the time sequence parameters to be changed are filled into time sequence parameter information bits in the data frames, different time sequence parameter information bits bear different time sequence parameters to be changed, so that new data frames are formed, and then the new data frames are sent to all transmission channels, so that all the transmission channels receive video data according to the changed time sequence parameters, and seamless time sequence change and video display are realized.
In one embodiment, after step S800, that is, the step of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each transmission channel, so that each transmission node receives the video data according to the changed timing parameter, the timing correction method provided in this embodiment further includes: judging whether the video data display is abnormal or not; when the video data is abnormal, the arrangement sequence of each time sequence parameter information bit in the data frame is adjusted.
Referring to table 1, the arrangement order of the timing parameter information bits in the data frame may be as follows:
| Order 1 (default) | HFP, HS, HBP, VFP, VS, VBP, refresh rate, pixel clock |
| Order 2 | VFP, VS, VBP, HFP, HS, HBP, refresh rate, pixel clock |
| Sequence 3 | Refresh rate, HFP, HS, HBP, VFP, VS, VBP, pixel clock |
| Sequence 4 | Pixel clock, HFP, HS, HBP, VFP, VS, VBP, refresh rate |
In general, each timing parameter information bit may be arranged in order 1 as a default order, i.e., the timing is changed in order of row, field, refresh rate, and pixel clock, to ensure the integrity and stability of the changed timing. If the sequence 1 cannot be changed normally, and the display is abnormal, the arrangement order of the time sequence parameter information bits can be adjusted according to the table to switch the time sequence changing order, so that the video data can be displayed normally.
In one embodiment, after step S810, i.e. the step of filling the timing parameter to be changed into the timing parameter information bits in the data frame, the timing correction method provided in this embodiment further includes: unused bits of timing parameter information in the data frame are determined and removed.
When determining that the timing parameters to be changed are not necessarily required to be changed, particularly in a passive correction mode, the transmission node generally only transmits the timing parameters to be corrected to the video source end, and the timing parameters to be corrected are not transmitted to the video source end, so that the number of the timing parameters to be changed is often less than the number of the timing parameter information bits in the data frame.
In one embodiment, the timing correction instruction in this embodiment may include a link status flag bit, an MSA parameter flag bit, a timing correction and change request mode flag bit, and a timing parameter information bit.
The link status flag bit is used to indicate the link status of the node on the current transmission channel, i.e. link on/off, so as to simplify the link status indication, when the link is on, the video image processing system defaults to the video data transmission status, and when the link is off, the video image processing system defaults to the node having entered the panel self-refresh status.
The MSA parameter flag bit is used for indicating the MSA parameter state of the node on the current transmission channel, namely, the link uses the MSA parameter to transmit the time sequence parameter, or the link ignores the MSA parameter to generate the time sequence parameter in a self-recovery mode; typically, the MSA parameter is ignored when the node enters the panel self-refresh state.
The time sequence correction and change request mode flag bit is used for indicating the time sequence correction and change modes, and comprises an active mode and a passive mode. The active mode is to actively initiate a time sequence correction and change request through the video source end to change the time sequence for the subsequent data frame; the passive mode is passively initiated by the nodes on the data transmission channel because the time sequence parameters are incorrect or cannot be automatically recovered to be generated, so that the correct time sequence parameters are expected to be corrected in the shortest time, and seamless video data transmission is achieved as much as possible.
The time sequence parameter information bit is used for bearing time sequence parameters to be corrected and changed (short for time sequence parameters to be changed), and when the video source end initiates a time sequence correction and change request in an active mode, the time sequence parameter information bit generally bears all the time sequence parameters; when the node initiates the time sequence correction and change request in a passive mode, the time sequence parameter information bit can only bear the time sequence parameter part which cannot be automatically recovered and generated by the current node, so that the system load is reduced.
In the whole flow of the time sequence correction method, the information transfer between the video source end and each transmission node can be carried out through the time sequence correction instruction, so that the interaction efficiency and the interaction accuracy are improved. For example, when each transmission node feeds back information to the video source, the feedback information is filled into the corresponding part of the timing correction instruction, and then the timing correction instruction is returned to the video source. After the video source end determines the time sequence parameter to be changed, the time sequence parameter to be changed is filled into time sequence parameter information bits in the time sequence correction instruction, and then the time sequence correction instruction is sent to each transmission node.
The entire timing correction method is described below with a specific example:
Video source end actively corrects time sequence:
Step 01: initializing a link state flag bit of a time sequence correction instruction to be in a link opening state by a video source end;
Step 02: initializing an MSA parameter flag bit of a time sequence correction instruction to be in an neglected state by a video source end;
step 03: the occupation sequence of time sequence parameter information bits of a video source end initialization time sequence correction instruction is a default mode;
step 04: the time sequence correction and change request mode flag bit of the video source end initialization time sequence correction instruction is a measurement mode;
Step 05: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 06: the node receives the time sequence correction instruction, analyzes the time sequence correction and change request mode flag bit, and if the time sequence correction and change request mode flag bit is the measurement mode, the step 07 is switched to, otherwise, the step 9 is switched to;
Step 07: the node corrects the link state zone bit of the time sequence correction instruction according to the state of the node;
Step 08: the node corrects the MSA parameter flag bit of the time sequence correction instruction according to the state of the node;
Step 09: the node feeds back a time sequence correction instruction to the video source end;
step 10: the video source receives the time sequence correction instruction which is partially corrected by the node;
step 11: the time sequence correction and change request mode flag bit of the video source end initialization time sequence correction instruction is in an active mode;
step 12: the video source terminal fills the time sequence parameter information bit of the time sequence correction instruction by using the time sequence parameter to be changed;
Step 13: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 14: the node receives the time sequence correction instruction, analyzes the time sequence correction and change request mode flag bit, and if the time sequence correction and change request mode flag bit is the measurement mode, the step 07 is switched to, otherwise, the step 15 is switched to;
Step 15: the node analyzes the time sequence parameter information bit of the time sequence correction instruction and changes the time sequence parameter of the node;
step 16: the node receives and displays the video data by using the new time sequence parameters, if the display is abnormal, the step 17 is switched to, otherwise, the step 04 is switched to;
Step 17: the video source end changes the occupation sequence of the time sequence parameter information bits of the time sequence correction instruction, judges whether the occupation sequence is the last one preset, if not, goes to the step 04, otherwise, goes to the step 18;
Step 18: checking an MSA parameter flag bit of the time sequence correction instruction by the video source end, if the MSA parameter flag bit is used, turning to step 03, otherwise, turning to step 19;
step 19: the video source terminal initializes MSA parameter flag bit of the timing correction instruction to be in use state, and goes to step 03.
Node passive correction timing:
Step 01: initializing a link state flag bit of a time sequence correction instruction to be in a link opening state by a video source end;
Step 02: initializing an MSA parameter flag bit of a time sequence correction instruction to be in an neglected state by a video source end;
step 03: the occupation sequence of time sequence parameter information bits of a video source end initialization time sequence correction instruction is a default mode;
step 04: the time sequence correction and change request mode flag bit of the video source end initialization time sequence correction instruction is a measurement mode;
Step 05: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 06: the node receives the time sequence correction instruction, analyzes the time sequence correction and change request mode flag bit, and if the time sequence correction and change request mode flag bit is the measurement mode, the step 07 is switched to, otherwise, the step 11 is switched to;
Step 07: the node corrects the link state zone bit of the time sequence correction instruction according to the state of the node;
Step 08: the node corrects the MSA parameter flag bit of the time sequence correction instruction according to the state of the node;
Step 09: the node feeds back a time sequence correction instruction to the video source end;
step 10: the video source receives the time sequence correction instruction which is partially corrected by the node;
Step 11: the time sequence correction and change request mode flag bit of the node correction time sequence correction instruction is in a passive mode;
step 12: the node fills time sequence parameter information bits of the time sequence correction instruction by using the time sequence parameters to be changed according to own requirements;
step 13: the node feeds back a time sequence correction instruction;
Step 14: the video source end obtains time sequence parameter information bits of the time sequence correction instruction;
Step 15: the video source end judges whether the time sequence parameter information bit is a shared data unit, if so, the step 16 is switched to, and if not, the step 17 is switched to;
step 16: the video source end removes unused time sequence parameter information bits in the data frame, restores the occupied data unit to the data unit state of the standard frame structure, and goes to step 18;
Step 17: the video source end removes time sequence parameter information bits in unused data frames in the multichannel time sequence;
Step 18: the video source end adjusts the line and field time sequence part in the standard frame structure and ensures that the duration of the adjusted frame is unchanged;
Step 19: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
Step 20: the node receives the time sequence correction instruction, analyzes the time sequence correction and change request mode flag bit, and if the time sequence correction and change request mode flag bit is the measurement mode, the step 07 is switched to, otherwise, the step 21 is switched to;
step 21: the node analyzes the time sequence parameter information bit of the time sequence correction instruction and changes the time sequence parameter of the node;
Step 22: the node receives and displays the video data by using the new time sequence parameters, if the display is abnormal, the step 23 is switched to, otherwise, the step 04 is switched to;
Step 23: the video source end changes the occupation sequence of the time sequence parameter information bits of the time sequence correction instruction, judges whether the occupation sequence is the last one preset, and if not, goes to the step 04, otherwise, goes to the step 24;
Step 25: the video source end checks the MSA parameter flag bit of the time sequence correction instruction, if the MSA parameter is used, the step 03 is switched to, otherwise, the step 26 is switched to;
Step 26: the video source terminal initializes MSA parameter flag bit of the timing correction instruction to be in use state, and goes to step 03.
In one embodiment, a timing correction device is provided, which is applied to a video image processing system, wherein the video image processing system comprises a video source end, the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes.
Referring to fig. 4, the timing correction apparatus provided in this embodiment includes a first transmitting module 200, a receiving module 400, a second transmitting module 600, and a third transmitting module 800. Wherein:
a first transmitting module 200, configured to transmit a timing correction instruction to each transmission node of each transmission channel;
a receiving module 400, configured to receive feedback information of each transmission node;
The second sending module 600 is configured to determine a timing parameter to be changed of each transmission node according to the feedback information, and send the timing parameter to be changed to each transmission node, so that each transmission node changes its own timing parameter according to the timing parameter to be changed;
The third sending module 800 is configured to adjust the data frame according to the timing parameter to be changed, and send the data frame to each transmission channel, so that each transmission node receives the video data according to the changed timing parameter.
According to the time sequence correction device, when the time sequence parameters of the transmission nodes are corrected, the data frame structure is synchronously corrected according to the time sequence parameters to be changed, so that when each transmission node receives video data according to the changed time sequence parameters, the time sequence can be changed in a seamless mode, and the occurrence of abnormal display caused by time delay due to time sequence change is avoided.
In one embodiment, the feedback information includes a timing state of each transmission node; the second sending module 600 is configured to determine a timing parameter to be changed of each transmission node according to the timing status information of each transmission node.
In one embodiment, the feedback information includes timing parameters to be changed determined by each transmission node according to its own timing state; the second sending module 600 is configured to determine the timing parameter to be changed of each transmission node according to the timing parameter to be changed fed back by each transmission node.
In one embodiment, the timing parameters include at least one of a row leading edge, a row sync, a row trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, a pixel clock.
In one embodiment, the third sending module 800 includes a generating unit and a sending unit, the generating unit is configured to fill the timing parameter to be changed into the timing parameter information bits in the data frame to form a new data frame, and the sending unit is configured to send the new data frame to each transmission channel.
In one embodiment, the timing correction device further includes a judging module and an adjusting module, the judging module is used for judging whether the video data is displayed abnormally, and the adjusting module is used for adjusting the arrangement sequence of each timing parameter information bit in the data frame when the video data is displayed abnormally.
In one embodiment, the third sending module 800 further includes an adjusting unit, where the adjusting unit is configured to determine and remove unused timing parameter information bits in the data frame after the generating unit fills the timing parameter to be changed into the timing parameter information bits in the data frame.
In one embodiment, an electronic device is provided, as shown in FIG. 5, comprising a memory and a processor, the memory and the processor being communicatively coupled to each other via a bus or otherwise.
The processor may be a central processing unit (Central Processing Unit, CPU). The Processor may also be other general purpose processors, digital Signal Processors (DSP), application SPECIFIC INTEGRATED Circuits (ASIC), field-Programmable gate arrays (Field-Programmable GATE ARRAY, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above.
The memory is used as a non-transitory computer readable storage medium for storing non-transitory software programs, non-transitory computer executable programs and modules, such as the timing correction method in the embodiments of the present invention. The processor executes the various functional applications of the processor and the data processing, i.e., the instant correction method, by running non-transitory software programs, instructions, and modules stored in the memory.
The memory may include a memory program area and a memory data area, wherein the memory program area may store an operating system, at least one application program required for a function; the storage data area may store data created by the processor, etc. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory may optionally include memory located remotely from the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It will be appreciated by those skilled in the art that implementing all or part of the above-described embodiment method may be implemented by a computer program to instruct related hardware, where the program may be stored in a computer readable storage medium, and the program may include the above-described embodiment method when executed. Wherein the storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a Flash Memory (Flash Memory), a hard disk (HARD DISK DRIVE, abbreviated as HDD), a Solid state disk (Solid-state-STATE DRIVE, SSD), or the like; the storage medium may also comprise a combination of memories of the kind described above.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. The timing correction method is applied to a video image processing system, and the video image processing system comprises a video source end, wherein the video source end externally transmits video data through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the time sequence correction method is characterized by comprising the following steps:
transmitting a time sequence correction instruction to each transmission node of each transmission channel; the time sequence correction instruction is used for indicating each transmission node to correct own time sequence parameters according to requirements and then feeding back to the video source end, and is used for indicating each transmission node to measure own state and feeding back to the video source end;
Receiving feedback information of each transmission node, wherein the feedback information comprises time sequence states of each transmission node; the time sequence state comprises a link state, an MSA parameter state and time sequence parameter information; the link state comprises a link opening state and a link closing state, when the link is opened, the video image processing system defaults to a data transmission state, and when the link is closed, the video image processing system defaults to a panel self-refreshing state; the MSA parameter state comprises that a transmission node transmits a time sequence parameter through the MSA parameter and the transmission node ignores the MSA parameter to generate the time sequence parameter in a self-recovery mode;
Determining timing parameters to be changed of each transmission node according to the feedback information, and sending the timing parameters to be changed to each transmission node so that each transmission node changes the timing parameters of the transmission node according to the timing parameters to be changed;
And adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
2. The timing correction method according to claim 1, wherein the step of determining the timing parameter to be changed for each of the transmission nodes based on the feedback information includes: and determining the time sequence parameters to be changed of the transmission nodes according to the time sequence state of the transmission nodes.
3. The timing correction method according to claim 1, wherein the feedback information includes timing parameters to be changed determined by each of the transmission nodes according to its own timing state; the step of determining the timing parameters to be changed of each transmission node according to the feedback information comprises the following steps: and determining the time sequence parameters to be changed of the transmission nodes according to the time sequence parameters to be changed fed back by the transmission nodes.
4. The timing correction method of claim 1, wherein the timing parameters include at least one of a row leading edge, a row sync, a row trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, a pixel clock.
5. A timing correction method according to claim 2 or 3, wherein said step of adjusting a data frame according to said timing parameter to be changed and transmitting said data frame to each of said transmission channels comprises:
filling the time sequence parameters to be changed into time sequence parameter information bits in a data frame to form a new data frame;
and sending a new data frame to each transmission channel.
6. The timing correction method according to claim 5, further comprising, after the step of adjusting a data frame according to the timing parameter to be changed and transmitting the data frame to each of the transmission channels so that each of the transmission nodes receives video data according to the changed timing parameter:
judging whether the video data display is abnormal or not;
and when the video data is abnormal in display, adjusting the arrangement sequence of the time sequence parameter information bits in the data frame.
7. The timing correction method according to claim 5, characterized in that, after said step of filling the timing parameter to be changed in the timing parameter information bits in the data frame, the timing correction method further comprises: and determining and removing unused time sequence parameter information bits in the data frame.
8. The timing correction device is applied to a video image processing system, and the video image processing system comprises a video source end, wherein the video source end externally transmits video data through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the timing correction device is characterized by comprising:
The first sending module is used for sending a time sequence correction instruction to each transmission node of each transmission channel; the time sequence correction instruction is used for instructing each transmission node to correct the own time sequence parameter according to the requirement and then feeding back to the video source end, and is used for instructing each transmission node to measure the own state and feed back to the video source end
The receiving module is used for receiving feedback information of each transmission node, wherein the feedback information comprises time sequence states of each transmission node; the time sequence state comprises a link state, an MSA parameter state and time sequence parameter information; the link state comprises a link opening state and a link closing state, when the link is opened, the video image processing system defaults to a data transmission state, and when the link is closed, the video image processing system defaults to a panel self-refreshing state; the MSA parameter state comprises that a transmission node transmits a time sequence parameter through the MSA parameter and the transmission node ignores the MSA parameter to generate the time sequence parameter in a self-recovery mode;
The second sending module is used for determining the time sequence parameters to be changed of each transmission node according to the feedback information and sending the time sequence parameters to be changed to each transmission node so that each transmission node can change the own time sequence parameters according to the time sequence parameters to be changed;
And the third sending module is used for adjusting the data frame according to the time sequence parameter to be changed and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
9. An electronic device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the timing correction method according to any of claims 1-7 when executing the computer program.
10. A computer readable storage medium having stored therein computer instructions which when executed by a processor implement the timing correction method of any of claims 1-7.
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