CN113794850A - Timing correction method and device, electronic equipment and readable storage medium - Google Patents
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Abstract
The application relates to the technical field of data transmission, and particularly discloses a time sequence correction method and device, electronic equipment and a readable storage medium. The method comprises the following steps: sending a timing correction instruction to each transmission node of each transmission channel; receiving feedback information of each transmission node; determining a time sequence parameter to be changed of each transmission node according to the feedback information, and sending the time sequence parameter to be changed to each transmission node, so that each transmission node changes the time sequence parameter of the transmission node according to the time sequence parameter to be changed; and adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter. The time sequence correction method can realize time sequence change in a seamless mode, and avoids the occurrence of abnormal display caused by time delay caused by time sequence change.
Description
Technical Field
The present invention relates to the field of data transmission technologies, and in particular, to a timing correction method and apparatus, an electronic device, and a readable storage medium.
Background
At present, with a Video image processing system, especially a Video image processing system with DisplayPort (DP, digital Video Interface standard) of VESA (Video Electronics Standards Association), MIPI (Mobile Industry Processor Interface standard), and HDMI (High Definition Multimedia Interface standard), in the process of driving a display terminal such as a liquid crystal display, an organic light emitting diode, etc. to perform multi-channel display, when a panel area is refreshed, if a Video data transmission link is closed, a transmission node in each transmission link needs to accurately and reliably determine the start and end of refreshing the panel area, and when a plurality of areas in the panel area are refreshed simultaneously, a transmission node corresponding to the plurality of areas to be refreshed needs to maintain accurate and reliable timing, or enter a panel self-refresh state, if the subsequent data frame needs to change the time sequence to a new state, each transmission node must be switched between different time sequences, which causes time delay and further causes abnormal image display.
Therefore, how to adjust the timing of the transmission node quickly and accurately without affecting the normal display of the image is one of the problems to be solved urgently in the art.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a timing correction method, apparatus, electronic device and readable storage medium.
A time sequence correction method is applied to a video image processing system, the video image processing system comprises a video source end, the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the timing correction method comprises the following steps:
sending a timing correction instruction to each transmission node of each transmission channel;
receiving feedback information of each transmission node;
determining a time sequence parameter to be changed of each transmission node according to the feedback information, and sending the time sequence parameter to be changed to each transmission node, so that each transmission node changes the time sequence parameter of the transmission node according to the time sequence parameter to be changed;
and adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
In one embodiment, the feedback information includes a timing status of each of the transmission nodes; the step of determining the timing sequence parameter to be changed of each transmission node according to the feedback information comprises: and determining the time sequence parameters to be changed of each transmission node according to the time sequence state of each transmission node.
In one embodiment, the feedback information includes timing parameters to be changed, which are determined by each transmission node according to its own timing state; the step of determining the timing sequence parameter to be changed of each transmission node according to the feedback information comprises: and determining the time sequence parameters to be changed of each transmission node according to the time sequence parameters to be changed fed back by each transmission node.
In one embodiment, the timing parameter includes at least one of a line leading edge, a line sync, a line trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, and a pixel clock.
In one embodiment, the step of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each transmission channel includes:
filling the time sequence parameter to be changed into a time sequence parameter information bit in a data frame to form a new data frame;
and sending a new data frame to each transmission channel.
In one embodiment, after the step of adjusting a data frame according to the timing parameter to be changed and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed timing parameter, the timing correction method further includes:
judging whether the video data display is abnormal or not;
and when the video data is abnormally displayed, adjusting the arrangement sequence of each time sequence parameter information bit in the data frame.
In one embodiment, after the step of filling the timing parameter to be changed into the timing parameter information bits in the data frame, the timing correction method further includes: determining and removing the timing parameter information bits that are not used in the data frame.
A time sequence correcting device is applied to a video image processing system, the video image processing system comprises a video source end, the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the timing correction apparatus includes:
the first sending module is used for sending a timing correction instruction to each transmission node of each transmission channel;
the receiving module is used for receiving the feedback information of each transmission node;
the second sending module is used for determining the time sequence parameter to be changed of each transmission node according to the feedback information and sending the time sequence parameter to be changed to each transmission node so that each transmission node changes the time sequence parameter of the transmission node according to the time sequence parameter to be changed;
and the third sending module is used for adjusting a data frame according to the time sequence parameter to be changed and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
An electronic device comprises a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to realize the timing correction method.
A computer readable storage medium having stored therein computer instructions which, when executed by a processor, implement a timing correction method as described above.
According to the time sequence correction method, the time sequence parameters of the transmission nodes are corrected, and meanwhile, the data frame structure is synchronously modified according to the time sequence parameters to be changed, so that when each transmission node receives video data according to the changed time sequence parameters, time sequence change can be realized in a seamless mode, and the situation that display is abnormal due to time delay caused by time sequence change is avoided.
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Fig. 1 is a schematic structural diagram of a video image processing system according to an embodiment of the present application;
fig. 2 is a flowchart illustrating a timing correction method according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a modified data frame according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of a timing correction apparatus according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As described in the background art, in an application scenario in which a video image processing system drives a display terminal to perform multi-channel display, when a panel region is refreshed, a video data channel is closed, at this time, a transmission node in each transmission channel needs to accurately and reliably determine the start and end of the refreshing of the panel region, and when a plurality of regions in the panel region are refreshed simultaneously, transmission nodes corresponding to a plurality of regions to be refreshed need to maintain accurate and reliable timing sequences.
Therefore, how to adjust the timing of the transmission node quickly and accurately without affecting the normal display of the image is one of the problems that needs to be solved at present.
Therefore, the application provides a timing correction method, a timing correction device, an electronic device and a computer readable storage medium to ensure that each transmission node can quickly and accurately adjust the timing without influencing the normal display of an image in the multi-channel display process.
First, a video image processing system according to the present application will be described:
referring to fig. 1, the video image processing system includes an embedded control module, an FPGA module, an external storage module, a fast storage module, a peripheral module, a video interface physical layer implementation module, and a video transmission link.
Specifically, the embedded control module may use any embedded chip and system, and is mainly responsible for initiating signaling interaction, such as reading/writing a register, enabling/closing a video display module, peripheral control, setting parameters of the video display module, and the like; the FPGA module is mainly responsible for implementing the implementation parts which need a large amount of data processing and low round-trip delay (latency) such as storage control, peripheral control, video interface IP core implementation and the like; the external storage module is mainly responsible for storing original data streams of video images needing to be displayed in the video image processing system, and the part is applied to storage media such as NandFlash, SSD and the like, but is not limited to the storage media; the fast storage module is used for a module which needs a large amount of data processing and low round-trip delay (latency) in the implementation process of the FPGA module, and is stored with delay in order to reduce delay, and the module applies a fast and low-delay physical device, such as DDR3, but is not limited thereto; the peripheral module includes GPIO (General-purpose input/output), UART (Universal Asynchronous Receiver/Transmitter), USB (Universal Serial Bus), network port, etc., but is not limited thereto; the video interface physical layer implementation module is mainly responsible for driving the physical layer implementation required by the display module, such as, but not limited to, TX/RX (Transmitter/Receiver) -PHY of DisplayPort, DPHY of MIPI, and the like.
The FPGA module comprises a bus interaction module, an MCU (micro controller Unit) video stream preprocessing module, a video data stream transmission control module, a clock control module, an embedded soft core control module, a bus controller module, an internal storage controller module, an external control module, a display clock generator module, a video time schedule controller module, a video pattern processing module and a video interface IP core module.
The bus interaction module is mainly responsible for the functions of selection, decision and the like of all other modules connected to the bus interaction module; the MCU video stream preprocessing module is mainly responsible for preprocessing and converting the video data stream input from the external storage module according to the format and parameter types set by the system so as to facilitate the post-processing; the video data stream transmission control module is mainly responsible for controlling the time sequence, parameters and the like of the data stream after data stream preprocessing and conversion; the clock control module is mainly responsible for generating and controlling a global clock in the video image processing system; the embedded soft core control module is a control core of the FPGA module, and is mainly responsible for core functions of timing control, parameter configuration, physical process implementation and the like of all modules inside the FPGA module, and the embedded soft core control module can be used in the implementation of the core functions, such as, but not limited to, Xilinx MicroBlaze and the like; the bus controller module is mainly responsible for controlling all modules connected with the bus interaction module, but is not limited to the control; the video pattern processing module is mainly responsible for mode conversion, time sequence control and the like of video image data streams corresponding to the video interface IP core module, but is not limited to the mode conversion, the time sequence control and the like; the internal storage controller module is mainly responsible for controlling the fast storage module, including but not limited to writing/reading of data stream, frame control, etc.; the peripheral control module is mainly responsible for controlling all peripheral modules, including enabling/closing of peripherals, working mode control and the like, but not limited thereto; the display clock generator module is mainly responsible for the time sequence control of all modules for realizing the video interface IP core module and the video interface physical layer, but is not limited to the time sequence control; the video timing controller module is mainly responsible for data conversion, timing control and other processing when data input from the video pattern processing module is transmitted to the video interface IP core module, but is not limited thereto.
The video transmission link (i.e., transmission channel) includes a video source end (i.e., video transmission source) and transmission nodes (including an embedded physical repeater, a cable with a source ID, a detachable physical repeater, a video sink, etc.), but is not limited thereto.
In an embodiment, a timing correction method is provided, which is applied to the video image processing system, where the video image processing system includes a video source end, and the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel includes a plurality of transmission nodes.
Referring to fig. 2, the timing correction method provided in this embodiment includes the following steps:
step S200, sending a timing correction command to each transmission node of each transmission channel.
First, the video source end sends a timing correction command to each transmission node of each transmission channel to start the whole timing correction process. The time sequence correction instruction can be used for indicating each transmission node to correct the time sequence parameter of the transmission node according to the requirement and feeding back the time sequence parameter to the video source end; the method can also be used for indicating each transmission node to measure the self state and feed back to the video source end, and the video source end initiates active correction of the time sequence of each transmission node.
And step S400, receiving feedback information of each transmission node.
And when the transmission nodes of each transmission channel receive the timing correction instruction, analyzing the timing correction instruction and feeding back information to the video source end according to the analysis result. The feedback information may include a current timing state of each transmission node, or may be related information of a timing parameter to be corrected, which is determined by each transmission node according to a requirement.
Step S600, determining the time sequence parameter to be changed of each transmission node according to the feedback information, and sending the time sequence parameter to be changed to each transmission node, so that each transmission node changes the time sequence parameter of itself according to the time sequence parameter to be changed.
After receiving the feedback information of each transmission node, the video source end may determine a timing parameter to be changed of each transmission node according to the feedback information, where the timing parameter refers to a parameter that affects timing of the transmission node, and in this embodiment, the timing parameter includes at least one of line Front (HFP), line Synchronization (HS), line Back (HBP), field Front (VFP), field Synchronization (VS), field Back (VBP), refresh rate, and pixel clock. The time sequence parameter to be changed refers to a time sequence parameter to be changed, and can be determined by the video source end according to the time sequence state of the transmission node, or the time sequence parameter to be changed can be determined by the transmission node according to the requirement, and the video source end takes the time sequence parameter to be changed fed back by the transmission node as the finally determined time sequence parameter to be changed of each transmission node.
After determining the time sequence parameters to be changed of each transmission node, the video source end can send the time sequence parameters to be changed to each transmission node so as to instruct each transmission node to change the self time sequence parameters according to the received time sequence parameters to be changed, so that the time sequence parameters are corrected.
Step S800, adjusting the data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel, so that each transmission node receives the video data according to the changed time sequence parameter.
After the transmission node completes the correction of the time sequence parameter, the video source end also adjusts the data frame according to the time sequence parameter to be changed, namely, the time sequence parameter is corrected for the transmission node, and simultaneously, the data frame structure is synchronously modified according to the time sequence parameter to be changed, so that when each transmission node receives video data according to the changed time sequence parameter, the time sequence change can be realized in a seamless mode, and the condition that the display is abnormal due to time delay caused by the time sequence change is avoided.
In one embodiment, the feedback information includes timing status of each transmission node. That is, each transmission node receives the timing correction instruction sent by the video source end, and can measure the timing state of itself and feed back the timing state to the video source end. The time sequence state includes a link state, an MSA (Main Stream Attribute) parameter state, and time sequence parameter information. The link state comprises a link opening state and a link closing state, when the link is opened, the video image processing system is in a data transmission state by default, and when the link is closed, the video image processing system is in a panel self-refreshing state by default; the MSA parameter state comprises that the node transmits a timing parameter through an MSA parameter and the node ignores the MSA parameter to generate the timing parameter in a self-recovery mode, and the MSA parameter is ignored when the node enters a panel self-refresh state.
Step S600, namely, the step of determining the timing parameter to be changed of each transmission node according to the feedback information includes: and determining the time sequence parameters to be changed of each transmission node according to the time sequence state of each transmission node.
When the video source end receives the self time sequence state fed back by each transmission node, the time sequence parameters of each transmission node can be determined to be required to be changed when the transmission node enters a data transmission state in the following process, namely the time sequence parameters to be changed.
In one embodiment, the feedback information includes timing parameters to be changed, which are determined by each transmission node according to its own timing state. In this embodiment, the timing correction includes an active correction mode and a passive correction mode, where the active correction mode refers to that a video source end initiates correction of the timing of each transmission node, and the passive correction mode refers to that each transmission node initiates correction of its own timing. In the passive correction mode, each transmission node can determine the time sequence parameter to be changed according to the time sequence state of the transmission node, and then feeds the time sequence parameter to be changed back to the video source end.
Step S600, namely, the step of determining the timing parameter to be changed of each transmission node according to the feedback information includes: and determining the time sequence parameters to be changed of each transmission node according to the time sequence parameters to be changed fed back by each transmission node. That is, the video source end may directly use the respective to-be-changed timing parameter fed back by each transmission node as the to-be-changed timing parameter of each transmission node.
In one embodiment, the step S800 of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each transmission channel includes:
step S810, filling the timing parameter to be changed into the timing parameter information bit in the data frame to form a new data frame.
Step S820, sending a new data frame to each transmission channel.
The conventional standard frame structure includes BS (Blanking Start), VB-ID (Vertical Blanking Identifier), Mvid (timer value of Video data), Naud (timer value of audio data), dummy Video (for dummy data padding), BE (Blanking End), pixel data (for transmission of Video data), FS (Fill Start), Fill Video (Fill data for filling when data is insufficient), and FE (Fill End). Referring to fig. 3, the data frame structure of this embodiment is based on a conventional standard frame structure, and a plurality of timing parameter information bits are added, where the timing parameter information bits are used to carry timing parameters, and the setting positions of the timing parameter information bits may be inserted into the standard frame structure as needed, and may share a data unit with an existing structure, or may be inserted into the standard frame structure as an individual part.
After the video source end determines the time sequence parameters to be changed, the time sequence parameters to be changed are filled into the time sequence parameter information bits in the data frame, different time sequence parameter information bits bear different time sequence parameters to be changed, so that a new data frame is formed, the new data frame is sent to each transmission channel, each transmission channel receives video data according to the changed time sequence parameters, and seamless time sequence change and video display are achieved.
In one embodiment, in step S800, after the step of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each transmission channel, so that each transmission node receives the video data according to the changed timing parameter, the timing correction method provided in this embodiment further includes: judging whether the video data display is abnormal or not; when the video data is displayed abnormally, the arrangement sequence of the time sequence parameter information bits in the data frame is adjusted.
Referring to table 1, the sequence of the timing parameter information bits in the data frame may be as follows:
| sequence 1 (Default) | HFP, HS, HBP, VFP, VS, VBP, Refresh Rate, Pixel clock |
| Sequence 2 | VFP, VS, VBP, HFP, HS, HBP, Refresh Rate, Pixel clock |
| Sequence 3 | Refresh rateHFP, HS, HBP, VFP, VS, VBP, pixel clock |
| Sequence 4 | Pixel clock, HFP, HS, HBP, VFP, VS, VBP, refresh rate |
In general, the timing parameter information bits may be arranged in order 1 as a default order, i.e., the timing is changed in the order of row, field, refresh rate, and pixel clock to ensure the integrity and stability of the changed timing. If the sequence cannot be changed normally according to the sequence 1, which results in abnormal display, the sequence of the information bits of each timing parameter can be adjusted according to the table to switch the sequence of the change of the timing, so that the video data can be displayed normally.
In one embodiment, after step S810, namely the step of filling the timing parameter to be changed into the timing parameter information bits in the data frame, the timing correction method provided in this embodiment further includes: unused timing parameter information bits in the data frame are determined and removed.
When determining the timing sequence parameters to be changed, not all the timing sequence parameters need to be changed, especially in a passive correction mode, the transmission node generally only transmits the timing sequence parameters to be corrected to the video source end, and the timing sequence parameters not to be corrected are not transmitted to the video source end, so the number of the timing sequence parameters to be changed is often less than the timing sequence parameter information bits in the data frame.
In one embodiment, the timing correction command in this embodiment may include a link status flag bit, an MSA parameter flag bit, a timing correction and change request mode flag bit, and a timing parameter information bit.
In order to simplify the link state indication, when the link is opened, the video image processing system defaults to a video data transmission state, and when the link is closed, the video image processing system defaults to that the node has already entered a panel self-refresh state.
The MSA parameter flag bit is used for indicating the MSA parameter state of a node on the current transmission channel, namely, the link transmits a time sequence parameter by using the MSA parameter, or the link ignores the MSA parameter and generates the time sequence parameter in a self-recovery mode; typically, the MSA parameter is ignored when the node enters the panel self-refresh state.
The timing correction and change request mode flag bit is used to indicate the timing correction and change modes, including an active mode and a passive mode. The active mode is that a time sequence correction and change request is actively initiated through a video source end to change the time sequence for the subsequent data frame; the passive mode is passively initiated by the fact that the time sequence parameters are incorrect or the generation cannot be automatically recovered through the nodes on the data transmission channel, so that the correct time sequence parameters are expected to be corrected in the shortest time, and seamless video data transmission is achieved as far as possible.
The timing parameter information bit is used for bearing timing parameters to be corrected and changed (called timing parameters to be changed for short), and when a video source end initiates a timing correction and change request in an active mode, the timing parameter information bit generally bears all the timing parameters; when the node initiates the time sequence correction and change request in a passive mode, the time sequence parameter information bit can only bear the time sequence parameter part which cannot be automatically recovered and generated by the current node, so as to reduce the system load.
In the whole process of the time sequence correction method, information transmission between the video source end and each transmission node can be carried out through the time sequence correction instruction, and interaction efficiency and interaction accuracy are improved. For example, when each transmission node feeds back information to the video source end, the transmission node fills the feedback information into a corresponding portion of the timing correction instruction and then returns the timing correction instruction to the video source end. After determining the time sequence parameters to be changed, the video source end fills the time sequence parameters to be changed into the time sequence parameter information bits in the time sequence correction instruction and then sends the time sequence correction instruction to each transmission node.
The following describes the entire timing correction method with a specific example:
the video source end actively corrects the time sequence:
step 01: the link state flag bit of the video source end initialization timing correction instruction is in a link starting state;
step 02: the MSA parameter flag bit of the video source end initialization timing correction instruction is in a neglected state;
step 03: the video source end initializes the sequence of the time sequence parameter information bit of the time sequence correction instruction as the default mode;
step 04: the video source end initializes the time sequence correction of the time sequence correction instruction and changes the mode flag bit of the request as the measuring mode;
step 05: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 06: the node receives the time sequence correction instruction and analyzes the time sequence correction and change request mode zone bit, if the time sequence correction and change request mode zone bit is a measurement mode, the step is switched to the step 07, otherwise, the step is switched to the step 9;
step 07: the node corrects the link state flag bit of the time sequence correction instruction according to the state of the node;
step 08: the node corrects the MSA parameter flag bit of the time sequence correction instruction according to the state of the node;
step 09: the node feeds back a time sequence correction instruction to the video source end;
step 10: a video source end receives a timing correction instruction of which a node is partially corrected;
step 11: the video source end initializes the time sequence correction of the time sequence correction instruction and changes the mode flag bit of the request as the active mode;
step 12: the video source end fills the time sequence parameter information bit of the time sequence correction instruction by using the time sequence parameter to be changed;
step 13: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 14: the node receives the time sequence correction instruction and analyzes the time sequence correction and change request mode zone bit, if the time sequence correction and change request mode zone bit is a measurement mode, the step is switched to the step 07, otherwise, the step is switched to the step 15;
step 15: the node analyzes the time sequence parameter information bit of the time sequence correction instruction and changes the time sequence parameter of the node;
step 16: the node receives and displays the video data by using the new time sequence parameter, if the display is abnormal, the step 17 is carried out, otherwise, the step 04 is carried out;
and step 17: the video source end changes the occupation sequence of the time sequence parameter information bits of the time sequence correction instruction and judges whether the occupation sequence is the last one preset, if not, the step 04 is carried out, otherwise, the step 18 is carried out;
step 18: the video source end checks the MSA parameter flag bit of the time sequence correction instruction, if the MSA parameter is used, the step 03 is carried out, otherwise, the step 19 is carried out;
step 19: the video source initializes the MSA flag of the timing correction command to the active state, and goes to step 03.
And (3) passively correcting the time sequence by the node:
step 01: the link state flag bit of the video source end initialization timing correction instruction is in a link starting state;
step 02: the MSA parameter flag bit of the video source end initialization timing correction instruction is in a neglected state;
step 03: the video source end initializes the sequence of the time sequence parameter information bit of the time sequence correction instruction as the default mode;
step 04: the video source end initializes the time sequence correction of the time sequence correction instruction and changes the mode flag bit of the request as the measuring mode;
step 05: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 06: the node receives the time sequence correction instruction and analyzes the time sequence correction and change request mode zone bit, if the time sequence correction and change request mode zone bit is a measurement mode, the step is switched to the step 07, otherwise, the step is switched to the step 11;
step 07: the node corrects the link state flag bit of the time sequence correction instruction according to the state of the node;
step 08: the node corrects the MSA parameter flag bit of the time sequence correction instruction according to the state of the node;
step 09: the node feeds back a time sequence correction instruction to the video source end;
step 10: a video source end receives a timing correction instruction of which a node is partially corrected;
step 11: the time sequence correction and change request mode flag bit of the time sequence correction instruction is modified by the node to be a passive mode;
step 12: filling a time sequence parameter information bit of a time sequence correction instruction by using a time sequence parameter to be changed according to the self requirement of the node;
step 13: feeding back a timing correction instruction by the node;
step 14: the video source end acquires a time sequence parameter information bit of a time sequence correction instruction;
step 15: the video source end judges whether the time sequence parameter information bit is a common data unit, if so, the step 16 is carried out, otherwise, the step 17 is carried out;
step 16: the video source removes the unused time sequence parameter information bit in the data frame, and restores the data unit occupied by the bit to the data unit state of the standard frame structure, and goes to step 18;
and step 17: the video source end removes the time sequence parameter information bits in the unused data frames in the multichannel time sequence;
step 18: the video source end adjusts the line and field time sequence part in the standard frame structure and ensures the duration time of the adjusted frame to be unchanged;
step 19: the video source end sends a time sequence correction instruction to all nodes on a transmission channel;
step 20: the node receives the timing correction instruction and analyzes the flag bit of the timing correction and change request mode, if the flag bit is a measurement mode, the step is carried out to the step 07, otherwise, the step is carried out to the step 21;
step 21: the node analyzes the time sequence parameter information bit of the time sequence correction instruction and changes the time sequence parameter of the node;
step 22: the node receives and displays the video data by using the new time sequence parameter, if the display is abnormal, the step 23 is carried out, otherwise, the step 04 is carried out;
step 23: the video source end changes the occupation sequence of the time sequence parameter information bits of the time sequence correction instruction and judges whether the occupation sequence is the last one preset, if not, the step is switched to the step 04, otherwise, the step is switched to the step 24;
step 25: the video source end checks the MSA parameter flag bit of the time sequence correction instruction, if the MSA parameter is used, the step 03 is carried out, otherwise, the step 26 is carried out;
step 26: the video source initializes the MSA flag of the timing correction command to the active state, and goes to step 03.
In one embodiment, a timing correction apparatus is provided for a video image processing system, where the video image processing system includes a video source, and the video source externally transmits video data through a plurality of transmission channels, and each transmission channel includes a plurality of transmission nodes.
Referring to fig. 4, the timing correction apparatus of the present embodiment includes a first sending module 200, a receiving module 400, a second sending module 600, and a third sending module 800. Wherein:
a first sending module 200, configured to send a timing correction instruction to each transmission node of each transmission channel;
a receiving module 400, configured to receive feedback information of each transmission node;
a second sending module 600, configured to determine a to-be-changed timing parameter of each transmission node according to the feedback information, and send the to-be-changed timing parameter to each transmission node, so that each transmission node changes its own timing parameter according to the to-be-changed timing parameter;
a third sending module 800, configured to adjust the data frame according to the time sequence parameter to be changed, and send the data frame to each transmission channel, so that each transmission node receives the video data according to the changed time sequence parameter.
According to the time sequence correction device, the time sequence parameters of the transmission nodes are corrected, and meanwhile, the data frame structure is synchronously modified according to the time sequence parameters to be changed, so that when each transmission node receives video data according to the changed time sequence parameters, time sequence change can be realized in a seamless mode, and the situation that display is abnormal due to time delay caused by time sequence change is avoided.
In one embodiment, the feedback information includes timing status of each transmission node; the second sending module 600 is configured to determine a timing parameter to be changed of each transmission node according to the timing status information of each transmission node.
In one embodiment, the feedback information includes timing parameters to be changed, which are determined by each transmission node according to the self timing state; the second sending module 600 is configured to determine a timing parameter to be changed of each transmission node according to the timing parameter to be changed fed back by each transmission node.
In one embodiment, the timing parameters include at least one of a line leading edge, a line sync, a line trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, a pixel clock.
In one embodiment, the third sending module 800 includes a generating unit and a sending unit, the generating unit is configured to fill the timing parameter to be changed into the timing parameter information bits in the data frame to form a new data frame, and the sending unit is configured to send the new data frame to each transmission channel.
In one embodiment, the timing correction apparatus provided in this embodiment further includes a determining module and an adjusting module, the determining module is configured to determine whether the video data display is abnormal, and the adjusting module is configured to adjust an arrangement sequence of each timing parameter information bit in the data frame when the video data display is abnormal.
In one embodiment, the third sending module 800 further includes an adjusting unit, and the adjusting unit is configured to determine and remove the timing parameter information bits that are not used in the data frame after the generating unit fills the timing parameter to be changed into the timing parameter information bits in the data frame.
In one embodiment, an electronic device is provided, as shown in fig. 5, comprising a memory and a processor, which are communicatively connected to each other, via a bus or in other ways.
The processor may be a Central Processing Unit (CPU). The Processor may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, or a combination thereof.
The memory, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the timing correction method in the embodiments of the present invention. The processor executes various functional applications and data processing of the processor, i.e., the order correction method, by executing non-transitory software programs, instructions, and modules stored in the memory.
The memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by the processor, and the like. Further, the memory may include high speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory located remotely from the processor, and such remote memory may be coupled to the processor via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD), a Solid State Drive (SSD), or the like; the storage medium may also comprise a combination of memories of the kind described above.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A time sequence correction method is applied to a video image processing system, the video image processing system comprises a video source end, the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; the time sequence correction method is characterized by comprising the following steps:
sending a timing correction instruction to each transmission node of each transmission channel;
receiving feedback information of each transmission node;
determining a time sequence parameter to be changed of each transmission node according to the feedback information, and sending the time sequence parameter to be changed to each transmission node, so that each transmission node changes the time sequence parameter of the transmission node according to the time sequence parameter to be changed;
and adjusting a data frame according to the time sequence parameter to be changed, and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
2. The timing correction method of claim 1, wherein the feedback information comprises a timing status of each of the transmission nodes; the step of determining the timing sequence parameter to be changed of each transmission node according to the feedback information comprises: and determining the time sequence parameters to be changed of each transmission node according to the time sequence state of each transmission node.
3. The timing correction method according to claim 1, wherein the feedback information includes timing parameters to be changed, which are determined by each of the transmission nodes according to its own timing state; the step of determining the timing sequence parameter to be changed of each transmission node according to the feedback information comprises: and determining the time sequence parameters to be changed of each transmission node according to the time sequence parameters to be changed fed back by each transmission node.
4. The timing correction method of claim 1, wherein the timing parameters comprise at least one of a line leading edge, a line sync, a line trailing edge, a field leading edge, a field sync, a field trailing edge, a refresh rate, and a pixel clock.
5. The method according to claim 2 or 3, wherein the step of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each of the transmission channels comprises:
filling the time sequence parameter to be changed into a time sequence parameter information bit in a data frame to form a new data frame;
and sending a new data frame to each transmission channel.
6. The timing correction method of claim 5, wherein after the step of adjusting the data frame according to the timing parameter to be changed and sending the data frame to each of the transmission channels, so that each of the transmission nodes receives video data according to the changed timing parameter, the timing correction method further comprises:
judging whether the video data display is abnormal or not;
and when the video data is abnormally displayed, adjusting the arrangement sequence of each time sequence parameter information bit in the data frame.
7. The timing correction method of claim 5, wherein after the step of padding the timing parameter to be changed into the timing parameter information bits in the data frame, the timing correction method further comprises: determining and removing the timing parameter information bits that are not used in the data frame.
8. A time sequence correcting device is applied to a video image processing system, the video image processing system comprises a video source end, the video source end transmits video data outwards through a plurality of transmission channels, and each transmission channel comprises a plurality of transmission nodes; characterized in that the timing correction apparatus comprises:
the first sending module is used for sending a timing correction instruction to each transmission node of each transmission channel;
the receiving module is used for receiving the feedback information of each transmission node;
the second sending module is used for determining the time sequence parameter to be changed of each transmission node according to the feedback information and sending the time sequence parameter to be changed to each transmission node so that each transmission node changes the time sequence parameter of the transmission node according to the time sequence parameter to be changed;
and the third sending module is used for adjusting a data frame according to the time sequence parameter to be changed and sending the data frame to each transmission channel so that each transmission node receives video data according to the changed time sequence parameter.
9. An electronic device comprising a memory and a processor, the memory storing a computer program, wherein the processor implements the timing correction method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the timing correction method of any one of claims 1-7.
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| CN202111161338.1A CN113794850B (en) | 2021-09-30 | Timing correction method, apparatus, electronic device and readable storage medium |
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