CN113793867B - Electrode structure and manufacturing method thereof - Google Patents
Electrode structure and manufacturing method thereof Download PDFInfo
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- CN113793867B CN113793867B CN202111351576.9A CN202111351576A CN113793867B CN 113793867 B CN113793867 B CN 113793867B CN 202111351576 A CN202111351576 A CN 202111351576A CN 113793867 B CN113793867 B CN 113793867B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
Abstract
The application provides an electrode structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The electrode structure comprises a substrate, a first dielectric layer and a contact metal layer, wherein the first dielectric layer and the contact metal layer are positioned on one side of the substrate, the first dielectric layer surrounds the contact metal layer, the first barrier metal layer is positioned on one side of the contact metal layer, and the interconnection metal layer is positioned on one side of the first barrier metal layer. The electrode structure and the manufacturing method thereof can be used for manufacturing the electrode structure with a flat metal structure and better reliability.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to an electrode structure and a manufacturing method thereof.
Background
For a radio frequency device, the grid metal usually adopts a T-shaped structure, so that the grid metal is completely filled in a grid groove structure formed by a dielectric layer; meanwhile, a metal plate structure (a grid field plate) with a certain size is formed in the two side areas of the bottom of the grid groove, and electric field lines near the bottom of the grid groove are modulated.
At present, when a grid structure is manufactured, the grid structure is manufactured by adopting a one-time evaporation process, however, because a step with a certain thickness exists at the position of a grid groove, the continuity of grid metal near the opening of the grid groove is poor, cracks exist, the grid blocking metal cannot play a role in blocking the grid from contacting the metal and the grid from being interconnected, and the reliability of the grid is poor; meanwhile, the gate groove step can cause the gate metal to continue the step-shaped morphology, so that the top of the gate metal has a sharp-angled morphology, the problems of uneven coverage, easy cracking, large stress and the like of a dielectric layer at the top of the gate are caused, and the gate and the source field plate are easy to break down, so that the reliability of the gate of the device is poor.
In summary, the prior art has many problems of poor reliability caused by uneven metal structure of the device gate.
Disclosure of Invention
The present application is directed to an electrode structure and a method for fabricating the same, so as to solve the problems of poor reliability caused by uneven metal structure of a device gate in the prior art.
In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:
in one aspect, an embodiment of the present application provides an electrode structure, where the electrode structure includes:
a substrate;
the first dielectric layer and the contact metal layer are positioned on one side of the substrate, wherein the first dielectric layer is arranged around the contact metal layer in a surrounding mode;
the continuous first barrier metal layer is positioned on one side, far away from the substrate, of the contact metal layer;
and the interconnection metal layer is positioned on one side of the first barrier metal layer, which is far away from the substrate.
Optionally, the projection of the interconnection metal layer on the substrate includes a projection of the contact metal layer on the substrate, and the projection of the first barrier metal layer on the substrate includes a projection of the contact metal layer on the substrate.
Optionally, a trench structure is arranged in the first dielectric layer, and the contact metal layer is arranged in the trench structure;
when the thickness of the contact metal layer is smaller than the depth of the groove, part or all of the first barrier metal layer is positioned in the groove structure.
Optionally, the electrode structure further comprises a second barrier metal layer, and the second barrier metal layer covers the interconnection metal layer.
Optionally, a projection of the first barrier metal layer on the substrate includes the contact metal layer, the first barrier metal layer includes an adhesion layer and a barrier layer, the adhesion layer is located at a side close to the contact metal layer, and the barrier layer is located at a side close to the interconnect metal layer.
Optionally, the contact metal layer is made of a material including Ni, Pt, Ti, W, and a combination thereof, the barrier metal layer is made of a material including Pt, Pd, W, Ti, TiW, and a combination thereof, and the interconnection metal layer is made of a material including Au, W, Cu, Al, and a combination thereof.
Optionally, the substrate comprises:
the semiconductor device comprises a substrate and a semiconductor function layer positioned on one side of the substrate.
On the other hand, an embodiment of the present application further provides an electrode structure manufacturing method, for manufacturing the electrode structure as described above, the method includes:
depositing a first dielectric layer based on a substrate;
etching the first dielectric layer by using a first photoresist layer with a first opening to form a groove structure;
stripping the first photoresist layer after depositing the contact metal layer based on the groove structure;
manufacturing a second photoresist layer with a second opening, wherein the contact metal layer is positioned in the second opening, and the projection of the second opening on the substrate comprises the projection of the contact metal layer on the substrate;
and stripping the second photoresist layer after sequentially depositing the first barrier metal layer and the interconnection metal layer based on the second opening.
Optionally, the step of depositing a contact metal layer based on the trench structure comprises:
depositing a contact metal layer based on the trench structure until a thickness of the contact metal layer is equal to or greater than a depth of the trench structure; or
And sequentially depositing a contact metal layer and a first barrier metal layer based on the groove structure until the thickness of the contact metal layer and the thickness of the first barrier metal layer are equal to or larger than the depth of the groove structure.
Optionally, when depositing metal in the second opening, the method further comprises:
and after the step of depositing the interconnection metal layer is completed, continuously depositing a second barrier metal layer along one side of the interconnection metal layer.
Compared with the prior art, the method has the following beneficial effects:
the electrode structure comprises a substrate, a first dielectric layer and a contact metal layer, wherein the first dielectric layer and the contact metal layer are positioned on one side of the substrate, the first dielectric layer surrounds the contact metal layer, the continuous first barrier metal layer is positioned on one side, far away from the substrate, of the contact metal layer, the interconnection metal layer is positioned on one side, far away from the substrate, of the first barrier metal layer, and the second dielectric layer covers the electrode structure and the first dielectric layer.
In the electrode structure provided by the application, the contact metal is only positioned in the groove structure, so that the groove of the groove structure part is filled with the metal, the step of the groove structure part is eliminated, the continuity of the first barrier metal layer covered on the groove structure part is good on the flat surface, the first barrier metal layer plays a good barrier role between the contact metal layer and the interconnection metal layer, and the reliability of the electrode structure is improved; meanwhile, the interconnection metal layer covered on the first barrier metal layer continues the bottom flat structure to obtain a flat top structure, so that when a dielectric layer is required to cover the top of the electrode, the dielectric layer can be uniformly covered, the defects that the dielectric layer is easy to crack, the stress is large, the electrode and the electrode are easy to break down and the like are overcome, and the reliability of the electrode structure is improved.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic structural diagram of an electrode structure provided in the prior art.
Fig. 2 is a schematic flow chart of a method for manufacturing an electrode structure according to an embodiment of the present disclosure.
Fig. 3 is a schematic structural diagram corresponding to S102 provided in the embodiment of the present application.
Fig. 4 is a schematic structural diagram of a substrate with a first photoresist layer according to an embodiment of the present disclosure.
Fig. 5 is a schematic structural diagram corresponding to S104 provided in the embodiment of the present application.
Fig. 6 is a schematic structural diagram of a deposited contact metal layer according to an embodiment of the present disclosure.
Fig. 7 is a schematic structural diagram corresponding to S106 according to an embodiment of the present application.
Fig. 8 is a schematic structural diagram corresponding to S108 provided in the embodiment of the present application.
Fig. 9 is a schematic structural diagram of a deposited first barrier metal layer and an interconnect metal layer according to an embodiment of the present disclosure.
Fig. 10 is a schematic structural diagram of the second photoresist layer stripped according to the embodiment of the present application.
Fig. 11 is a schematic structural diagram of an electrode structure according to an embodiment of the present application.
Fig. 12 is a schematic structural diagram including an adhesion layer and a barrier layer according to an embodiment of the present disclosure.
Fig. 13 is a schematic structural diagram of a device including a second barrier metal layer according to an embodiment of the present disclosure.
Fig. 14 is a schematic structural diagram of a portion of a first barrier metal layer located in a trench structure according to an embodiment of the present disclosure.
In the figure:
110-a substrate; 120-a semiconductor functional layer; 130-a first dielectric layer; 140-a first photoresist layer; 141-a first opening; 150-a contact metal layer; 160-a second photoresist layer; 161-a second opening; 170 — first barrier metal layer; 171-an adhesion layer; 172-a barrier layer; 180-interconnect metal layer; 190-a second dielectric layer; 200-source field plate; 210-a second barrier metal layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that the term "B is located on one side of a" means that B is epitaxially grown on the hierarchical structure of a, and a is connected with B. The terms "growing D along one side of C" or "growing D based on one side of C" both mean that D is grown on the epitaxial growth face of C in the epitaxial direction, and D is connected to C. The term "growth side" refers to the side of each layered structure facing the epitaxial growth direction, and the opposite side is the "back side".
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
As described in the background art, the main reason for the poor reliability of the gate of the device in the prior art is that in the prior art, after one evaporation and stripping process, the continuity of the gate metal near the gate trench opening is poor, which results in poor gate reliability. For example, as shown in fig. 1, which is a schematic cross-sectional structure diagram of a "T" shaped gate in the prior art, it can be seen from the figure that, due to the presence of the gate trench in the dielectric layer 1, the gate contact metal and the gate blocking metal present a "broken" shape above the edge of the gate trench, and a metal crack exists, so that the gate blocking metal cannot function as a blocking gate contact metal and a gate interconnection metal, and finally, the gate reliability is poor. Meanwhile, the gate groove step can cause the gate metal to continue the step-shaped morphology, so that the top of the gate metal has a sharp-angled morphology, the problems of uneven coverage, easy cracking, large stress and the like of a dielectric layer at the top of the gate are caused, and the gate and the source field plate are easy to break down, so that the reliability of the gate of the device is poor.
In view of this, the present application provides an electrode structure manufacturing method, which obtains a gate metal shape with a flat top and complete barrier metal through two evaporation and stripping processes, thereby improving the gate barrier metal coverage integrity and the gate metal top dielectric layer coverage quality. It should be noted that the electrode structure manufacturing method may be used for manufacturing a gate metal structure, and of course, other metal structures, such as a source metal structure or a drain metal structure, may also be manufactured, which is not limited herein. For convenience of description, the present application is described with a gate metal structure, and on this basis, the trench structure is a gate trench structure.
The following is an exemplary description of the semiconductor fabrication method provided in the present application:
as an implementation manner, referring to fig. 2, the method for manufacturing the electrode structure includes:
s102, depositing a first dielectric layer based on a substrate.
And S104, etching the first dielectric layer by using the first photoresist layer with the first opening to form a groove structure.
And S106, stripping the first photoresist layer after the contact metal layer is deposited on the basis of the groove structure.
S108, manufacturing a second photoresist layer with a second opening, wherein the contact metal layer is located in the second opening, and the projection of the second opening on the substrate includes the projection of the contact metal layer on the substrate.
And S110, sequentially depositing a first barrier metal layer and an interconnection metal layer on the basis of the second opening, and stripping the second photoresist layer.
The electrode structure provided by the application can be applied to a semiconductor device, and on the basis, the substrate can comprise a substrate and a semiconductor functional layer, and the semiconductor functional layer is connected with a growth surface of the substrate. In the present application, the material of the substrate is not limited, and for example, a sapphire substrate, a SiC substrate, or the like can be used. The structure of the substrate after epitaxially growing the semiconductor function layer and the first dielectric layer is shown in fig. 3. The process of epitaxial growth is not limited in this application, for example, the semiconductor functional layer 120 is grown on the growth surface of the substrate 110 by a vapor phase epitaxy or molecular beam epitaxy process, and then the first dielectric layer 130 is grown on the growth surface of the semiconductor functional layer 120 by epitaxy. At this time, the back surface of the semiconductor functional layer 120 is connected to the growth surface of the substrate 110, and the back surface of the first dielectric layer 130 is connected to the growth surface of the semiconductor functional layer 120.
It should be noted that the semiconductor functional layer 120 refers to a main hierarchical structure of device functions that can be realized, for example, the semiconductor functions further include a channel layer, a barrier layer, and the like, in other words, the semiconductor functional layer 120 may be different for different devices, and is not limited herein. In addition, the first dielectric layer 130 is an insulating layer, for example, SiO2And an insulating layer of SiN or the like.
Referring to fig. 4, after the basic structure is prepared, a gate trench region needs to be defined on the first dielectric layer 130, that is, a photolithography process is performed on the surface of the first dielectric layer 130 through the first photoresist layer 140, wherein the first photoresist layer 140 is provided with a first opening 141, in the etching process, the first dielectric layer 130 in the orthographic projection region of the first opening 141 is partially or completely etched, and then a gate trench structure is etched on the first dielectric layer 130, as shown in fig. 5. Since the definition of the gate trench region by using the first photoresist layer 140 is prior art, it is not described herein again.
It should be noted that, referring to fig. 6, after the gate trench structure is fabricated by using the first photoresist layer 140, the first photoresist layer 140 is not removed immediately, but the first photoresist layer 140 is retained temporarily, and the contact metal layer 150 is deposited based on the gate trench structure. Due to the existence of the first photoresist layer 140, the height difference between the surface of the first photoresist layer 140 and the bottom of the gate trench structure is further enhanced, and further, when the contact metal layer 150 is deposited, the contact metal in the gate trench structure and the contact metal on the surface of the first photoresist layer 140 are more easily separated, so that the effect of removing the contact metal layer 150 on the surface of the first photoresist layer 140 by a subsequent stripping process is better.
It is understood that the contact metal layer 150 in the gate trench structure is located at the same level as the first dielectric layer 130. Meanwhile, when the contact metal layer 150 is manufactured, an evaporation process can be adopted.
After the contact metal layer 150 is fabricated, the first photoresist layer 140 needs to be stripped, for example, the first photoresist layer 140 is removed by solvent immersion, and correspondingly, when the first photoresist layer 140 is stripped, the contact metal on the surface of the first photoresist layer 140 is stripped, and then only the contact metal layer 150 exists in the gate trench structure, the portion of the gate trench structure filled with the contact metal layer 150 can be more flat, and the structure after the first photoresist layer 140 is stripped is as shown in fig. 7.
It should be noted that, according to the present invention, the gate contact metal layer 150 is directly evaporated after the gate trench structure is etched, and compared with the prior art, the processes of photoresist removal, photolithography and development are reduced, so that the pollution of the gate trench in the conventional process is reduced, and the gate reliability is improved.
After the first evaporation and stripping process is completed, the application also performs a second evaporation and stripping process.
First, a second photoresist layer 160 with a second opening 161 is formed on the surface of the above-mentioned hierarchical structure, as shown in fig. 8, it can be understood that, in order to form a "T" shaped gate, the contact metal layer 150 faces the second opening 161, and the projection of the second opening on the substrate includes the projection of the contact metal layer 150 on the substrate, in other words, in the view of the cross-sectional structure, the width of the second opening 161 is greater than the width of the contact metal layer 150, and further, when performing the second evaporation process, the gate metal can be deposited along the surfaces of the contact metal layer 150 and the first dielectric layer 130 in the second opening 161 to form a "T" shaped gate structure.
After the second photoresist layer 160 is formed, referring to fig. 9, a gate metal evaporation process may be used to sequentially deposit the first barrier metal layer 170 and the interconnection metal layer 180 based on the second opening 161, wherein the first barrier metal layer 170 is used to isolate the interconnection metal layer 180 from the contact metal layer 150, so as to prevent the interconnection metal layer 180 from communicating with the contact metal layer 150, thereby avoiding inter-metal diffusion and improving the reliability of the gate.
Similarly, the second photoresist layer 160 can be used to separate the gate metal in the second opening 161 from the gate metal on the surface of the second photoresist layer 160, and then the second photoresist layer 160 is stripped, and simultaneously the metal on the surface of the second photoresist layer is stripped, and the structure after the second photoresist layer 160 is stripped is as shown in fig. 10.
After two times of evaporation and stripping processes, the surface of the gate groove bottom contact metal layer 150 is flush with the surface of the first dielectric layer 130, the gate barrier metal completely and continuously covers between the gate contact metal and the gate interconnection metal, and the gate barrier metal plays a good role in blocking between the gate contact metal and the gate interconnection metal, so that the effect of improving the reliability of the gate metal is achieved.
Meanwhile, in the second gate metal evaporation process, the gate contact metal is not evaporated, so that the contact area between the gate contact metal and the first dielectric layer 130 below the gate metal is reduced, the mutual reaction and diffusion between the gate contact metal and the dielectric layer below the gate contact metal are reduced, the stability of the gate metal and the long-term reliability of a device are improved, and in addition, the resistance of the gate metal and the parasitic capacitance of the gate are reduced.
And compared with the prior art, the method can be realized on the basis of the conventional process without adding an additional photomask, so that the process is simpler and is beneficial to actual production.
As an alternative implementation, in manufacturing a semiconductor device based on the electrode structure, after the step of S110, the method further includes:
and S112, depositing a second dielectric layer on the surface of the wafer to cover the interconnection metal layer and the surface of the first dielectric layer.
And S114, manufacturing a source field plate structure on the top of the grid and on one side close to the drain electrode. Referring to fig. 11, after depositing the gate metal, it is necessary to deposit a second dielectric layer 190 on the wafer surface, cover the second dielectric layer 190 on the surfaces of the interconnection metal layer 180 and the first dielectric layer 130, and then fabricate a source field plate 200 along the top of the second dielectric layer 190 and the side close to the drain. The wafer surface described herein refers to the surface of a device structure that has been formed by the aforementioned process.
It should be noted that, because the bottom metal of the gate trench is flush with the surface of the first dielectric layer, the first barrier metal layer 170 and the interconnection metal layer 180 are also flatly disposed, and the top of the gate metal is flat, when the second dielectric layer 190 is deposited, the second dielectric layer 190 is uniformly covered, is not easy to crack, has small stress, reduces the risk of breakdown between the gate metal and the source field plate 200, and improves the reliability of the gate of the device.
The second dielectric layer 190 is also an insulating layer, and optionally, the materials for manufacturing the second dielectric layer 190 and the first dielectric layer 130 may be the same or different, and are not limited herein.
Optionally, S106 includes:
depositing a contact metal layer 150 based on the trench structure until a thickness of the contact metal layer 150 is equal to a depth of the trench structure; or
The contact metal layer 150 and the first barrier metal layer 170 are sequentially deposited based on the trench structure until the sum of the thicknesses of the contact metal layer 150 and the first barrier metal layer 170 is equal to the depth of the trench structure.
That is, as one implementation, when the contact metal layer 150 is fabricated using an evaporation process, the thickness of the contact metal layer 150 may be less than or equal to the depth of the gate trench. When the thickness of the contact metal layer 150 is equal to the depth of the gate trench, the surface of the contact metal layer 150 is flush with the surface of the first dielectric layer 130, so that the surface is more even when the first barrier metal layer 170 and the interconnection metal layer 180 are deposited later.
When the thickness of the contact metal layer 150 is less than the depth of the gate trench, the deposition of the barrier metal is continued after the deposition of the contact metal layer 150 until the surface of the barrier metal is flush with the surface of the first dielectric layer 130. On this basis, it should be noted that, in an implementation manner, when performing the second evaporation + stripping process, the interconnect metal layer 180 may be directly deposited after the second photoresist layer 160 is fabricated, and at this time, the first barrier metal layer 170 is entirely located in the gate trench structure. In another implementation manner, when performing the second evaporation + stripping process, after the second photoresist layer 160 is fabricated, the first barrier metal layer 170 is deposited first, and then the interconnect metal layer 180 is epitaxially deposited, at this time, the first barrier metal layer 170 partially belongs to the gate trench structure, and partially lies above the gate trench structure. And the projection of the first barrier metal layer 170 on the substrate above the gate trench structure completely includes the projection of the contact metal layer 150 on the substrate, thereby effectively preventing the metal in the interconnection metal layer 180 from diffusing to the first dielectric layer 130.
Of course, in other implementations, the top of the contact metal layer 150 may also extend beyond the upper surface of the first dielectric layer 130, which is not limited herein.
It should be noted that the materials of the contact metal layer 150, the first barrier metal layer 170, and the interconnection metal layer 180 may not be the same, or may be layered, alternatively, the material for forming the contact metal layer 150 may be a metal such as Ni, Pt, Ti, W, or a combination thereof, the material for forming the barrier metal layer may be a metal such as Pt, Pd, W, Ti, TiW, or a combination thereof, and the material for forming the interconnection metal layer 180 may be a metal such as Au, W, Cu, Al, or a combination thereof. The above materials may be layered in each hierarchical structure, and the materials of different layers are different, or each hierarchical structure may be made of an alloy of the above metals.
For example, the contact metal layer 150 may be made of Ni, the barrier metal layer may be made of Pt, and on this basis, since Pt is an inert metal, the adhesion between Pt and the first dielectric layer 130 is not strong, and since two ends of the barrier metal layer respectively need to be in contact with the first dielectric layer 130, in order to enhance the adhesion between Pt and the first dielectric layer, please refer to fig. 12, the first barrier metal layer 170 includes an adhesion layer 171 and a barrier layer 172. The step of sequentially growing the first barrier metal layer 170 based on the second opening 161 includes:
and depositing an adhesion layer and a barrier layer in sequence based on the second opening.
That is, the first barrier metal layer 170 may include two layers, wherein the material of the adhesion layer 171 may be Ti to enhance adhesion with the first dielectric layer 130, and the material of the barrier layer 172 is still Pt to prevent metal diffusion between the contact metal layer 150 and the interconnect metal layer 180.
In addition, in practical applications, the metal of the interconnection metal layer 180 may also diffuse through the second dielectric layer 190 to the second dielectric layer 190, which affects the stability of the gate. To avoid this, when depositing metal in the second opening, the method further comprises:
after the deposition step of the interconnect metal layer 180 is completed, the second barrier metal layer 210 is deposited continuously along one side of the interconnect metal layer 180.
The second barrier metal layer 210 and the first barrier metal layer 170 may be made of the same metal material, for example, both materials are Pt. After the interconnection metal layer 180 is deposited, a second barrier metal layer 210 is deposited along the deposition surface of the interconnection metal layer 180, so that the interconnection metal layer 180 is isolated from the second dielectric layer 190, and the situation that metal in the interconnection metal layer 180 diffuses to the second dielectric layer 190 is avoided.
The electrode structure manufactured by the electrode structure manufacturing method provided by the application can ensure the flatness and continuity of the first barrier metal layer and the interconnection metal layer 180, further improve the reliability of the gate metal, reduce the resistance of the electrode metal, and simultaneously ensure that the second dielectric layer 190 is uniformly covered, is not easy to crack, has small stress, and reduces the risk of breakdown between the gate metal and the source field plate 200.
In addition, in order to implement the fabrication of the device, it is necessary to fabricate a source electrode, a drain electrode, and a gate electrode in the semiconductor layer, and therefore, if the gate electrode is fabricated by using the above electrode structure, it is necessary to fabricate a drain electrode and a source electrode in the semiconductor layer, which is not described herein again.
Based on the foregoing implementation manner, the present application further provides an electrode structure manufactured by the electrode structure manufacturing method, where the electrode structure includes a substrate, a first dielectric layer 130, a contact metal layer 150, a first barrier metal layer 170, and an interconnection metal layer 180, where the first dielectric layer 130 and the contact metal layer 150 are located on one side of the substrate, the first dielectric layer 130 is disposed around the contact metal layer 150, the first barrier metal layer 170 is located on one side of the contact metal layer 150 away from the substrate, and the interconnection metal layer 180 is located on one side of the first barrier metal layer 170 away from the substrate.
The electrode structure provided by the present application can be applied to the fabrication of a semiconductor device, and on this basis, the substrate can include a substrate 110 and a semiconductor functional layer 120, the semiconductor functional layer 120 is located on one side of the substrate 110, and in addition, the semiconductor device can further include a second dielectric layer 190 and a source field plate 200, the second dielectric layer 190 is located on one side of the interconnection metal layer 180 and the first dielectric layer 130, and the source field plate 200 is located on one side of the second dielectric layer 190.
The first barrier metal layer and the interconnection metal layer of the electrode structure provided by the application have smooth and continuous surfaces, so that the reliability of the electrode metal is enhanced, the second dielectric layer 190 can be uniformly covered, is not easy to crack and has small stress, and the breakdown risk between the interconnection metal layer and the source electrode field plate 200 is reduced.
The first dielectric layer 130 is provided with a trench structure, and the contact metal layer 150 is disposed in the trench structure. As a first implementation manner, the projection of the interconnection metal layer 180 on the substrate includes the projection of the contact metal layer 150 on the substrate, and the first barrier metal layer 170 may be entirely disposed in the trench structure, that is, the trench structure includes the contact metal layer 150 and the first barrier metal layer 170, and the sum of the thicknesses of the contact metal layer 150 and the first barrier metal layer 170 is equal to the depth of the trench structure, at this time, the first barrier metal layer 170 completely covers the contact metal layer 150. As a second implementation manner, please refer to fig. 14, a portion of the metal of the first barrier metal layer 170 is located in the trench structure, another portion of the metal of the first barrier metal layer 170 is located above the trench structure, and the first barrier metal layer 170 located above the trench structure completely covers the trench structure. As a third implementation manner, all the metal of the first barrier metal layer 170 is located above the trench structure, and the contact metal layer 150 is filled in the trench structure, the thickness of the contact metal layer is equal to the depth of the trench structure, and the first barrier metal layer 170 completely covers the trench structure.
Meanwhile, when a portion of the metal of the first barrier metal layer 170 is located above the trench structure, the first barrier metal layer 170 may include an adhesion layer 171 and a barrier layer 172, the adhesion layer 171 being located on a side contacting the metal layer 150, and the barrier layer 172 being located on a side of the adhesion layer 171. The adhesion layer 171 can effectively achieve adhesion between the barrier layer 172 and the first dielectric layer 130, and the barrier layer 172 can function to isolate the contact metal layer 150 from the interconnect metal layer 180.
It should be noted that, the materials of the contact metal layer 150, the first barrier metal layer 170, and the interconnection metal layer 180 are not limited in this application, and optionally, the material for fabricating the contact metal layer 150 may be a metal such as Ni, Pt, Ti, W, or a combination thereof, the material for fabricating the first barrier metal layer 170 may be a metal such as Pt, Pd, W, Ti, TiW, or a combination thereof, and the material for fabricating the interconnection metal layer 180 may be a metal such as Au, W, Cu, Al, or a combination thereof, which is not limited herein. In one possible implementation, adhesion layer 171 is made of Ti and barrier layer 172 is made of Pt.
In addition, in order to prevent the metal of the interconnection metal layer 180 from diffusing into the second dielectric layer 190 and affecting the stability of the electrode, referring to fig. 13, the electrode structure further includes a second barrier metal layer 210, the second barrier metal layer 210 is located at one side of the interconnection metal layer 180, and the second dielectric layer 190 covers the second barrier metal layer 210 and the first dielectric layer 130. The second barrier metal layer 210 can function to isolate the interconnect metal layer 180 from the second dielectric layer 190.
In summary, the present application provides an electrode structure and a method for manufacturing the same, the electrode structure includes a substrate, a first dielectric layer and a contact metal layer on one side of the substrate, wherein the first dielectric layer surrounds the contact metal layer, the continuous first barrier metal layer is on the side of the contact metal layer away from the substrate, the interconnection metal layer is on the side of the first barrier metal layer away from the substrate, and the second dielectric layer covers the electrode structure and the first dielectric layer. In the electrode structure provided by the application, the contact metal is only positioned in the groove structure, so that the groove of the groove structure part is filled with the metal, the step of the groove structure part is eliminated, the continuity of the first barrier metal layer covered on the groove structure part is good on the flat surface, the first barrier metal layer plays a good barrier role between the contact metal layer and the interconnection metal layer, and the reliability of the electrode structure is improved; meanwhile, the interconnection metal layer covered on the first barrier metal layer continues the bottom flat structure to obtain a flat top structure, so that when a dielectric layer is required to cover the top of the electrode, the dielectric layer can be uniformly covered, the defects that the dielectric layer is easy to crack, the stress is large, the electrode and an electrode field plate are easy to break down and the like are overcome, and the reliability of the electrode structure is improved.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (9)
1. An electrode structure, characterized in that it comprises:
a substrate;
the first dielectric layer and the contact metal layer are positioned on one side of the substrate, wherein the first dielectric layer is provided with a groove structure, the contact metal layer is only positioned in the groove structure, and the contact metal layer is connected with the first dielectric layer;
the continuous first barrier metal layer is positioned on one side, far away from the substrate, of the contact metal layer; wherein the thickness of the contact metal layer is equal to the depth of the trench structure, or the thickness of the contact layer and a part of the first barrier metal layer is equal to the depth of the trench structure;
and the interconnection metal layer is positioned on one side of the first barrier metal layer, which is far away from the substrate.
2. The electrode structure of claim 1, wherein the projection of the interconnect metal layer on the substrate comprises a projection of the contact metal layer on the substrate, and the projection of the first barrier metal layer on the substrate comprises a projection of the contact metal layer on the substrate.
3. The electrode structure of claim 1, further comprising a second barrier metal layer overlying the interconnect metal layer.
4. The electrode structure of claim 1, wherein a projection of the first barrier metal layer on the substrate comprises the contact metal layer, the first barrier metal layer comprising an adhesion layer and a barrier layer, the adhesion layer being located on a side adjacent to the contact metal layer, the barrier layer being located on a side adjacent to the interconnect metal layer.
5. The electrode structure of claim 1, wherein the contact metal layer is made of a material comprising Ni, Pt, Ti, W, and combinations thereof, the barrier metal layer is made of a material comprising Pt, Pd, W, Ti, TiW, and combinations thereof, and the interconnect metal layer is made of a material comprising Au, W, Cu, Al, and combinations thereof.
6. The electrode structure of claim 1, wherein the substrate comprises:
the semiconductor device comprises a substrate and a semiconductor function layer positioned on one side of the substrate.
7. A method for fabricating an electrode structure according to any one of claims 1 to 6, the method comprising:
depositing a first dielectric layer based on a substrate;
etching the first dielectric layer by using a first photoresist layer with a first opening to form a groove structure;
stripping the first photoresist layer after depositing the contact metal layer based on the groove structure;
manufacturing a second photoresist layer with a second opening, wherein the contact metal layer is positioned in the second opening, and the projection of the second opening on the substrate comprises the projection of the contact metal layer on the substrate;
sequentially depositing a first barrier metal layer and an interconnection metal layer based on the second opening and then stripping the second photoresist layer; wherein the content of the first and second substances,
the step of depositing a contact metal layer based on the trench structure comprises:
depositing a contact metal layer based on the trench structure until a thickness of the contact metal layer is equal to a depth of the trench structure.
8. A method for fabricating an electrode structure according to any one of claims 1 to 6, the method comprising:
depositing a first dielectric layer based on a substrate;
etching the first dielectric layer by using a first photoresist layer with a first opening to form a groove structure;
after depositing the contact metal layer, continuously depositing a first barrier metal layer until the surface of the first barrier metal layer is flush with the surface of the first dielectric layer;
manufacturing a second photoresist layer with a second opening, wherein the contact metal layer is positioned in the second opening, and the projection of the second opening on the substrate comprises the projection of the contact metal layer on the substrate;
and stripping the second photoresist layer after sequentially depositing the first barrier metal layer and the interconnection metal layer based on the second opening.
9. The method of claim 7 or 8, wherein while depositing metal in the second opening, the method further comprises:
and after the step of depositing the interconnection metal layer is completed, continuously depositing a second barrier metal layer along one side of the interconnection metal layer.
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