CN113783555B - Nanosecond short pulse power modulation topological structure and method based on inductance energy storage forming line - Google Patents
Nanosecond short pulse power modulation topological structure and method based on inductance energy storage forming line Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
- H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
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Abstract
The invention discloses a nanosecond short pulse power modulation topological structure based on an inductance energy storage forming line and a modulation method, wherein the topological structure comprises a modulation resistor R con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main Forming a wire by inductance energy storage; the modulation method is implemented by modulating the switch M cut Main switch M main Is realized by the on-off of the device. The pulse generator disclosed by the invention can be continuously modulated in pulse width of several nanoseconds to several tens of nanoseconds and is in 5ns ～ Continuously adjustable within 20 ns.
Description
Technical Field
The invention relates to the field of pulse generation, in particular to a nanosecond short pulse power modulation topological structure based on an inductance energy storage forming line and a modulation method.
Background
Inductive energy storage has a higher energy density and smaller physical size than the capacitive energy storage topologies commonly used for pulse generators. However, the inductance energy storage topology is controlled by a cut-off switch, and square wave output and pulse width modulation of the pulse generator are difficult to realize, so that the application range of the inductance energy storage in the pulse generator is greatly limited.
The existing pulse generator is difficult to simultaneously meet the difficult problems of short pulse, square wave and pulse width modulation;
pulse generators based on inductive energy storage to form line structures have difficulty in achieving pulse width modulation under square wave conditions.
Disclosure of Invention
The invention aims to provide a nanosecond short pulse power series modulation topological structure based on an inductance energy storage forming line, which comprises a modulation resistor R con Failure debug diode D con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main And the inductance stores energy to form a wire.
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H.
F-end series connection main switch M main And the rear is grounded.
H-end serial modulation switch M cut And a load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal connection failure debugging diode D con Is provided. Failure debug diode D con Is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation resistor R con Back ground, B point is in turn connected in series with modulation switch M cut And a load R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is connected with the H end, and the drain electrode is connected with the load R in series load And the rear is grounded.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
A nanosecond short pulse power series modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closing to change the B point state from the short circuit state to G Load In the state, the point B of the inductance energy storage formation line generates wave refraction and reflection.
t 1 At the moment, the forward current i of the B point state 2f Counter current i between points A and B 1b The following are respectively shown:
in the formula, Y1 and Y2 respectively represent impedance states of an inductance energy storage forming line and a point B. i.e 0 Is the initial current.
t 1 Point B at time point load-matched catadioptric, i.e. Y 2 ＝Y 1 。
2) At time l, the modulating switch M is turned off cut Closing the main switch M main The reflected wave reaches point a where it is reflected and point B is no longer reflected.
At this time, the equation of the catadioptric current at point a is as follows:
wherein i is l For modulating switch M cut The current propagating from point B to point a before switching off. Y0 is the A point impedance state. i.e 0f 、i 1b The currents at point B and point a are shown, respectively.
3) After the period of l, the impedance state of the point B is Y 2 The point B is fully refracted, the current direction is changed, and the diode D is debugged through failure con Acting on the modulation resistor R con And a modulated pulse width of length l is formed.
At this time, the electromagnetic wave equation for the point a to enter the point B is as follows:
wherein i is 2l And the forward current of the point A before the current moment arrives.
The impedance state equations for points a and B are shown below, respectively:
a nanosecond short pulse power parallel modulation topological structure based on an inductance energy storage forming line comprises a modulation resistor R con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main And the inductance stores energy to form a wire.
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H.
F-end series connection main switch M main And the rear is grounded.
H-end series load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal series modulation switch M cut And the rear is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation switch M cut Rear grounding, B point series load regulating R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is grounded, and the drain electrode is connected with the H end.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
A nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closed, the inductive energy stores the refraction and reflection generated by the formation line.
2) At time l/2, the modulating switch M is turned off cut Closing the main switchM main The inductance energy storage forming line has two current waves with the same opposite directions and the same magnitude in one propagation period, thereby the inductance energy storage forming line has the same current wave in the modulation resistor R con And a modulated pulse width of 2l in length.
Propagation period start time t 1 The current waves of (a) are respectively as follows:
propagation period termination time t 1 The current waves of (a) are respectively as follows:
the impedance state equations for points a and B are shown below, respectively:
the invention provides a line pulse width series modulation and parallel modulation topology formed by inductance energy storage.
The pulse generator disclosed by the invention can be continuously modulated in pulse width of several nanoseconds to tens of nanoseconds and can be continuously adjustable within 5 ns-20 ns.
M in the parallel modulation topology of the invention main And M con Having the same ground potential also means that in the circuit design, the switch design of the parallel modulation topology has a more stable driving environment.
Drawings
FIG. 1 is an inductive energy storage forming a line pulse width modulation topology-series modulation topology (SIE_PFL);
FIG. 2 is a diagram of an inductive energy storage forming a line pulse width modulation topology-parallel modulation topology (PIE_PFL);
FIG. 3 is a SIE_PFL node electromagnetic wave catadioptric;
FIG. 4 is a control and output waveform of a SIE_PFL series modulation topology;
FIG. 5 is a PIE_PFL node electromagnetic wave refraction and reflection;
FIG. 6 is a control and output waveform of PIE_PFL parallel modulation topology;
FIG. 7 is an output load side pulse modulated waveform of a series modulated topology;
FIG. 8 is a pulse waveform of a modulation side modulating load of a series modulation topology;
FIG. 9 is a series modulation topology real-world circuit;
FIG. 10 is a series modulation topology pulse width modulation experimental result;
FIG. 11 is an output load side pulse modulated waveform of a parallel modulated topology;
FIG. 12 is a pulse waveform of a modulation side modulating load of a parallel modulation topology;
FIG. 13 is a parallel modulation topology real-world circuit;
FIG. 14 is a graph showing experimental results of parallel modulation topology pulse width modulation;
FIG. 15 is a parallel modulation topology real-world circuit of an ultra-fast gate drive and switch package designed using this embodiment;
FIG. 16 is a waveform of a charging current in an inductive energy storage formation line single module; fig. 16 (a) is a full waveform of the charging current; FIG. 16 (b) shows a charge current plateau amplification;
FIG. 17 is a parallel modulation topology modulation waveform of an ultra-fast gate drive and switch package;
FIG. 18 is a quasi-square wave pulse with a pulse width of 5.1ns after modulation;
FIG. 19 is a non-square wave pulse with a pulse width of 4.3ns after modulation;
FIG. 20 is a diagram of verification of the proposed topology by a joint multi-module overlay method;
FIG. 21 is a 5-level stacked pulse width modulated waveform
FIG. 22 is a 50kHz repetition rate operating waveform at 10 levels of stacking.
Detailed Description
The present invention is further described below with reference to examples, but it should not be construed that the scope of the above subject matter of the present invention is limited to the following examples. Various substitutions and alterations are made according to the ordinary skill and familiar means of the art without departing from the technical spirit of the invention, and all such substitutions and alterations are intended to be included in the scope of the invention.
Example 1:
referring to fig. 1, 3 and 4, a nanosecond short pulse power series modulation topology structure based on an inductance energy storage forming line comprises a modulation resistor R con Failure debug diode D con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main Inductance energy storage forming line (Z) save )。
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H. The power supply U dc Is a voltage source.
F-end series connection main switch M main And the rear is grounded.
H-end serial modulation switch M cut And a load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal connection failure debugging diode D con Is provided. Failure debug diode D con Is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation resistor R con Back ground, B point is in turn connected in series with modulation switch M cut And a load R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is connected with the H end, and the drain electrode is connected with the load R in series load And the rear is grounded.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
Example 2:
a nanosecond short pulse power series modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closing to change the B point state from the short circuit state to G Load In the state, the point B of the inductance energy storage formation line generates wave refraction and reflection. G Load The state represents the admittance form of the load resistance.
t 1 At the moment, the forward current i of the B point state 2f Counter current i between points A and B 1b The following are respectively shown:
in the formula, Y1 and Y2 respectively represent impedance states of an inductance energy storage forming line and a point B. i.e 0 Is the initial current.
t 1 Point B at time point load-matched catadioptric, i.e. Y 2 ＝Y 1 。
2) At time l, the modulating switch M is turned off cut Closing the main switch M main The reflected wave reaches point a where it is reflected and point B is no longer reflected.
At this time, the equation of the catadioptric current at point a is as follows:
wherein i is l For modulating switch M cut The current propagating from point B to point a before switching off. Y0 is the A point impedance state. i.e 0f 、i 1b The currents at point B and point a are shown, respectively.
3) After the period of l, the impedance state of the point B is Y 2 The point B is fully refracted, the current direction is changed, and the diode D is debugged through failure con Acting on the modulation resistor R con And a modulated pulse width of length l is formed.
At this time, the electromagnetic wave equation for the point a to enter the point B is as follows:
wherein i is 2l And the forward current of the point A before the current moment arrives.
The impedance state equations for points a and B are shown below, respectively:
example 3:
referring to fig. 2, 5 and 6, a nanosecond short pulse power parallel modulation topology structure based on an inductance energy storage forming line comprises a modulation resistor R con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main Inductance energy storage forming line (Z) save )。
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H.
F-end series connection main switch M main And the rear is grounded.
H-end series load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal series modulation switch M cut And the rear is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation switch M cut Rear grounding, B point series load regulating R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is grounded, and the drain electrode is connected with the H end.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
Example 4:
a nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closed, the inductive energy stores the refraction and reflection generated by the formation line.
2) At time l/2, the modulating switch M is turned off cut Closing the main switch M main The inductance energy storage forming line has two current waves with the same opposite directions and the same magnitude in one propagation period, thereby the inductance energy storage forming line has the same current wave in the modulation resistor R con And a modulated pulse width of 2l in length.
Propagation period start time t 1 The current waves of (a) are respectively as follows:
propagation period termination time t 1 The current waves of (a) are respectively as follows:
the impedance state equations for points a and B are shown below, respectively:
example 5:
a nanosecond short pulse power series modulation topological structure based on an inductance energy storage forming line comprises a modulation resistor R con Failure debug diode D con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main And the inductance stores energy to form a wire.
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H. The power supply U dc Is a voltage source.
F-end series connection main switch M main And the rear is grounded.
H-end serial modulation switch M cut And a load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal connection failure debugging diode D con Is provided. Failure debug diode D con Is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation resistor R con Back ground, B point is in turn connected in series with modulation switch M cut And a load R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is connected with the H end, and the drain electrode is connected with the load R in series load And the rear is grounded.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
A nanosecond short pulse power series modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closing to change the B point state from the short circuit state to G Load In the state, the point B of the inductance energy storage formation line generates wave refraction and reflection.
t 1 At the moment, the forward current i of the B point state 2f Counter current i between points A and B 1b The following are respectively shown:
in the formula, Y1 and Y2 respectively represent impedance states of an inductance energy storage forming line and a point B. i.e 0 Is the initial current.
t 1 Point B at time point load-matched catadioptric, i.e. Y 2 ＝Y 1 。
2) At time l, the modulating switch M is turned off cut Closing the main switch M main The reflected wave reaches point a where it is reflected and point B is no longer reflected.
At this time, the equation of the catadioptric current at point a is as follows:
wherein i is l For modulating switch M cut The current propagating from point B to point a before switching off. Y0 is the A point impedance state. i.e 0f 、i 1b The currents at point B and point a are shown, respectively.
3) After the period of l, the impedance state of the point B is Y 2 The point B is fully refracted, the current direction is changed, and the diode D is debugged through failure con Acting on the modulation resistor R con And a modulated pulse width of length l is formed.
At this time, the electromagnetic wave equation for the point a to enter the point B is as follows:
wherein i is 2l And the forward current of the point A before the current moment arrives.
The impedance state equations for points a and B are shown below, respectively:
a nanosecond short pulse power parallel modulation topological structure based on an inductance energy storage forming line comprises a modulation resistor R con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main And the inductance stores energy to form a wire.
Recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H.
F-end series connection main switch M main And the rear is grounded.
H-end series load R load And the rear is grounded.
The H end is sequentially connected with a capacitor C and a main switch M in series main And the rear is grounded.
H-end series modulation resistor R con And the rear is grounded. H-terminal series modulation switch M cut And the rear is grounded.
And the two ends of the inductance energy storage forming line are respectively an A point and a B point. A point series modulation switch M cut Rear grounding, B point series load regulating R load And the rear is grounded.
The modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is grounded, and the drain electrode is connected with the H end.
The main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
A nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
1) And the two ends of the inductance energy storage forming line are respectively an A point and a B point.
At t 1 Time master switch M main Off, modulating switch M cut Closed, the inductive energy stores the refraction and reflection generated by the formation line.
2) At time l/2, the modulating switch M is turned off cut Closing the main switch M main The inductance energy storage forming line has two current waves with the same opposite directions and the same magnitude in one propagation period, thereby the inductance energy storage forming line has the same current wave in the modulation resistor R con And a modulated pulse width of 2l in length.
Propagation period start time t 1 The current waves of (a) are respectively as follows:
propagation period termination time t 1 The current waves of (a) are respectively as follows:
the impedance state equations for points a and B are shown below, respectively:
example 6:
a nanosecond short pulse power series modulation method based on an inductance energy storage forming line comprises the following steps:
to explain how to implement the line pulse width modulation by electromagnetic wave modulation in the inductive tank circuit, the present embodiment is directed to mathematical analysis of the sie_pfl passive electromagnetic wave modulation process. The electromagnetic wave refraction and reflection of the SIE_PFL are shown in fig. 3, the control time sequence is shown in fig. 4, and the method is characterized in that the pulse width modulation is completed after the modulation switch is switched. Y can be obtained 0 There are two impedance states, Y 2 There are three impedance states as in equation (1).
FIG. 4 shows the timing of the control signal when the pulse width is modulated to an electrical length l, which can be seen to be Y for a longer period of time after the switch is closed 2 ＝G Load The first moment of the initiation of the wave process is M main And (5) disconnecting. At this time M con Still closed, thus Y 2 Change from short-circuit state to G Load Status of the device. Time t 1 At Y 2 Forward current i on 2f I.e. the load current i R Expression (c) and at Y 1 On counter current i 1b Expression (2) is shown below, wherein i 0 Is the initial current. This also means that t 1 At time point B point load-matched catadioptric reflection, Y 2 ＝Y 1 。
And at time l, the switch M is modulated cut Disconnect, and M main Already disconnected, and now the original reflected wave has reached point a, so point B will no longer be catadioptric. But Y is 0 Because of the fact that =0, refraction and reflection will occur at point a, assuming M cut Y before disconnection 1 The current propagated to point A is i l First, the refractive index of formula (3) can be obtained, and the time point of I can be obtained by combining formula (3) and formula (2) due to M cut The equation of the catadioptric current acting at point a is as in equation (4). That is to say at this point because of the short circuit at point A and M cut Breaking, no current exists on the load, so that the pulse width is cut off to achieve the pulse width debugging effect, and Y is cut off 1 The original current in (a) is continuously completed in Y 1 In the transfer process.
After a transfer of l time length, M to 2l time cut The modulation switch is still turned off, and the B point state is Y 2 The refractive index at this time is (5), and Y is defined before this time 1 The forward current in (a) is i 2l The simultaneous solving formula can be obtained from Y at this time 1 Enter Y 2 The electromagnetic wave equation of (2) is equation (6). At this time, the total refraction occurs, and the current direction changes, thereby disabling the debug diode D con Acting on the modulating resistor R con Time of upper formationThe modulated pulse width of length l is shown as a dashed line portion of the waveform in fig. 4.
Example 7:
a nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
unlike passive regulation topology, which directly cuts off pulse transmission and indirectly regulates electromagnetic waves to achieve pulse width modulation, the embodiment also provides an inductance energy storage forming line pulse width modulation active electromagnetic wave regulation topology (pie_pfl). PIE_PFL has fewer semiconductor devices, and can actively regulate electromagnetic waves to pass through points A and B and simultaneously regulate the electromagnetic waves to realize pulse width modulation. FIG. 5 is an equivalent process node of PIE_PFL electromagnetic wave catadioptric, impedance state at A, B point can be controlled by modulating switch M con And a main switch M main The on-off state of the switch is switched, and the switch is characterized in that the modulating switch directly causes refraction and reflection of wave in a formed line to actively regulate and control electromagnetic waves, and after the main switch acts, the two electromagnetic waves are simultaneously and coordinately transmitted to form modulating pulse output.
After the dual conversion, equation (1) is the impedance state equation at A, B point in pie_pfl. Y in PIE_PFL 2 Has only two impedance states, and Y 0 And Y 2 Can all pass through M con And M main And (5) active switching. FIG. 6 shows the control logic and output waveforms of PIE_PFL, where the PIE_PFL has a pulse width modulated by one fourth of the original 2l length pulse width, i.e., a pulse width modulated by l/2. In FIG. 6, we define t 1 Time 0, i.e. the starting time of the wave process with a duration of 2l time length.
Equation (2) is a A, B point catadioptric coefficient matrix in which the catadioptric state of the current wave at A, B points is unique for the effective length of time and always precedes the moment of switching stateThe magnitude and direction of the current are related. In order to obtain initial current values at different moments, the embodiment first solves a current equation of pie_pfl at a switching moment. Due to M con And M main The time interval between the two switches is less than the electrical length of a coaxial cable, so at t 1 And the current at time l/2 are both the initial current i0, i.e. at Y 1 There are two reflected waves of the same magnitude in opposite directions in one propagation period, as in the formula (2) and the formula (3). The time-staggered regulation and control of the two switches enable two current waves with consistent amplitude but different acting loads and different directions to be respectively generated at the two ends of the first position in the original fixed-length formed line propagation time. In general, the PIE_PFL topology always has a full propagation length for the total time of the pulses output on the modulation load and the output load.
Example 8:
simulation and experimental verification of a nanosecond short pulse power series modulation method based on an inductance energy storage forming line are as follows:
fig. 7 shows the pulse width modulation result at the output load end, the pulse width is gradually shortened from the initial no modulation effect, and the obvious cut-off effect is shown, as can be seen from the waveform modulation change process from 24ns to 5ns, the rising time of the output pulse is determined by the turn-off speed of the main switch, and the falling time of the modulation pulse is determined by the turn-on speed of the modulation switch. Similar to the tail-gate effect in a Marx generator, the proposed series modulation topology also implements pulse width modulation using a transfer loop that overswitches the modulation waveform. The difference is that in the inductance energy storage forming line, the modulation switch not only can solve the problem that the descending time of the single-ended inductance energy storage forming line output pulse is not movable, but also can realize pulse width modulation.
Attention is paid to the pulse voltage variation condition of the modulation terminal. The analysis results show that the series modulation topology can pass through the modulation load R in the pulse width modulation state con And realizing the release of modulation capability. Fig. 8 is a modulated load waveform of fig. 7 after pulse width modulation. The 24ns initial pulse width condition in fig. 8 does not modulate the load voltage output, but at 20ns pulse width modulation, a 4ns pulse width modulated pulse shape appears on the modulated load. Naturally as the width of the modulation pulse width increases and also as the load R is modulated con On which the modulated truncated pulse voltage appears.
Example 9:
a nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
it can be seen from fig. 2 that the parallel modulation topology cancels the modulation diode D con But will M cut Directly connected in parallel with the modulation end. Therefore, the control timing is also significantly different from that of the series modulation topology, and the control timing of the parallel modulation topology is shown in fig. 5. That is, in M main Is the turn-off time of (1) as the origin, M cut The maximum amplitude that can be adjusted is to increase and decrease an electrical length l, when M cut When the turn-off time of (1/2) is increased, the modulation pulse width is 1.5l; when M cut When the off time of (2) is reduced by l/2, the modulation pulse width is l/2, and FIG. 5 is M cut The off-time of (2) is reduced by the timing waveform of the l/2 time topology. The inductor energy storage topology also determines that pulse output is only generated at the moment of cutting off the charging loop, and the rising edge of the output pulse waveform is also determined by the switch turn-off speed. Like the series modulation topology, the modulation switch M cut Will also have the function of steepening the tail of the pulse.
Example 10:
an experiment of a nanosecond short pulse power series modulation method based on an inductance energy storage forming line comprises the following steps:
fig. 9 is a physical circuit of a series modulation topology, two switches connected in series, a master switch and a modulation switch arranged on the same PCB, while using SMA joints as the connection means for the energy storage formation wires (both matching 50Ω).
Fig. 10 is a pulse width modulated waveform of a series modulation topology listing 5 modulation results for 10ns, 13ns, 15ns, 20ns, 24ns, where the transmission line theoretical pulse width of 20ns is limited to an unmodulated state pulse width of approximately 24ns due to line loss and switching dynamics. The series switching structure inevitably introduces a large number of parasitic parameters and exists directly in the wave delivery loop of the pulse forming line, which also results in no output pulse having a good square wave plateau. From the fourth chapter of test effect, the turn-off time of the switch should be around 5ns, while the rise time of the pulse in the series modulation structure is already more than 7ns, and there is a serious rise time delay, which also results in the output pulse not having a good square wave flat top. In particular during pulse width modulation, the output pulse should have a faster pulse fall time after modulation according to theoretical analysis. Steepening the falling edge has been verified in experiments but the improvement is quite limited. It can be concluded that the series modulation topology limits to some extent the rise time of the output pulse and the fall time of the modulation pulse width.
Example 11:
an experiment of a nanosecond short pulse power parallel modulation method based on an inductance energy storage forming line comprises the following steps:
fig. 11 is a load side voltage waveform pulse width modulated 24ns to 5 ns. First from 24ns to 20ns, a significant improvement in the fall time of the pulse is seen, and as the width is modulated towards shorter pulse widths, the fall time of the pulse width is reduced, because of the switch-off time limit set by the switch, it can be seen that the half-width of the output pulse can only reach 7ns when the modulated pulse width is set to 5 ns. This result is significantly different from the result of fig. 7, and it is not difficult to conclude that the pulse width modulation limit of the proposed topology in the actual circuit design is limited not only by the characteristics such as high frequency loss of the transmission line, but also by the on-off time of the switch to a great extent. Although the action of the modulation switch can improve the fall time of the output pulse, as the pulse width is further reduced, the action time of the switch itself becomes a major factor limiting the modulation margin.
Fig. 12 is a modulation-side modulation load R con The previous wave process analysis has first been verified in terms of appearance time, i.e. the modulation voltage will be opposite to the output voltage and is present as the main switch M main The off-time is in a left and right finite length distribution starting from the start point.
Fig. 13 is a main switching circuit and a modulation switching circuit of a parallel modulation topology. The upper half of fig. 13 is the modulation switching circuit, and the lower half is the main switching circuit. The experimental circuits are all circuits with the same serial modulation topology, and the SMA output interface and the layout design for reducing parasitic inductance are used on the main loop layout and the port design. Unlike the series modulation topology, the parallel modulation topology sets the modulation load directly at the modulation switch output port to consume the modulated pulses that occur during the pulse width modulation process.
The modulation waveform shown in fig. 14 has a significant boost compared to the output waveform of the series modulation topology. First, a 10ns modulation waveform, we can see that the output pulse waveform of the parallel modulation topology still has a relatively complete pulse plateau, although there is still a voltage dip in voltage amplitude, which is mainly limited by the dynamic characteristics of the switching device. The parallel structure still shows better improvement advantages in terms of steepening the falling time of the modulation pulse width of 15ns, 18ns and the like. Overall, the parallel modulation topology is more advantageous in terms of pulse width modulation effect and tail steepening.
Example 12:
an experiment to verify nanosecond short pulse power modulation topology based on inductive energy storage forming line is as follows:
the turn-off time can reach 3ns under rated high current condition. The ultra-fast gate drive is designed to not only improve the dynamic characteristics of the switch but also improve the stability of the pulse forming structure. Therefore, on the premise that the pulse width modulation topology is verified, the line pulse width modulation single module is formed by using the extremely low parasitic inductance switch and the ultra-fast grid driving design based on the inductance energy storage of the parallel modulation structure. Fig. 15 shows a pulse width modulation circuit embodiment, and the power circuit and the output interface are consistent with fig. 13.
In the experiment of this embodiment, the charging current peak value was 41.3A, and the dc charging voltage was 25V. Fig. 16 shows the charging current waveform present in the inductive energy storage formation line when the switch is closed, and fig. 16 (a) shows that the peak current will reach 41.3A after 2 μs of short-circuit charging at 25V charging voltage. To more intuitively see the current peak, we performed an unfolding analysis of the peak portion of the current waveform, as shown in fig. 16 (b), to stabilize the current in the inductor-form line at 41.3A for a duration of approximately 80 ns. Thus, a pulse of 1032V amplitude will be formed across the 50Ω load resistor as 20.6A.
Fig. 17 is a pulse width modulation result waveform using the switch and ultra-fast gate drive of the present invention design as the core device, first having been reduced to 2.3ns at the pulse rise time, so the output pulse has definitely a faster rise, fall speed, and also a more advantageous pulse plateau. From a comparison of the 10ns pulse width modulated waveforms, the 10ns waveforms in fig. 10 and 14 both show a voltage dip and loss of plateau, while the 10ns modulated waveform in fig. 17 has a good pulse plateau and has a significant advantage in pulse front hold. In addition, the output pulse using the proposed topology by the switch package and ultra-fast gate drive can reach 4ns pulse width modulation and have a rise time of 2.1 ns.
The present invention also focuses very much on the shortest pulse and waveform quality that the proposed topology can form during modulation. Fig. 18 is a quasi-square wave shortest pulse with square wave flat top output through pulse width modulation control, and it can be seen that the rise time of the pulse is 2.1ns, the fall time is 3.5ns, and the pulse width is 5.1ns. Under this condition, the output pulse still has a relatively stable plateau time, with a duration of about 0.9ns. This is the shortest square wave pulse that the proposed topology can modulate to, limited by the fall time output pulse can only be referred to as a quasi-square wave pulse.
Unlike square wave plateaus, as the modulation pulse width of the output pulse is continually shortened, the output pulse will no longer have a pulse plateau, as shown in fig. 19. Although the output pulse width has been reduced to 4.3ns at this time, there is also an unstable operation due to the output pulse corresponding to the fastest rise time that has been approaching the generator. Thus, the pulse shape shown in fig. 19 is not stable, that is, the action device and the modulation device used in the present invention can modulate the pulse width to 4.3ns at the minimum.
Example 13:
the verification of the proposed topology by the combined multi-module superposition method comprises the following steps:
the invention can combine multiple multi-module superposition methods to realize the power superposition of output pulses, and the topology is shown in figure 20. The present embodiment takes a time isolation method as an example. The invention discusses the square wave pulse width modulation condition of the generator of 6 ns-20 ns through a 5-level superposition pulse width modulation experiment. The experimental result shows that the rise time of the output pulse is 4.5ns when 5 stages are stacked, the output pulse has good square wave flat top when the modulation pulse width is 8 ns-20 ns, and the output voltage reaches 4.91kV without propagation loss basically. In contrast to single stage output, the main appearance is that the pulse rise time after 5 stages of stacking rises from 2.1ns to 4.5ns, which gives rise to the main result that the shortest pulse that can be modulated rises from the original 4.3ns by 6ns, and there is a voltage loss at the time of the shortest pulse modulation.
Since the inductive energy storage topology requires a period of several microseconds for the energy storage inductive charging compared to the nanosecond pulse duration, which also limits the repetition frequency at which the generator can operate, fig. 22 is an output waveform (continuous operation for 3 min) of the generator at a repetition frequency of 50kHz, where the charging interval time reaches hundred microseconds, the charging power supply does not need additional expansion, and the generator can effectively dissipate heat by existing heat dissipation measures.
Claims (10)
1. The nanosecond short pulse power series modulation topological structure based on the inductance energy storage forming line is characterized in that: comprising a modulation resistor R con Failure debug diode D con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main Forming a wire by inductance energy storage;
recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H;
f-end series connection main switch M main Rear ground;
h-end serial modulation switch M cut And a load R load Rear ground;
the H end is sequentially connected with a capacitor C and a main switch M in series main Rear ground;
h-end series modulation resistor R con Rear ground; h-terminal connection failure debugging diode D con A cathode of (a); failure debug diode D con Is grounded;
recording two ends of an inductance energy storage forming line as a point A and a point B respectively; a point series modulation resistor R con Back ground, B point is in turn connected in series with modulation switch M cut And a load R load And the rear is grounded.
2. The nanosecond short pulse power series modulation topology based on inductive energy storage forming wires of claim 1, wherein: the modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is connected with the H end, and the drain electrode is connected with the load R in series load And the rear is grounded.
3. A modulation method based on the nanosecond short pulse power cascade modulation topology as claimed in any one of claims 1 to 2, characterized by comprising the steps of:
1) At t 1 Time master switch M main Off, modulating switch M cut Closing to change the B point state from the short circuit state to G Load The state, the inductance stores energy and forms the B point of the line and produces the refraction and reflection of the wave;
t 1 at the moment, the forward current i of the B point state 2f Counter current i between points A and B 1b The following are respectively shown:
wherein Y1 and Y2 respectively represent impedance states of an inductance energy storage forming line and a point B; i.e 0 Is the initial current;
2) At time l, the modulating switch M is turned off cut Closing the main switch M main The reflected wave reaches the point A, the point A generates refraction and reflection, and the point B does not generate refraction and reflection any more;
at this time, the equation of the catadioptric current at point a is as follows:
wherein i is l For modulating switch M cut The current propagated from the point B to the point A before the disconnection; y0 is the impedance state of the point A; i.e 0f 、i 1b The current at the point B and the current at the point A are respectively shown;
3) After the period of l, the impedance state of the point B is Y 2 The point B is fully refracted, the current direction is changed, and the diode D is debugged through failure con Acting on the modulation resistor R con Forming a modulation pulse width with the time length of l;
at this time, the electromagnetic wave equation for the point a to enter the point B is as follows:
wherein i is 2l And the forward current of the point A before the current moment arrives.
4. A modulation method according to claim 3, wherein t 1 Point B at time point load-matched catadioptric, i.e. Y 2 ＝Y 1 。
5. A modulation method according to claim 3, wherein the impedance state equations at points a and B are respectively as follows:
6. the utility model provides a nanosecond short pulse power parallel modulation topological structure based on inductance energy storage formation line which characterized in that: comprising a modulation resistor R con Capacitor C and power supply U dc Modulation switch M cut Load R load Main switch M main Forming a wire by inductance energy storage;
recording power supply U dc The end of the positive electrode is F, and the end of the negative electrode is H;
f-end series connection main switch M main Rear ground;
h-end series load R load Rear ground;
the H end is sequentially connected with a capacitor C and a main switch M in series main Rear ground;
h-end series modulation resistor R con Rear ground; h-terminal series modulation switch M cut Rear ground;
recording two ends of an inductance energy storage forming line as a point A and a point B respectively; a point series modulation switch M cut Rear grounding, B point series load regulating R load And the rear is grounded.
7. The inductive energy storage forming line-based nanosecond short pulse power parallel modulation topology of claim 6, wherein: the modulation switch M cut Is a MOSFET switch tube, wherein, the modulation switch M cut The grid electrode of the transistor is suspended, the source electrode is grounded, and the drain electrode is connected with the H end.
8. The inductive energy storage forming line-based nanosecond short pulse power parallel modulation topology of claim 6, wherein: the main switch M main Is a MOSFET switch tube, wherein, a main switch M main The grid electrode of the transistor is suspended, the drain electrode is connected with the end F, and the source electrode is grounded.
9. A modulation method based on the nanosecond short pulse power parallel modulation topology as claimed in any one of claims 6 to 8, characterized by comprising the steps of:
1) At t 1 Time master switch M main Off, modulating switch M cut Closing, wherein the inductance stores energy to form refraction and reflection generated by the line;
2) At time l/2, the modulating switch M is turned off cut Closing the main switch M main The inductance energy storage forming line has two current waves with the same opposite directions and the same magnitude in one propagation period, thereby the inductance energy storage forming line has the same current wave in the modulation resistor R con Forming a modulation pulse width with the time length of 2 l;
propagation period start time t 1 The current waves of (a) are respectively as follows:
propagation period termination time t 1 The current waves of (a) are respectively as follows:
10. the modulation method according to claim 9, wherein impedance state equations at a and B are respectively as follows:
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