CN113783452B

CN113783452B - Modulation method and device of inverter, storage medium and processor

Info

Publication number: CN113783452B
Application number: CN202111107462.XA
Authority: CN
Inventors: 魏兵戌; 朱永强; 殷童欢; 宋泽琳; 郭立星; 李亚巍
Original assignee: Gree Electric Appliances Inc of Zhuhai
Current assignee: Gree Electric Appliances Inc of Zhuhai
Priority date: 2021-09-22
Filing date: 2021-09-22
Publication date: 2023-11-17
Anticipated expiration: 2041-09-22
Also published as: CN113783452A

Abstract

The invention discloses a modulation method and device of an inverter, the inverter, a storage medium and a processor, wherein the method comprises the following steps: collecting the direct current bus voltage and the three-phase voltage of an NPC type three-level inverter; synthesizing a reference voltage vector according to the DC bus voltage and the three-phase voltage under the set low carrier ratio condition, and redetermining a switching sequence; and determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual middle vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter. According to the scheme, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector, so that the error in synthesizing the reference voltage vector is lower, and the quality of the output waveform of the inverter is improved.

Description

Modulation method and device of inverter, storage medium and processor

Technical Field

The invention belongs to the technical field of inverters, and particularly relates to a modulation method and device of an inverter, the inverter, a storage medium and a processor, in particular to a modulation method and device of an NPC three-level inverter, the storage medium and the processor.

Background

Inverters, such as NPC-type (i.e., neutral point clamped) three-level inverters, are widely used in medium-high voltage, high power devices, but their switching frequency is typically not more than 1kHz due to their high power levels, taking into account switching losses. Under the conditions of low switching frequency and low carrier ratio, the current waveform output by the inverter can be severely distorted, and the electric equipment and the power grid side are influenced and even damaged. In consideration of the problems that the current waveform output by the inverter is severely distorted under the conditions of low switching frequency and low carrier ratio, and the electric equipment and the power grid side are influenced or even damaged, the inverter synchronous modulation method is adopted in some schemes, but the waveform output by the inverter is severely distorted due to lower switching frequency and lower carrier ratio.

The foregoing is provided merely for the purpose of facilitating understanding of the technical solutions of the present invention and is not intended to represent an admission that the foregoing is prior art.

Disclosure of Invention

The invention aims to provide a modulation method, a modulation device, an inverter, a storage medium and a processor of an inverter, which are used for solving the problem that in the inverter synchronous modulation method, the output waveform of the inverter is seriously distorted due to lower switching frequency and lower carrier wave, and achieving the effects that the error is lower when the reference voltage vector is synthesized by using a virtual vector (such as a virtual middle vector) to participate in synthesizing the reference voltage vector, so that the quality of the output waveform of the inverter is improved.

The invention provides a modulation method of an inverter, which comprises an NPC three-level inverter; the modulation method of the NPC three-level inverter comprises the following steps: collecting the direct current bus voltage and the three-phase voltage of the NPC type three-level inverter; synthesizing a reference voltage vector according to the direct current bus voltage and the three-phase voltage under the set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined; and determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual middle vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter.

In some embodiments, a reference voltage vector is synthesized from the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined, wherein the method comprises the following steps: synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system; synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal; determining a sector where the reference voltage vector is located in a space vector diagram of the NPC three-level inverter and a corresponding small area according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area; the small area is a sub-area inside the sector; screening basic voltage vectors of the NPC three-level inverter according to angles and modulation degrees of a sector where the space vector diagram is located and a corresponding small area and angles and modulation degrees of the reference voltage vector in the sector where the space vector diagram is located and the corresponding small area, and synthesizing a virtual middle vector; and re-determining the subarea of the small area in the sector in the space vector diagram according to the angles and modulation degrees of the sector in the space vector diagram and the corresponding small area and the reference voltage vector in the sector in the space vector diagram and the corresponding small area, and re-designing the switching sequence.

In some embodiments, screening the basic voltage vector of the NPC type three-level inverter, synthesizing a virtual medium vector, comprising: screening basic voltage vectors in space vectors of the NPC three-level inverter according to a calculation mode of the common-mode voltage amplitude, removing partial zero vectors and small vectors to obtain basic voltage vectors with the common-mode voltage amplitude meeting a set value, and recording the basic voltage vectors as a basic voltage vector alternative set; according to the basic voltage vector alternative set, synthesizing a virtual middle vector by participation of adjacent small vectors according to the following formula:

wherein V is ₀ Zero vector, V ₇ 、V ₈ Small vectors, V ₁₃ Is the middle vector, and V ₁₃ ' is a virtual vector, V ₁ 、V ₂ For large vectors, P, O and N states are denoted as 2, 1 and 0, respectively.

In some embodiments, redefining the partition of the small area in the sector in the space vector diagram, redesigning the switching sequence includes: a distribution area of the repartitioned virtual middle vector and the rest of the basic voltage vectors; according to the distribution area, the space vector diagram is re-divided, and the re-determined partition of the small area in the sector in the space vector diagram is obtained; when the reference voltage vectors are distributed in the corresponding areas in the subareas, determining the switch sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set areas and the set switch sequence, and obtaining the redesigned switch sequence.

In some embodiments, determining the duty cycle of each switching device in the NPC-type three-level inverter includes: determining the duty ratio of each switching device in the NPC three-level inverter by utilizing a volt-second product balance equation; the volt-second product balance equation is:

wherein V is _ref For reference voltage vector, T _s In units of sampling time, V _x 、V _y 、V _z Respectively basic voltage vectors, T, of the participating synthetic reference voltage vectors ₀ 、T ₁ 、T ₂ And the duty ratios corresponding to the basic voltage vector and the virtual middle vector are respectively, and corresponding PWM pulse waveforms can be obtained through the duty ratios, so that the control of the inverter is realized.

In accordance with another aspect of the present invention, there is provided a modulation apparatus for an inverter, the inverter including an NPC type three-level inverter; the modulation device of the NPC type three-level inverter comprises: the acquisition unit is configured to acquire the direct current bus voltage and the three-phase voltage of the NPC three-level inverter; a modulation unit configured to synthesize a reference voltage vector from the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined; the modulation unit is further configured to determine a duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual middle vector and the switching sequence, so as to realize modulation of the NPC type three-level inverter.

In some embodiments, the modulation unit synthesizes a reference voltage vector from the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined, wherein the method comprises the following steps: synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system; synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal; determining a sector where the reference voltage vector is located in a space vector diagram of the NPC three-level inverter and a corresponding small area according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area; the small area is a sub-area inside the sector; screening basic voltage vectors of the NPC three-level inverter according to angles and modulation degrees of a sector where the space vector diagram is located and a corresponding small area and angles and modulation degrees of the reference voltage vector in the sector where the space vector diagram is located and the corresponding small area, and synthesizing a virtual middle vector; and re-determining the subarea of the small area in the sector in the space vector diagram according to the angles and modulation degrees of the sector in the space vector diagram and the corresponding small area and the reference voltage vector in the sector in the space vector diagram and the corresponding small area, and re-designing the switching sequence.

In some embodiments, the modulating unit screens the basic voltage vector of the NPC type three-level inverter, synthesizes a virtual middle vector, and includes: screening basic voltage vectors in space vectors of the NPC three-level inverter according to a calculation mode of the common-mode voltage amplitude, removing partial zero vectors and small vectors to obtain basic voltage vectors with the common-mode voltage amplitude meeting a set value, and recording the basic voltage vectors as a basic voltage vector alternative set; according to the basic voltage vector alternative set, synthesizing a virtual middle vector by participation of adjacent small vectors according to the following formula:

In some embodiments, the modulating unit redetermines the partition of the small area in the sector in the space vector diagram, and redesigns the switching sequence, including: a distribution area of the repartitioned virtual middle vector and the rest of the basic voltage vectors; according to the distribution area, the space vector diagram is re-divided, and the re-determined partition of the small area in the sector in the space vector diagram is obtained; when the reference voltage vectors are distributed in the corresponding areas in the subareas, determining the switch sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set areas and the set switch sequence, and obtaining the redesigned switch sequence.

In some embodiments, the modulation unit determining a duty ratio of each switching device in the NPC type three-level inverter includes: determining the duty ratio of each switching device in the NPC three-level inverter by utilizing a volt-second product balance equation; the volt-second product balance equation is:

wherein V is _ref For reference voltage vector, T _s In units of sampling time, V _x 、V _y 、V _z Respectively, are involved in synthesizing reference voltage vectorsBasic voltage vector of quantity T ₀ 、T ₁ 、T ₂ And the duty ratios corresponding to the basic voltage vector and the virtual middle vector are respectively, and corresponding PWM pulse waveforms can be obtained through the duty ratios, so that the control of the inverter is realized.

In accordance with another aspect of the present invention, there is provided an inverter comprising: the modulation device of the inverter described above.

In accordance with the above method, a further aspect of the present invention provides a storage medium, where the storage medium includes a stored program, where the program, when executed, controls a device in which the storage medium is located to perform the above-described modulation method of the inverter.

In accordance with a further aspect of the present invention, there is provided a processor for running a program, wherein the program is run to perform the method of modulating an inverter as described above.

Therefore, the scheme of the invention further divides the space vector diagram by synthesizing the virtual middle vector under the condition of low carrier ratio, uses the virtual vector (such as the virtual middle vector) to participate in synthesizing the reference voltage vector by subdividing the sector, and adds a virtual vector (such as the virtual middle vector) between adjacent small vectors; therefore, by using the virtual vector (such as the virtual middle vector) to participate in synthesizing the reference voltage vector, the error in synthesizing the reference voltage vector can be lower, and the quality of the output waveform of the inverter can be improved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

The technical scheme of the invention is further described in detail through the drawings and the embodiments.

Drawings

Fig. 1 is a flowchart illustrating an embodiment of a modulation method of an inverter according to the present invention;

FIG. 2 is a schematic flow chart of an embodiment of the method of the present invention for synthesizing a reference voltage vector and redefining a switching sequence based on the DC bus voltage and the three-phase voltage;

FIG. 3 is a flow chart of an embodiment of the method of the present invention for screening the basic voltage vectors of the NPC type three-level inverter and synthesizing virtual medium vectors;

FIG. 4 is a flow chart of an embodiment of a method of the present invention for redefining the partition of small areas in a sector in the space vector diagram and redesigning the switching sequence;

FIG. 5 is a schematic diagram of the structure of an NPC three level inverter topology;

FIG. 6 is a schematic diagram of the entire space vector in the αβ coordinate system;

FIG. 7 is a schematic diagram of a virtual mid-vector, specifically Z ₁ Virtual vector synthesis schematic in the sector;

FIG. 8 is a flow chart of an embodiment of a modulation method of an NPC three-level inverter;

fig. 9 is a schematic structural diagram of an embodiment of a modulation device of an inverter according to the present invention.

In the embodiment of the present invention, reference numerals are as follows, in combination with the accompanying drawings:

102-an acquisition unit; 104-modulating unit.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to specific embodiments of the present invention and corresponding drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

In some schemes of adopting the synchronous modulation method of the NPC three-level inverter, the output phase voltage of the inverter is enabled to meet the synchronism, the three-phase symmetry and the half-wave symmetry, and subharmonics, three and multiples of three and even subharmonics existing in the waveform are eliminated. Along with the development of related technology, the waveform quality requirement in the industry is higher and higher under the condition of low carrier ratio, so that the improvement of the output waveform quality of the inverter under the condition of low carrier ratio is of great significance.

According to an embodiment of the present invention, there is provided a modulation method of an inverter, as shown in fig. 1, which is a schematic flow chart of an embodiment of the method of the present invention. The inverter comprises an NPC type three-level inverter. The modulation method of the NPC three-level inverter comprises the following steps: step S110 to step S130.

At step S110, a dc bus voltage and a three-phase voltage of the NPC type three-level inverter are collected. DC bus voltage of NPC three-level inverter, such as DC bus voltage V _dc . Three-phase voltages of the NPC type three-level inverter, e.g. three-phase voltage V _a 、V _b And V _c 。

At step S120, synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in the space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined.

Specifically, a reference voltage vector is synthesized by bus voltage and three-phase voltage, and a given reference value is meant; and selecting a basic vector and a virtual middle vector in the space vector diagram, and de-equating the synthesized reference vector. Therefore, the reference voltage vector cannot directly control the switching action of the inverter, the basic voltage vector and the virtual middle vector are required to be de-equivalent to replace synthesis, the basic voltage vector and the virtual middle vector are the switch combination of the inverter, and the basic voltage vector and the virtual middle vector are used for controlling the switch of the inverter to achieve the purpose of controlling the output waveform of the inverter system, and the process is called modulation. The virtual middle vector is equivalently synthesized by a basic voltage vector, is a fixed switch mode combination like the basic voltage vector, and is not synthesized by bus voltage and three-phase voltage.

In some embodiments, in combination with the method of the present invention shown in fig. 2, a flow chart of an example of synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltage and redefining a switching sequence, further illustrating the step S120 of synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and the specific process of the switch sequence is redetermined comprises the following steps: step S210 to step S250.

And step S210, combining the DC bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system. The first voltage signal and the second voltage signal refer to sampled bus voltages and three-phase voltages. First voltage signal, e.g. signal V _α A second voltage signal such as signal V _β 。

Step S220, synthesizing a reference voltage vector, such as reference voltage vector V, according to the first voltage signal and the second voltage signal _ref 。

Step S230, determining a sector and a corresponding small area of the reference voltage vector in a space vector diagram of the NPC three-level inverter according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector and the corresponding small area; the small area is a sub-area inside the sector. Angles such as angle theta _n Modulation such as modulation m.

Fig. 8 is a flow chart of an embodiment of a modulation method of an NPC type three-level inverter. As shown in fig. 8, the modulation method of the NPC-type three-level inverter provided by the scheme of the present invention includes: step 1, sampling three-phase voltage V _a 、V _b And V _c Synthesizing the signal V in the stationary coordinate system (i.e. alpha beta coordinate system) _α 、V _β Thereby synthesizing a reference voltage vector V _ref According to the judgment reference voltage vector V _ref The amplitude and the phase of the sector where the amplitude and the phase of the phase are positioned and the corresponding small area are determined, and the modulation range is judged according to the calculation mode of the modulation m, wherein the expression of m is：

Wherein, the reference vector V is judged _ref Is required to be determined by the magnitude and phase of the synthesized reference vector V _α And V _β Reference vector synthesis is performed in which the magnitudeThe phase, i.e. the angle, is calculated by: />

When the amplitude and the angle of the reference vector are known, according to the partition method in the space vector diagram, the specific sector and the small area of the reference voltage vector can be judged.

N and N refer to the sector and small region in the space vector diagram, respectively, i.e., N refers to sector Z ₁ ～Z ₆ N denotes small regions (1) to (4). N and N are variables, indicated in italics. In the NPC type three-level inverter system, the switching state N, the load neutral point N, and the sector number N in the switching sequence P, O, N are all present at the same time, do not affect each other, and only need to explain which meaning is before using the symbol, such as the N state, the load neutral point N, the large sector number N, etc., which are all colloquially expressed symbols in the field, that is, the load neutral point is denoted by N, the sector number is denoted by N, and only need to be distinguished before using, which is trace-able in various documents and patents.

And step S240, screening the basic voltage vector of the NPC three-level inverter according to the angles and modulation degrees of the sector and the corresponding small area in the space vector diagram and the reference voltage vector in the sector and the corresponding small area, and synthesizing a virtual middle vector. The method comprises the steps of,

in some embodiments, in combination with the basic voltage vector of the NPC-type three-level inverter screened in the method of the present invention shown in fig. 3, an example flow chart of synthesizing a virtual middle vector is further described, which further describes a specific process of screening the basic voltage vector of the NPC-type three-level inverter in step S240, and synthesizing a virtual middle vector, including: step S310 and step S320.

Step S310, screening basic voltage vectors in space vectors of the NPC type three-level inverter according to a calculation mode of the common-mode voltage amplitude, removing partial zero vectors and small vectors to obtain basic voltage vectors with the common-mode voltage amplitude meeting a set value, and recording the basic voltage vectors as a basic voltage vector alternative set.

As shown in fig. 8, the modulation method of the NPC-type three-level inverter provided by the scheme of the present invention further includes:

step 2, screening basic voltage vectors according to a common-mode voltage amplitude calculation formula, discarding zero vectors and small vectors with partial over-high amplitudes, and setting a switch algebra K value as a standard for evaluating the basic voltage vectors to generate common-mode voltage amplitudes, wherein the expression of the switch algebra K is shown in the following formula:

K＝|S ₁ +S ₂ +S ₃ | (2)。

In the above, S ₁ 、S ₂ And S is ₃ The three phase switch states, P, O and N states are denoted 2, 1 and 0, respectively. Substituting each candidate vector set and the basic voltage vector into a K value expression to perform rolling optimization calculation, wherein the higher the K value is, the higher the common-mode voltage amplitude is, and vice versa, the basic voltage vector with the lowest common-mode voltage amplitude is screened out, and the basic voltage vector can be used for synthesizing an optimal switching sequence subsequently.

The common mode voltage expression is:

v in _AO 、v _BO 、v _CO Respectively A, B, C three-phase voltages.

Considering the influence of common-mode voltage, the scheme of the invention also carries out the suppression of the common-mode voltage amplitude when screening the basic voltage vector, and takes the formula in the step 2 as a screening standard, wherein the screened basic voltage vector is the same type with the lowest common-mode voltage amplitude. Thus, the common-mode voltage amplitude of the output side of the inverter can be effectively suppressed.

Step S320, according to the basic voltage vector alternative set, synthesizing a virtual middle vector by participation of adjacent small vectors according to the following formula:

Step 3, according to the basic voltage vector alternative set screened in the step 2, the adjacent small vectors participate in synthesizing a virtual middle vector, and the situation of the rest basic voltage vectors is combined, so that Z is shown in figure 7 ₁ For the large sector, the specific calculation relationship is as follows:

the combination of the remaining basic voltage vector cases is meant to illustrate only Z herein ₁ The case in the sector, the case of the remaining sectors is similar and will not be explained in any more detail, so that it is considered here that "remaining" here refers to the virtual middle vector and other basic voltage vectors after repartitioning in combination with the case of the remaining basic voltage vectors.

Consider the problem of too high amplitude of common mode voltage in the synchronous modulation method of the NPC type three-level inverter of the related scheme. In the scheme of the invention, aiming at the problem of higher common-mode voltage amplitude in the synchronous modulation method of the related scheme, when the virtual middle vector is synthesized, the basic voltage vector with higher common-mode voltage amplitude is abandoned, so as to reduce the common-mode voltage of the system. Therefore, aiming at the problem of higher common-mode voltage amplitude in a modulation method of a related scheme, a zero vector first-order sequence synthesis method is adopted under a low modulation degree, and when virtual middle vectors and reference voltage vectors are synthesized, a basic voltage vector with higher common-mode voltage amplitude is abandoned, so that the common-mode voltage amplitude of a system is reduced.

Step S250, re-determining the subarea of the small area in the sector in the space vector diagram according to the angle and modulation degree of the sector in the space vector diagram and the corresponding small area and the reference voltage vector in the sector and the corresponding small area, and re-designing the switch sequence. I.e. the repartitioning of small areas within a sector, instead of the partitioning of large sectors, see the example shown in fig. 7.

In the example shown in fig. 8, first, the dc bus voltage V is collected _dc And three-phase voltage V _a 、V _b And V _c From signal V _α 、V _β Synthetic reference voltage vector V _ref And sector judgment and angle theta are carried out _n And a modulation m. And secondly, after the signals are obtained, virtual middle vector synthesis, repartitioning and switching sequence design are carried out. And finally, according to the condition of the switching sequence, duty ratio calculation is carried out by a volt-second balance equation, PWM pulse is obtained to act on the inverter, and control of the inverter is realized.

In some embodiments, in conjunction with the method of the present invention shown in fig. 4, which is a flowchart illustrating an example of redefining the partition of the small area in the sector in the space vector diagram and redefining the switch sequence, the specific process of redefining the partition of the small area in the sector in the space vector diagram in step S250 is further described, and the redefining the switch sequence includes: step S410 to step S430.

Step S410, according to the angles and modulation degrees of the sector and the corresponding small area in the space vector diagram, and the reference voltage vector in the sector and the corresponding small area, the distribution areas of the repartitioned virtual middle vector and the rest basic voltage vector are obtained.

And step S420, re-dividing the space vector diagram according to the distribution area to obtain the re-determined partition of the small area in the sector in the space vector diagram, namely obtaining the re-division of the small area in the sector in the space vector diagram.

Step S430, when the reference voltage vector is distributed in the corresponding area in the partition, determining a switching sequence of the area where the reference voltage vector is located according to the corresponding relation between the set area and the set switching sequence, so as to obtain the redesigned switching sequence.

step 4, according to the distribution of the repartitioned virtual middle vector and the rest basic voltage vectors, the space vector diagram is repartitioned, when the reference voltage vectors are distributed in the corresponding areas, namely the corresponding nearest three vectors are subjected to equivalent synthesis, taking the number N=4 of the reference voltage vectors in the unit sector as an example, when the reference voltage vectors are positioned in the small areas (1) and (2) in fig. 7, zero vectors are adopted first, and the vectors needed to be used are V ₀ 、V ₇ 、V ₈ 、V ₁₃ ' at this time, the switching sequence is shown in the following Table 1:

V _ref	Z ₁	Z ₂	Z ₃
				V _ref1	OOO-POO-POO-OON	OOO-OON-OON-OPO	OOO-OPO-OPO-NOO
V _ref2	OON-POO-POO-OOO	OPO-OON-OON-OOO	NOO-OPO-OPO-OOO
				V _ref3	OOO-OON-OON-POO	OOO-OPO-OPO-OON	OOO-NOO-NOO-OPO
V _ref4	POO-OON-OON-OOO	OON-OPO-OPO-OOO	OPO-NOO-NOO-OOO
					Z ₄	Z ₅	Z ₆
V _ref1	OOO-NOO-NOO-OOP	OOO-OOP-OOP-ONO	OOO-ONO-ONO-POO
				V _ref2	OOP-NOO-NOO-OOO	ONO-OOP-OOP-OOO	POO-ONO-ONO-OOO
V _ref3	OOO-OOP-OOP-NOO	OOO-ONO-ONO-OOP	OOO-POO-POO-ONO
				V _ref4	NOO-OOP-OOP-OOO	OOP-ONO-ONO-OOO	ONO-POO-POO-OOO

when the reference voltage vectors are located in the small areas (3) and (4) in fig. 7, the middle vector is adopted first, and V is needed to be used ₇ 、V ₈ 、V ₁₃ ' and V ₁₃ The switching sequence is now the following table 2:

V _ref	Z ₁	Z ₂	Z ₃
				V _ref1	PON-POO-OON-OON	OPN-OON-OPO-OPO	NPO-OPO-NOO-NOO
V _ref2	OON-OON-POO-PON	OPO-OPO-OON-OPN	NOO-NOO-OPO-NPO
				V _ref3	PON-POO-POO-OON	OPN-OPO-OON-OON	NPO-NOO-OPO-OPO
V _ref4	OON-POO-POO-PON	OON-OON-OPO-OPN	OPO-OPO-NOO-NPO
					Z ₄	Z ₅	Z ₆
V _ref1	NOP-NOO-OOP-OOP	ONP-OOP-ONO-ONO	PNO-ONO-POO-POO
				V _ref2	OOP-OOP-NOO-NOP	ONO-ONO-OOP-ONP	POO-POO-ONO-PNO
V _ref3	NOP-OOP-NOO-NOO	ONP-ONO-OOP-OOP	PNO-POO-ONO-ONO
				V _ref4	NOO-NOO-OOP-NOP	OOP-OOP-ONO-ONP	ONO-ONO-POO-PNO

the two tables in step 4 (i.e., tables 1 and 2) are the results of the switching sequence at low modulation, which is applied to the inverter, the resulting inverter output waveform quality is optimized and the common mode voltage amplitude is the lowest.

At step S130, a duty cycle of each switching device in the NPC-type three-level inverter is determined according to the basic voltage vector, the virtual middle vector, and the switching sequence, so as to implement modulation of the NPC-type three-level inverter.

The scheme of the invention provides an NPC type three-level inverter modulation method, which provides the idea of applying virtual vector (such as virtual middle vector) modulation in synchronous modulation, and adds a virtual vector (such as virtual middle vector) between adjacent small vectors. In the scheme of the invention, a synchronous modulation method applied to the condition of low carrier ratio is also designed, the switching sequence has the characteristic of O clamping, and by the clamping mode, a certain phase clamp is in an O state and does not act in a period of time, so that the switching action of the inverter is reduced, and further the switching loss is reduced.

The synchronous modulation method applied to the low carrier ratio condition refers to a synchronous modulation method used under the low carrier ratio condition, wherein the concept of the low carrier ratio is given in the following, and the synchronous modulation of the three-level inverter refers to the synchronous modulation of the three-level inverter under the low switching frequency condition, and the output phase voltage meets the synchronism, the three-phase symmetry and the half-wave symmetry by designing an inverter switching sequence under the low carrier ratio condition, so that the distortion degree of the output waveform of the inverter is reduced. In the embodiment of the present invention, the switching sequence is determined, and thus it can be considered that the modulation of the inverter is performed with a predetermined duty ratio.

The O-clamp characteristic means that the switching state of a certain phase is not operated in the O-clamp state within a certain period of time, i.e. S _k1 And S is equal to _k4 Turn off, S _k2 And S is equal to _k3 The switching tube is not operated, so that the switching loss is not generated, and the aim of reducing the switching loss of the inverter can be fulfilled. The O state, i.e., the O clamp state.

Fig. 5 is a schematic diagram of the structure of an NPC type three-level inverter topology. FIG. 5 is a schematic diagram of the topology of an NPC three level inverter, shown in FIG. 5 as V _dc Is the voltage of a direct current bus, C ₁ 、C ₂ Respectively is a direct-current side voltage stabilizing capacitor, wherein the midpoint of the two capacitors is connected to the midpoint of the two freewheeling diodes of each phase, and is the midpoint O, S of the NPC three-level inverter _k1 -S _k4 (k=a, B, C) is a phase a, B, C power switch tube, the load A, B, C is a three-phase resistive load, and N is a load neutral point. According to the combination of the four power switching tubes in the phase A, the phase B and the phase C, three level states P, O, N can be combined according to the combination of the four power switching tubes (namely on and off), and the three level states correspond to the V of the DC bus voltage respectively _dc /2、0、-V _dc I generated by inverter/2 _A 、i _B 、i _C Three-phase current to achieve driving of the load.

The O, N in P, O, N, unlike the aforementioned mid-point O and neutral point N, refers to the switching state in P, O, N in the switching sequence, and is determined by different switching combinations of switching devices, and belongs to a mathematical expression method, and the mid-point O and load neutral point N of the inverter refer to the physical point on the inverter or load, which is a recognized expression method in the field of three-level inverters, and only the expression is accurate, without distinction.

Fig. 6 is a schematic diagram of the entire space vector in the αβ coordinate system. In FIG. 6, the rotation is counterclockwise about the horizontal axis, the alpha axis, the vertical axis, and the alpha axis, with one every pi/3 angleThe whole space vector diagram is divided into 6 sectors which are respectively marked as Z ₁ ～Z ₆ Each sector is in turn divided into four small areas (1) (2) (3) (4), as shown in fig. 6.

Fig. 7 is a schematic diagram of a virtual mid-vector. In the example shown in FIG. 7, Z is ₁ The sector is used for repartitioning the space vector diagram, and is different from the one in fig. 6 in that a virtual middle vector is added, the phase of which is the same as that of the middle vector, the amplitude of which is half of that of the middle vector, and the virtual middle vector V ₁₃ ' from two small vectors V ₇ 、V ₈ Participating in the synthesis, the new partition is as shown in FIG. 7, the basic voltage vector of which includes a zero vector V ₀ Small vector V ₇ 、V ₈ Middle vector V ₁₃ And virtual vector V ₁₃ ' sum large vector V ₁ 、V ₂ 。

In consideration of the problem of serious distortion of inverter output waveforms caused by low switching frequency and low carrier ratio in the NPC type three-level inverter synchronous modulation method of the related scheme. In the scheme of the invention, a synchronous virtual vector (such as a virtual middle vector) modulation method is provided, under the condition of low carrier ratio, a space vector diagram is further divided by synthesizing the virtual middle vector, and virtual vectors (such as the virtual middle vector) are used for participating in synthesizing a reference voltage vector by subdividing sectors, so that the error in synthesizing the reference voltage vector is reduced, and the quality of an output waveform of an inverter is further improved.

The carrier ratio is the ratio of the carrier to the modulated wave, and the low carrier ratio is the ratio of the carrier to the modulated wave, and when the frequency of the modulated wave is constant, the carrier frequency is low, and the carrier frequency is the switching frequency of the inverter, which is the low carrier ratio under the condition of low switching frequency.

In this way, a virtual vector (such as a virtual middle vector) modulation method is provided for solving the problem of waveform distortion of the output of the inverter caused by low switching frequency, a virtual middle vector is synthesized by a small vector, then a reference voltage vector is synthesized, and the space vector diagram is re-partitioned by adding the virtual vector (such as the virtual middle vector), so that the error is lower when the reference voltage vector is synthesized, and the method has positive significance for improving waveform quality.

In some embodiments, determining the duty cycle of each switching device in the NPC-type three-level inverter in step S130 includes: and determining the duty ratio of each switching device in the NPC three-level inverter by using a volt-second product balance equation. The volt-second product balance equation is:

Step 5, after obtaining a corresponding switching sequence, a volt-second equilibrium equation is adopted:

the duty ratio of each switching device can be obtained, wherein V _ref For reference voltage vector, T _s In units of sampling time, V _x 、V _y 、V _z The basic voltage vectors respectively participate in the synthesis of the reference voltage vector, and also comprise the virtual middle vector, T ₀ 、T ₁ 、T ₂ And the corresponding duty ratios are respectively, and corresponding PWM pulse waveforms can be obtained according to the duty ratios, so that the control of the inverter is realized.

The above formula and parameters are abstract formulas, i.e. formulas with general meaning, and the volt-second balance equation appearing here is intended to illustrate that the duty ratio of the basic voltage vector and the virtual vector can be calculated according to the equation. And according to different sectors where the reference vector is located, corresponding to the different sectorsThe basic voltage vector and virtual vector combination are different and therefore no visualization is necessary, therefore V _x 、V _y 、V _z Which may be expressed as a combination of synthetic reference vectors, but which of which represents the basic voltage vector and which represents the virtual vector, is not described in too great a detail, and is a common expression method in many papers and patents.

In the scheme of the invention, virtual vectors (such as virtual middle vectors) are synthesized between adjacent small vectors, and Z is used ₁ Sector is exemplified by V in step 4 ₁₃ ' it can be demonstrated by geometric mapping that the magnitude of a virtual vector (e.g., a virtual vector) can be determined by this method of synthesis at the boundary line of the boundary small region, i.e., at the common intersection of the small regions (1) (2) (3) (4) in fig. 7. In this way, a virtual vector (such as a virtual middle vector) is newly added in the middle of the small vector, the alternative basic voltage vector set is widened, when the basic voltage vector synthesizes the reference voltage vector according to the concept of vector error in the latest three-vector synthesis method, the distance is shortened, the vector error is reduced, the synthesis precision is increased, and the waveform quality can be further improved.

By adopting the technical scheme of the embodiment, the space vector diagram is further divided by synthesizing the virtual middle vector under the condition of low carrier ratio, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, a virtual vector (such as the virtual middle vector) is newly added between adjacent small vectors, and the common-mode voltage amplitude is also suppressed when the basic voltage vector is screened. Therefore, by using the virtual vector (such as the virtual middle vector) to participate in synthesizing the reference voltage vector, the error in synthesizing the reference voltage vector can be lower, the quality of the output waveform of the inverter can be improved, and the amplitude of the common-mode voltage at the output side of the inverter can be effectively restrained.

According to an embodiment of the present invention, there is also provided a modulation apparatus of an inverter corresponding to a modulation method of the inverter. Referring to fig. 9, a schematic diagram of an embodiment of the apparatus of the present invention is shown. The inverter comprises an NPC type three-level inverter. The modulation device of the NPC type three-level inverter comprises: acquisition unit 102 and modulation unit 104.

Wherein, the acquisition unit 102 is configured to acquire the direct current bus voltage and the three-phase voltage of the NPC type three-level inverter. DC bus voltage of NPC three-level inverter, such as DC bus voltage V _dc . Three-phase voltages of the NPC type three-level inverter, e.g. three-phase voltage V _a 、V _b And V _c . The specific function and process of the acquisition unit 102 refer to step S110.

A modulation unit 104 configured to synthesize a reference voltage vector from the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in the space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined. The specific function and process of the modulation unit 104 refer to step S120.

In some embodiments, the modulation unit 104 synthesizes a reference voltage vector from the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined, wherein the method comprises the following steps:

the modulation unit 104 is specifically further configured to synthesize the dc bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal in a stationary coordinate system. First voltage signal, e.g. signal V _α A second voltage signal such as signal V _β . The specific function and processing of the modulation unit 104 is also referred to in step S210.

The modulation unit 104 is in particular further configured to synthesize a reference voltage vector, such as reference voltage vector V, from the first voltage signal and the second voltage signal _ref . The specific function and processing of the modulation unit 104 is also referred to in step S220.

The modulation unit 104 is in particular alsoThe system is configured to determine a sector where the reference voltage vector is located in a space vector diagram of the NPC three-level inverter and a corresponding small area according to the amplitude and the phase of the reference voltage vector, and determine an angle and a modulation degree of the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area; the small area is a sub-area inside the sector. Angles such as angle theta _n Modulation such as modulation m. The specific function and processing of the modulation unit 104 is also referred to in step S230.

Fig. 8 is a flow chart of an embodiment of an NPC type three-level inverter modulation device. As shown in fig. 8, an NPC-type three-level inverter modulation device provided by the scheme of the present invention includes: step 1, sampling three-phase voltage V _a 、V _b And V _c Synthesizing the signal V in the stationary coordinate system (i.e. alpha beta coordinate system) _α 、V _β Thereby synthesizing a reference voltage vector V _ref According to the judgment reference voltage vector V _ref The amplitude and the phase of the sector where the phase is located and the corresponding small area are determined, and the modulation degree range is judged according to the calculation mode of the modulation degree m, wherein the expression of m is as follows:

the modulation unit 104 is specifically further configured to screen the basic voltage vector of the NPC three-level inverter according to the angle and modulation degree of the sector where the space vector diagram is located and the corresponding small area, and the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area, and synthesize a virtual middle vector. The specific function and processing of the modulation unit 104 is also referred to in step S240. The method comprises the steps of,

in some embodiments, the modulating unit 104 screens the basic voltage vector of the NPC type three-level inverter to synthesize a virtual middle vector, including:

The modulating unit 104 is specifically further configured to screen the basic voltage vector in the space vector of the NPC three-level inverter according to the calculation mode of the common-mode voltage amplitude, remove part of zero vectors and small vectors, obtain a basic voltage vector with the common-mode voltage amplitude conforming to the set value, and record the basic voltage vector as the basic voltage vector alternative set. The specific function and processing of the modulation unit 104 is also referred to in step S310.

As shown in fig. 8, the NPC-type three-level inverter modulation device provided by the scheme of the present invention further includes:

K＝|S ₁ +S ₂ +S ₃ | (2)。

The modulation unit 104 is specifically further configured to synthesize a virtual middle vector according to the basic voltage vector candidate set, with participation of neighboring small vectors according to the following formula:

wherein V is ₀ Zero vector, V ₇ 、V ₈ Small vectors, V ₁₃ Is the middle vector, and V ₁₃ ' in virtual middleVector, V ₁ 、V ₂ For large vectors, P, O and N states are denoted as 2, 1 and 0, respectively. The specific function and processing of the modulation unit 104 is also referred to in step S320.

consider the problem of too high amplitude of common mode voltage in the NPC type three-level inverter synchronous modulation device of the related scheme. In the scheme of the invention, aiming at the problem of higher common-mode voltage amplitude in the synchronous modulation device of the related scheme, when the virtual middle vector is synthesized, the basic voltage vector with higher common-mode voltage amplitude is abandoned, so as to reduce the common-mode voltage of the system. In this way, aiming at the problem of higher common-mode voltage amplitude in a related scheme modulation device, a zero vector first-order sequence synthesis device is adopted under a low modulation degree, and when virtual middle vectors and reference voltage vectors are synthesized, a basic voltage vector with higher common-mode voltage amplitude is abandoned, so that the common-mode voltage amplitude of a system is reduced.

The modulation unit 104 is specifically further configured to redetermine the partition of the small area in the sector in the space vector diagram according to the angle and the modulation degree of the sector in the space vector diagram and the corresponding small area, and the angle and the modulation degree of the reference voltage vector in the sector in the space vector diagram and the corresponding small area, and redesign the switching sequence. The specific function and processing of the modulation unit 104 is also referred to in step S250.

In the example shown in fig. 8, first, the dc bus voltage V is collected _dc And three-phase voltage V _a 、V _b And V _c From signal V _α 、V _β SynthesisReference voltage vector V _ref And sector judgment and angle theta are carried out _n And a modulation m. And secondly, after the signals are obtained, virtual middle vector synthesis, repartitioning and switching sequence design are carried out. And finally, according to the condition of the switching sequence, duty ratio calculation is carried out by a volt-second balance equation, PWM pulse is obtained to act on the inverter, and control of the inverter is realized.

In some embodiments, the modulating unit 104 redetermines the partition of the small area in the sector in the space vector diagram, and redesigns the switching sequence, including:

the modulation unit 104 is specifically further configured to re-divide the distribution area of the virtual middle vector and the rest of the basic voltage vectors according to the angles and modulation degrees of the sector and the corresponding small area in the space vector diagram and the sector and the corresponding small area in which the reference voltage vector is located. The specific function and processing of the modulation unit 104 is also referred to in step S410.

The modulating unit 104 is specifically further configured to re-divide the space vector diagram according to the distribution area, so as to obtain a re-determined partition of a small area in a sector in the space vector diagram. The specific function and processing of the modulation unit 104 is also referred to in step S420.

The modulating unit 104 is specifically further configured to determine, when the reference voltage vector is distributed in a corresponding area in the partition, a switching sequence of the area where the reference voltage vector is located according to a corresponding relationship between a set area and a set switching sequence, so as to obtain the redesigned switching sequence. The specific function and processing of the modulation unit 104 is also referred to in step S430.

step 4, according to the distribution of the repartitioned virtual middle vector and the rest basic voltage vectors, the space vector diagram is repartitioned, when the reference voltage vectors are distributed in the corresponding areas, namely the corresponding nearest three vectors are subjected to equivalent synthesis, taking the number of the reference voltage vectors in the unit sector of N=4 as an example,when the reference voltage vectors are located in the small areas (1) and (2) in fig. 7, the zero vector is adopted first, and the vector needed to be used is V ₀ 、V ₇ 、V ₈ 、V ₁₃ ' at this time, the switching sequence is shown in the following Table 1:

The modulation unit 104 is further configured to determine a duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual middle vector, and the switching sequence, so as to implement modulation of the NPC type three-level inverter. The specific function and processing of the modulation unit 104 is also referred to in step S130.

The scheme of the invention provides an NPC type three-level inverter modulation device, which provides the idea of applying virtual vector (such as virtual middle vector) modulation in synchronous modulation, and adds a virtual vector (such as virtual middle vector) between adjacent small vectors. In the scheme of the invention, a synchronous modulation device applied to the condition of low carrier ratio is also designed, the switching sequence of the synchronous modulation device has the characteristic of O clamping, and by adopting a clamping mode, a certain phase clamp is in an O state and does not act in a period of time, so that the switching action of an inverter is reduced, and further the switching loss is reduced.

Fig. 6 is a schematic diagram of the entire space vector in the αβ coordinate system. In FIG. 6, the horizontal axis is taken as the horizontal axis, the vertical axis is taken as the beta axis, the alpha axis is taken as the reference, the rotation is counterclockwise, each pi/3 angle is taken as one sector, the whole space vector diagram is divided into 6 sectors which are respectively marked as Z ₁ ～Z ₆ Each sector is in turn divided into four small areas (1) (2) (3) (4), as shown in fig. 6.

In consideration of the problem of serious distortion of inverter output waveforms due to low switching frequency and low carrier ratio in the NPC type three-level inverter synchronous modulation device of the related scheme. In the scheme of the invention, a synchronous virtual vector (such as a virtual middle vector) modulation device is provided, under the condition of low carrier ratio, a space vector diagram is further divided by synthesizing the virtual middle vector, and virtual vectors (such as the virtual middle vector) are used for participating in synthesizing a reference voltage vector by subdividing sectors, so that the error in synthesizing the reference voltage vector is reduced, and the quality of an output waveform of an inverter is further improved.

In this way, in order to solve the problem of waveform distortion of the inverter output caused by low switching frequency, a virtual vector (such as a virtual middle vector) modulating device is provided, a virtual middle vector is synthesized by a small vector, and then a reference voltage vector is synthesized, and the space vector diagram is re-partitioned by adding the virtual vector (such as the virtual middle vector), so that the error is lower when the reference voltage vector is synthesized, and the device has positive significance for improving waveform quality.

In some embodiments, the modulating unit 104 determines a duty ratio of each switching device in the NPC type three-level inverter, including: the modulation unit 104 is specifically further configured to determine the duty cycle of each switching device in the NPC-type three-level inverter using a volt-second product balance equation. The volt-second product balance equation is:

In the scheme of the invention, virtual vectors (such as virtual middle vectors) are synthesized between adjacent small vectors, and Z is used ₁ Sector is exemplified by V in step 4 ₁₃ ' it can be demonstrated by geometric mapping that the synthesizing device can determine the magnitude of a virtual vector (e.g., a virtual vector) on the boundary line of the boundary small region, i.e., at the common intersection point of the small regions (1) (2) (3) (4) in fig. 7. In this way, a virtual vector (such as a virtual middle vector) is newly added in the middle of the small vector, the alternative basic voltage vector set is widened, when the basic voltage vector synthesizes the reference voltage vector according to the concept of vector error in the latest three-vector synthesis method, the distance is shortened, the vector error is reduced, the synthesis precision is increased, and the waveform quality can be further improved.

Since the processes and functions implemented by the apparatus of the present embodiment substantially correspond to the embodiments, principles and examples of the foregoing methods, the descriptions of the embodiments are not exhaustive, and reference may be made to the descriptions of the foregoing embodiments and their descriptions are omitted herein.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual middle vector under the condition of low carrier ratio, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, a virtual vector (such as the virtual middle vector) is newly added between adjacent small vectors, and the basic voltage vector with higher common-mode voltage amplitude is abandoned when the virtual middle vector and the reference voltage vector are synthesized, so that the common-mode voltage amplitude of the system is reduced.

According to an embodiment of the present invention, there is also provided an inverter corresponding to the modulation device of the inverter. The inverter may include: the modulation device of the inverter described above.

Since the processes and functions implemented by the inverter of the present embodiment substantially correspond to the embodiments, principles and examples of the foregoing apparatus, the description of the present embodiment is not exhaustive, and reference may be made to the related descriptions of the foregoing embodiments, which are not repeated herein.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual middle vector under the condition of low carrier ratio, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, and a virtual vector (such as the virtual middle vector) is newly added between adjacent small vectors; therefore, by using the virtual vector (such as the virtual middle vector) to participate in synthesizing the reference voltage vector, the error in synthesizing the reference voltage vector can be lower, and the quality of the output waveform of the inverter can be improved.

According to an embodiment of the present invention, there is also provided a storage medium corresponding to a modulation method of an inverter, the storage medium including a stored program, wherein a device in which the storage medium is controlled to execute the above-described modulation method of an inverter when the program runs.

Since the processes and functions implemented by the storage medium of the present embodiment substantially correspond to the embodiments, principles and examples of the foregoing methods, the descriptions of the present embodiment are not exhaustive, and reference may be made to the related descriptions of the foregoing embodiments, which are not repeated herein.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual middle vector under the condition of low carrier ratio, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, and a virtual vector (such as the virtual middle vector) is newly added between adjacent small vectors, so that the accuracy in synthesizing is improved, and the waveform quality is improved.

According to an embodiment of the present invention, there is also provided a processor corresponding to a modulation method of an inverter, the processor being configured to execute a program, wherein the program executes the above-described modulation method of the inverter when running.

Since the processes and functions implemented by the processor of the present embodiment substantially correspond to the embodiments, principles and examples of the foregoing methods, the descriptions of the present embodiment are not exhaustive, and reference may be made to the related descriptions of the foregoing embodiments, which are not repeated herein.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual middle vector under the condition of low carrier ratio, the virtual vector (such as the virtual middle vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, a virtual vector (such as the virtual middle vector) is newly added between adjacent small vectors, and the space vector diagram is re-partitioned, so that the error is lower when the reference voltage vector is synthesized, and the waveform quality is improved.

In summary, it is readily understood by those skilled in the art that the above-described advantageous ways can be freely combined and superimposed without conflict.

The above description is only an example of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A modulation method of an inverter, wherein the inverter comprises an NPC type three-level inverter; the modulation method of the NPC three-level inverter comprises the following steps:

collecting the direct current bus voltage and the three-phase voltage of the NPC type three-level inverter;

Synthesizing a reference voltage vector according to the direct current bus voltage and the three-phase voltage under the set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined;

determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual middle vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter;

the space vector diagram is further divided by synthesizing virtual middle vectors under the condition of low carrier ratio, and virtual middle vectors are used for synthesizing reference voltage vectors by subdividing sectors, so that a virtual middle vector is newly added between adjacent small vectors; by using the virtual middle vector to participate in synthesizing the reference voltage vector, the error in synthesizing the reference voltage vector is lower, and the quality of the output waveform of the inverter is improved.

2. The method of modulating an inverter according to claim 1, wherein a reference voltage vector is synthesized based on the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined, wherein the method comprises the following steps:

Synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system;

synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal;

determining a sector where the reference voltage vector is located in a space vector diagram of the NPC three-level inverter and a corresponding small area according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area; the small area is a sub-area inside the sector;

screening basic voltage vectors of the NPC three-level inverter according to angles and modulation degrees of a sector where the space vector diagram is located and a corresponding small area and angles and modulation degrees of the reference voltage vector in the sector where the space vector diagram is located and the corresponding small area, and synthesizing a virtual middle vector; the method comprises the steps of,

and re-determining the subareas of the small areas in the sectors in the space vector diagram according to the angles and modulation degrees of the sectors and the corresponding small areas in the space vector diagram and the reference voltage vectors in the sectors and the corresponding small areas, and re-designing the switch sequence.

3. The method for modulating an inverter according to claim 2, wherein screening the basic voltage vector of the NPC type three-level inverter to synthesize a virtual medium vector comprises:

screening basic voltage vectors in space vectors of the NPC three-level inverter according to a calculation mode of the common-mode voltage amplitude, removing partial zero vectors and small vectors to obtain basic voltage vectors with the common-mode voltage amplitude meeting a set value, and recording the basic voltage vectors as a basic voltage vector alternative set;

according to the basic voltage vector alternative set, synthesizing a virtual middle vector by participation of adjacent small vectors according to the following formula:

4. The method of modulating an inverter according to claim 2, wherein redefining the partition of the small area in the sector in the space vector diagram, redefining the switching sequence, comprises:

a distribution area of the repartitioned virtual middle vector and the rest of the basic voltage vectors;

according to the distribution area, the space vector diagram is re-divided, and the re-determined partition of the small area in the sector in the space vector diagram is obtained;

When the reference voltage vectors are distributed in the corresponding areas in the subareas, determining the switch sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set areas and the set switch sequence, and obtaining the redesigned switch sequence.

5. The modulation method of an inverter according to any one of claims 1 to 4, wherein determining the duty ratio of each switching device in the NPC-type three-level inverter comprises:

determining the duty ratio of each switching device in the NPC three-level inverter by utilizing a volt-second product balance equation; the volt-second product balance equation is:

wherein V is _ref For reference voltage vector, T _s In units of sampling time, V _x 、V _y 、V _z Respectively basic voltage vectors, T, of the participating synthetic reference voltage vectors ₀ 、T ₁ 、T ₂ Duty ratios corresponding to the basic voltage vector and the virtual middle vector are respectively calculated by duty ratioThe corresponding PWM pulse waveform can be obtained through the space ratio, and the control of the inverter is realized.

6. A modulation device of an inverter, characterized in that the inverter comprises an NPC type three-level inverter; the modulation device of the NPC type three-level inverter comprises:

the acquisition unit is configured to acquire the direct current bus voltage and the three-phase voltage of the NPC three-level inverter;

A modulation unit configured to synthesize a reference voltage vector from the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined;

the modulation unit is further configured to determine a duty ratio of each switching device in the NPC-type three-level inverter according to the basic voltage vector, the virtual middle vector and the switching sequence, so as to realize modulation of the NPC-type three-level inverter;

7. The modulation device of an inverter according to claim 6, wherein the modulation unit synthesizes a reference voltage vector based on the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC three-level inverter, a new virtual middle vector is synthesized again by a preset basic voltage vector, a reference voltage vector is synthesized equivalently by the virtual middle vector and the basic voltage vector, and a switching sequence is redetermined, wherein the method comprises the following steps:

8. The modulation device of an inverter according to claim 7, wherein the modulation means for screening basic voltage vectors of the NPC-type three-level inverter to synthesize a virtual middle vector comprises:

9. The modulation apparatus of an inverter according to claim 7, wherein the modulation unit redetermines a partition of a small area in a sector in the space vector diagram, redesigns a switching sequence, comprising:

10. The modulation apparatus of an inverter according to any one of claims 6 to 9, wherein the modulation unit determines a duty ratio of each switching device in the NPC-type three-level inverter, comprising:

wherein V is _ref For reference voltage vector, T _s In units of sampling time, V _x 、V _y 、V _z Respectively are engaged inBasic voltage vector, T, which is the reference voltage vector ₀ 、T ₁ 、T ₂ And the duty ratios corresponding to the basic voltage vector and the virtual middle vector are respectively, and corresponding PWM pulse waveforms can be obtained through the duty ratios, so that the control of the inverter is realized.

11. An inverter, comprising: the modulation device of an inverter according to any one of claims 6 to 10.

12. A storage medium comprising a stored program, wherein the program, when run, controls a device in which the storage medium is located to perform the modulation method of the inverter of any one of claims 1 to 5.

13. A processor, characterized in that the processor is adapted to run a program, wherein the program when run performs the modulation method of the inverter of any of claims 1 to 5.