CN113783452A

CN113783452A - Modulation method and device of inverter, storage medium and processor

Info

Publication number: CN113783452A
Application number: CN202111107462.XA
Authority: CN
Inventors: 魏兵戌; 朱永强; 殷童欢; 宋泽琳; 郭立星; 李亚巍
Original assignee: Gree Electric Appliances Inc of Zhuhai
Current assignee: Gree Electric Appliances Inc of Zhuhai
Priority date: 2021-09-22
Filing date: 2021-09-22
Publication date: 2021-12-10
Anticipated expiration: 2041-09-22
Also published as: CN113783452B

Abstract

The invention discloses a modulation method and a modulation device of an inverter, the inverter, a storage medium and a processor, wherein the method comprises the following steps: collecting direct-current bus voltage and three-phase voltage of the NPC type three-level inverter; under the condition of a set low carrier ratio, synthesizing a reference voltage vector according to the direct current bus voltage and the three-phase voltage, and re-determining a switching sequence; and determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter. According to the scheme, the virtual vector (such as a virtual medium vector) is used for participating in synthesizing the reference voltage vector, so that the error in synthesizing the reference voltage vector is lower, and the quality of the output waveform of the inverter is improved.

Description

Modulation method and device of inverter, storage medium and processor

Technical Field

The invention belongs to the technical field of inverters, and particularly relates to a modulation method and device of an inverter, the inverter, a storage medium and a processor, in particular to a modulation method and device of an NPC type three-level inverter, the storage medium and the processor.

Background

Inverters, such as NPC type (i.e., midpoint clamping type) three-level inverters, are widely used in medium-high voltage, high power devices, but because of their high power levels, their switching frequency is usually not more than 1kHz in consideration of the problem of switching loss. Under the condition of low switching frequency and low carrier ratio, the current waveform output by the inverter can be seriously distorted, and influences and even damages the electric equipment on the electric network side and the electric equipment. In consideration of the problems that under the condition of low switching frequency and low carrier ratio, current waveforms output by an inverter are severely distorted, and influence and even damage are caused to electric equipment and a power grid side, an inverter synchronous modulation method is adopted in some schemes, but due to the fact that the switching frequency is low and the carrier ratio is low, the output waveforms of the inverter are severely distorted.

The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.

Disclosure of Invention

The invention aims to provide a modulation method, a modulation device, an inverter, a storage medium and a processor of an inverter, which are used for solving the problem that the output waveform of the inverter is seriously distorted due to lower switching frequency and lower carrier ratio in the synchronous modulation method of the inverter, and achieving the effects of using a virtual vector (such as a virtual medium vector) to participate in synthesizing a reference voltage vector, reducing the error in synthesizing the reference voltage vector and being beneficial to improving the quality of the output waveform of the inverter.

The invention provides a modulation method of an inverter, wherein the inverter comprises an NPC type three-level inverter; the modulation method of the NPC type three-level inverter comprises the following steps: collecting direct-current bus voltage and three-phase voltage of the NPC type three-level inverter; synthesizing a reference voltage vector according to the direct current bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again; and determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter.

In some embodiments, a reference voltage vector is synthesized based on the dc bus voltage and the three-phase voltages; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again from a preset basic voltage vector, a reference voltage vector is equivalently synthesized from the virtual medium vector and the basic voltage vector, and a switching sequence is re-determined, including: synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system; synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal; determining a sector and a corresponding small area of the reference voltage vector in a space vector diagram of the NPC type three-level inverter according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector and the corresponding small area; the small region is a sub-region inside the sector; screening basic voltage vectors of the NPC type three-level inverter according to the sector and the corresponding small area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area, and synthesizing a virtual medium vector; and re-determining the partition of the sub-area in the sector in the space vector diagram according to the sector and the corresponding sub-area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding sub-area, and re-designing the switching sequence.

In some embodiments, screening the base voltage vectors of the NPC-type three-level inverter to synthesize a virtual medium vector comprises: according to the calculation mode of the common-mode voltage amplitude, basic voltage vectors in space vectors of the NPC type three-level inverter are screened, partial zero vectors and small vectors are removed, the basic voltage vectors with the common-mode voltage amplitude meeting a set value are obtained, and the basic voltage vectors are recorded as a basic voltage vector alternative set; synthesizing a virtual medium vector by the participation of adjacent small vectors according to the alternative set of the basic voltage vectors and the following formula:

wherein, V₀Is a zero vector, V₇、V₈Small vector, V₁₃Is a medium vector, and V₁₃' is a virtual medium vector, V₁、V₂For large vectors, P, O and the N state are denoted as 2, 1, and 0, respectively.

In some embodiments, re-determining the partition of the intra-sector cell in the spatial vector map, and re-designing the switching sequence, comprises: the distribution areas of the virtual medium vector and the rest basic voltage vectors are divided again; according to the distribution region, the space vector diagram is divided again to obtain the partition of the small region in the sector in the re-determined space vector diagram; and when the reference voltage vectors are distributed in corresponding areas in the subareas, determining the switching sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set area and the set switching sequence to obtain the redesigned switching sequence.

In some embodiments, determining the duty cycle of each switching device in the NPC-type three-level inverter comprises: determining the duty ratio of each switching device in the NPC type three-level inverter by using a volt-second product balance equation; the volt-second product equilibrium equation is:

wherein, V_refAs a vector of reference voltages, T_sIs a unit of sampling time, V_x、V_y、V_zAre respectively involved in synthesizing referencesBasic voltage vector of the voltage vector, T₀、T₁、T₂And respectively obtaining corresponding PWM pulse waveforms from the duty ratios corresponding to the basic voltage vector and the virtual medium vector, so as to realize the control of the inverter.

In accordance with the above method, another aspect of the present invention provides a modulation apparatus of an inverter, the inverter including an NPC type three-level inverter; the modulation device of the NPC type three-level inverter comprises: the acquisition unit is configured to acquire the direct-current bus voltage and the three-phase voltage of the NPC type three-level inverter; the modulation unit is configured to synthesize a reference voltage vector according to the direct-current bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again; the modulation unit is further configured to determine duty ratios of the switching devices in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence, so as to realize modulation of the NPC type three-level inverter.

In some embodiments, the modulation unit synthesizes a reference voltage vector according to the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again from a preset basic voltage vector, a reference voltage vector is equivalently synthesized from the virtual medium vector and the basic voltage vector, and a switching sequence is re-determined, including: synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system; synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal; determining a sector and a corresponding small area of the reference voltage vector in a space vector diagram of the NPC type three-level inverter according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector and the corresponding small area; the small region is a sub-region inside the sector; screening basic voltage vectors of the NPC type three-level inverter according to the sector and the corresponding small area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area, and synthesizing a virtual medium vector; and re-determining the partition of the sub-area in the sector in the space vector diagram according to the sector and the corresponding sub-area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding sub-area, and re-designing the switching sequence.

In some embodiments, the modulation unit screens basic voltage vectors of the NPC type three-level inverter and synthesizes a virtual medium vector, including: according to the calculation mode of the common-mode voltage amplitude, basic voltage vectors in space vectors of the NPC type three-level inverter are screened, partial zero vectors and small vectors are removed, the basic voltage vectors with the common-mode voltage amplitude meeting a set value are obtained, and the basic voltage vectors are recorded as a basic voltage vector alternative set; synthesizing a virtual medium vector by the participation of adjacent small vectors according to the alternative set of the basic voltage vectors and the following formula:

In some embodiments, the modulation unit, re-determining the partition of the small region within the sector in the spatial vector map, and re-designing the switching sequence, includes: the distribution areas of the virtual medium vector and the rest basic voltage vectors are divided again; according to the distribution region, the space vector diagram is divided again to obtain the partition of the small region in the sector in the re-determined space vector diagram; and when the reference voltage vectors are distributed in corresponding areas in the subareas, determining the switching sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set area and the set switching sequence to obtain the redesigned switching sequence.

In some embodiments, the modulation unit, determining a duty cycle of each switching device in the NPC type three-level inverter, includes: determining the duty ratio of each switching device in the NPC type three-level inverter by using a volt-second product balance equation; the volt-second product equilibrium equation is:

wherein, V_refAs a vector of reference voltages, T_sIs a unit of sampling time, V_x、V_y、V_zRespectively, basic voltage vectors, T, participating in the synthesis of the reference voltage vector₀、T₁、T₂And respectively obtaining corresponding PWM pulse waveforms from the duty ratios corresponding to the basic voltage vector and the virtual medium vector, so as to realize the control of the inverter.

In accordance with the above apparatus, a further aspect of the present invention provides an inverter, comprising: the modulation device of the inverter described above.

In accordance with the above method, a further aspect of the present invention provides a storage medium, which includes a stored program, wherein when the program runs, a device in which the storage medium is located is controlled to execute the above method for modulating the inverter.

In accordance with the above method, a further aspect of the present invention provides a processor for executing a program, wherein the program executes the above method for modulating the inverter.

Therefore, the scheme of the invention further divides the space vector diagram by synthesizing the virtual medium vector under the condition of low carrier ratio, uses the virtual vector (such as the virtual medium vector) to participate in synthesizing the reference voltage vector by subdividing the sector, and adds a virtual vector (such as the virtual medium vector) between the adjacent small vectors; therefore, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector, so that the error in synthesizing the reference voltage vector can be lower, and the quality of the output waveform of the inverter can be improved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.

Drawings

Fig. 1 is a schematic flow chart of an embodiment of a modulation method of an inverter according to the present invention;

FIG. 2 is a schematic flow chart illustrating one embodiment of a method of the present invention for synthesizing a reference voltage vector based on the DC bus voltage and the three-phase voltages and re-determining a switching sequence;

FIG. 3 is a schematic flow chart of one embodiment of the method for screening basic voltage vectors of the NPC type three-level inverter and synthesizing a virtual medium vector;

FIG. 4 is a schematic flow chart of one embodiment of the method of the present invention for re-determining the partitions of the sub-regions within the sectors of the space vector map and re-designing the switching sequence;

FIG. 5 is a schematic diagram of a NPC type three-level inverter topology;

FIG. 6 is a schematic view of the entire space vector under the α β coordinate system;

FIG. 7 is a schematic view of a virtual medium vector, specifically Z₁Virtual vector composition diagram in sector;

FIG. 8 is a schematic flow diagram of an embodiment of a NPC type three-level inverter modulation method;

fig. 9 is a schematic structural diagram of an embodiment of a modulation device of an inverter according to the present invention.

The reference numbers in the embodiments of the present invention are as follows, in combination with the accompanying drawings:

102-an acquisition unit; 104-modulation unit.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the NPC type three-level inverter synchronous modulation method adopted by some schemes, the output phase voltage of the inverter meets the requirements of synchronism, three-phase symmetry and half-wave symmetry, and subharmonics, multiples of three and even subharmonics existing in the waveform are eliminated. With the development of the related technology, the requirement for the waveform quality under the condition of low carrier ratio is higher and higher in the industry, so that the improvement of the inverter output waveform quality under the condition of low carrier ratio has important significance.

According to an embodiment of the present invention, a modulation method of an inverter is provided, as shown in fig. 1, which is a schematic flow chart of an embodiment of the method of the present invention. The inverter comprises an NPC type three-level inverter. The modulation method of the NPC type three-level inverter comprises the following steps: step S110 to step S130.

At step S110, the dc bus voltage and the three-phase voltage of the NPC type three-level inverter are collected. DC bus voltage, e.g. DC bus voltage V, of said NPC type three-level inverter_dc. Three-phase voltage of said NPC type three-level inverter, e.g. three-phase voltage V_a、V_bAnd V_c。

At step S120, synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again.

Specifically, a reference voltage vector is synthesized by a bus voltage and a three-phase voltage, and the reference voltage vector refers to a given reference value; and selecting a basic vector and a virtual medium vector in the space vector diagram to equivalently synthesize a reference vector. Therefore, it should be noted that the reference voltage vector cannot directly control the switching operation of the inverter, and it is necessary to substitute and synthesize the basic voltage vector and the virtual medium vector in an equivalent manner, where the basic voltage vector and the virtual medium vector are the switching combination of the inverter and are used to control the switching of the inverter, so as to achieve the purpose of controlling the output waveform of the inverter system, and this process is called modulation. The virtual medium vector is equivalently synthesized by a basic voltage vector, is a fixed switch mode combination as the basic voltage vector, and is not synthesized by bus voltage and three-phase voltage.

In some embodiments, the step S120 of synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltages is further described with reference to a flowchart of an example of synthesizing a reference voltage vector according to the dc bus voltage and the three-phase voltages and re-determining a switching sequence in the method of the present invention shown in fig. 2; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and the specific process of re-determining a switching sequence comprises the following steps: step S210 to step S250.

And step S210, synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal in a static coordinate system. The first voltage signal and the second voltage signal refer to the sampled bus voltage and the three-phase voltage. A first voltage signal, e.g. signal V_αA second voltage signal such as signal V_β。

Step S220, synthesizing a reference voltage vector, such as a reference voltage vector V, according to the first voltage signal and the second voltage signal_ref。

Step S230, determining the reference voltage vector in the NPC type three-level according to the amplitude and the phase of the reference voltage vectorThe sector where the reference voltage vector is located and the corresponding small area are determined, and the angle and the modulation degree of the reference voltage vector in the sector where the reference voltage vector is located and the corresponding small area are determined; the small region is a sub-region within the sector. Angles such as angle theta_nThe modulation degree is, for example, modulation degree m.

Fig. 8 is a flowchart illustrating an embodiment of a modulation method of an NPC type three-level inverter. As shown in fig. 8, an embodiment of the present invention provides an NPC three-level inverter modulation method, including: step 1, sampling three-phase voltage V_a、V_bAnd V_cSynthesizing a signal V in a stationary coordinate system (i.e., an alpha beta coordinate system)_α、V_βAnd further synthesizing a reference voltage vector V_refAccording to the judgment reference voltage vector V_refDetermining the sector where the amplitude and the phase are located and the corresponding small area, and judging the modulation degree range of the amplitude and the phase according to a calculation mode of a modulation degree m, wherein the expression of m is as follows:

wherein the reference vector V is judged_refThe amplitude and phase of (2) need to be derived from the V of the synthetic reference vector_αAnd V_βPerforming reference vector synthesis in which the amplitude value

The phase, i.e. angle, is calculated by:

after the amplitude and the angle of the reference vector are known, the sector and the small area in which the reference voltage vector is specifically positioned can be judged according to a partitioning method in the space vector diagram.

N and N refer to sectors and small regions in the space vector diagram, respectively, i.e. N refers to sector Z₁～Z₆And n is a small region from the first to the fourth. N and N are variables, indicated in italics. Opening in switching sequence P, O, N in NPC type three-level inverter systemThe off state N, the load neutral point N and the sector number N exist at the same time and are not influenced mutually, and only the meaning of the state N, the load neutral point N, the large sector number N and the like are required to be described before the symbol is used.

Step S240, according to the sector and the corresponding small area where the reference voltage vector is located in the space vector diagram, and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area where the reference voltage vector is located, screening the basic voltage vector of the NPC type three-level inverter, and synthesizing a virtual medium vector. And the number of the first and second groups,

in some embodiments, in combination with an embodiment of a schematic flow chart of screening the basic voltage vectors of the NPC three-level inverter and synthesizing the virtual medium vector in the method of the present invention shown in fig. 3, a specific process of screening the basic voltage vectors of the NPC three-level inverter and synthesizing the virtual medium vector in step S240 is further described, which includes: step S310 and step S320.

And S310, screening basic voltage vectors in space vectors of the NPC type three-level inverter according to a calculation mode of the common-mode voltage amplitude, removing partial zero vectors and small vectors to obtain the basic voltage vectors with the common-mode voltage amplitude meeting a set value, and recording the basic voltage vectors as a basic voltage vector alternative set.

As shown in fig. 8, the scheme of the present invention provides an NPC type three-level inverter modulation method, further including:

step 2, screening the basic voltage vectors according to a common-mode voltage amplitude calculation formula, abandoning part of zero vectors and small vectors with overhigh amplitudes, and setting a switching algebra K value as a standard for evaluating the basic voltage vectors to generate the common-mode voltage amplitude, wherein the expression of the switching algebra K is shown as the following formula:

K＝|S₁+S₂+S₃| (2)。

in the above formula, S₁、S₂And S₃Respectively in three-phase switch state, P,The O and N states are represented as 2, 1 and 0, respectively. And substituting each alternative vector set and the basic voltage vector into a K value expression to perform rolling optimization calculation, wherein the higher the K value is, the higher the common mode voltage amplitude is, and vice versa, screening out the basic voltage vector with the lowest common mode voltage amplitude, and subsequently, synthesizing the optimal switching sequence.

The common mode voltage expression is:

in the formula v_AO、v_BO、v_CORepresenting A, B, C three-phase voltages, respectively.

Considering the influence of the common-mode voltage, the scheme of the invention also performs the suppression of the common-mode voltage amplitude when screening the basic voltage vectors, and takes the formula in the step 2 as the screening standard, and the screened basic voltage vectors are the lowest common-mode voltage amplitude in the same type. Therefore, the amplitude of the common-mode voltage at the output side of the inverter can be effectively inhibited.

Step S320, synthesizing a virtual medium vector by the participation of adjacent small vectors according to the alternative set of basic voltage vectors and the following formula:

step 3, synthesizing a virtual medium vector by the adjacent small vectors according to the alternative selection set of the basic voltage vectors screened in the step 2, and combining the conditions of the rest basic voltage vectors by using Z shown in figure 7₁For example, the calculation relationship is as follows:

in connection with the remaining basic voltage vector cases, it is meant that only Z is illustrated here₁The situation in the sector and the situation in the remaining sectors are similar to this and will not be explained much, so that the situation in combination with the remaining basic voltage vectors is considered here, and "remaining" here refers to the virtual medium vector and other basic voltage vectors after being subdivided.

The problem that the common mode voltage amplitude is too high in the NPC type three-level inverter synchronous modulation method of the related scheme is considered. In the scheme of the invention, aiming at the problem that the common mode voltage amplitude in the related scheme synchronous modulation method is higher, when the virtual medium vector is synthesized, the basic voltage vector which generates the common mode voltage with higher amplitude is abandoned, so that the common mode voltage of the system is reduced. Therefore, aiming at the problem that the common mode voltage amplitude is higher in the modulation method of the relevant scheme, a sequence synthesis method initiated by a zero vector is adopted under a low modulation degree, and when a virtual medium vector and a reference voltage vector are synthesized, a basic voltage vector which generates a high common mode voltage amplitude is abandoned, so that the common mode voltage amplitude of the system is reduced.

Step S250, re-determining the partition of the small area in the sector in the space vector diagram according to the sector and the corresponding small area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area in the space vector diagram, and re-designing a switch sequence. I.e. the repartitioning of small areas within a sector, instead of the partitioning of large sectors, see the example shown in fig. 7.

In the example shown in fig. 8, first, the dc bus voltage V is collected_dcAnd three phase voltage V_a、V_bAnd V_cFrom signal V_α、V_βSynthetic reference voltage vector V_refAnd makes sector judgment and angle theta_nAnd a modulation m, etc. And secondly, after the signals are obtained, virtual medium vector synthesis, re-partition and switch sequence design are carried out. Finally, according to the switching sequence, from volt to voltAnd the second balance equation calculates the duty ratio to obtain PWM pulse which acts on the inverter to realize the control of the inverter.

In some embodiments, an embodiment of a flowchart illustrating the step S250 of re-determining the partitions of the small regions in the sectors in the spatial vector diagram and re-designing the switch sequence in conjunction with the method of the present invention shown in fig. 4 further includes: step S410 to step S430.

Step S410, based on the sector and the corresponding small region of the space vector diagram, and the angle and modulation degree of the reference voltage vector in the sector and the corresponding small region, the distribution region of the virtual middle vector and the remaining basic voltage vectors is subdivided.

Step S420, re-partition the space vector diagram according to the distribution region to obtain re-determined partitions of the small regions in the sectors in the space vector diagram, that is, re-partition of the small regions of the sectors in the space vector diagram.

Step S430, when the reference voltage vectors are distributed in the corresponding areas in the subareas, determining the switching sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set area and the set switching sequence, and obtaining the redesigned switching sequence.

step 4, according to the distribution condition of the newly divided virtual middle vector and the rest basic voltage vectors, the space vector diagram is newly divided, when the reference voltage vectors are distributed in the corresponding regions, equivalent synthesis is carried out by the corresponding nearest three vectors, taking the number N of the reference voltage vectors in the unit sector as 4 as an example, when the reference voltage vectors are positioned in the small regions I and II in the graph 7, the zero vector is adopted for the first transmission, and the vector needing to be used is V₀、V₇、V₈、V₁₃', the switching sequence at this time is the following table 1:

V_ref	Z₁	Z₂	Z₃
				V_ref1	OOO-POO-POO-OON	OOO-OON-OON-OPO	OOO-OPO-OPO-NOO
V_ref2	OON-POO-POO-OOO	OPO-OON-OON-OOO	NOO-OPO-OPO-OOO
				V_ref3	OOO-OON-OON-POO	OOO-OPO-OPO-OON	OOO-NOO-NOO-OPO
V_ref4	POO-OON-OON-OOO	OON-OPO-OPO-OOO	OPO-NOO-NOO-OOO
					Z₄	Z₅	Z₆
V_ref1	OOO-NOO-NOO-OOP	OOO-OOP-OOP-ONO	OOO-ONO-ONO-POO
				V_ref2	OOP-NOO-NOO-OOO	ONO-OOP-OOP-OOO	POO-ONO-ONO-OOO
V_ref3	OOO-OOP-OOP-NOO	OOO-ONO-ONO-OOP	OOO-POO-POO-ONO
				V_ref4	NOO-OOP-OOP-OOO	OOP-ONO-ONO-OOO	ONO-POO-POO-OOO

when the reference voltage vectors are located in the small areas (c) and (c) in fig. 7, the adopted medium vector is transmitted first, and V is used₇、V₈、V₁₃' and V₁₃The switching sequence is now table 2 below:

V_ref	Z₁	Z₂	Z₃
				V_ref1	PON-POO-OON-OON	OPN-OON-OPO-OPO	NPO-OPO-NOO-NOO
V_ref2	OON-OON-POO-PON	OPO-OPO-OON-OPN	NOO-NOO-OPO-NPO
				V_ref3	PON-POO-POO-OON	OPN-OPO-OON-OON	NPO-NOO-OPO-OPO
V_ref4	OON-POO-POO-PON	OON-OON-OPO-OPN	OPO-OPO-NOO-NPO
					Z₄	Z₅	Z₆
V_ref1	NOP-NOO-OOP-OOP	ONP-OOP-ONO-ONO	PNO-ONO-POO-POO
				V_ref2	OOP-OOP-NOO-NOP	ONO-ONO-OOP-ONP	POO-POO-ONO-PNO
V_ref3	NOP-OOP-NOO-NOO	ONP-ONO-OOP-OOP	PNO-POO-ONO-ONO
				V_ref4	NOO-NOO-OOP-NOP	OOP-OOP-ONO-ONP	ONO-ONO-POO-PNO

the two tables (table 1 and table 2) in step 4 are the results of the switching sequence under the low modulation degree, the switching sequence is applied to the inverter, the quality of the obtained inverter output waveform is optimized, and the amplitude of the common mode voltage is the lowest.

At step S130, determining duty ratios of switching devices in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence to implement modulation of the NPC type three-level inverter.

The scheme of the invention provides a modulation method of an NPC type three-level inverter, and provides a thought of applying virtual vectors (such as virtual medium vectors) to modulation in synchronous modulation, and a virtual vector (such as a virtual medium vector) is added between adjacent small vectors, so that when a reference voltage vector is synthesized, the virtual vector (such as the virtual medium vector) can be selected to be synthesized, the accuracy in synthesis is increased, and the waveform quality can be improved. In the scheme of the invention, a synchronous modulation method applied to the condition of low carrier ratio is also designed, the switching sequence of the synchronous modulation method has O clamping characteristic, and a certain phase is clamped in an O state and does not act in a period of time in a clamping mode, so that the switching action of the inverter is reduced, and the switching loss is further reduced.

The synchronous modulation method applied to the low carrier ratio condition refers to a synchronous modulation method used under the low carrier ratio condition, wherein the concept of the low carrier ratio is given in the following, and the synchronous modulation of the three-level inverter refers to that under the condition of low switching frequency and low carrier ratio, the inverter switching sequence is designed to enable the output phase voltage to meet the synchronism, three-phase symmetry and half-wave symmetry so as to reduce the distortion degree of the output waveform of the inverter. In the aspect of the present invention, since the switching sequence is determined, it can be considered that the inverter is modulated by a predetermined duty ratio.

The O-clamp characteristic means that the switching sequence state of a certain phase does not act in the O-clamp state within a certain period of time, i.e. S_k1And S_k4Off, S_k2And S_k3And the switching tube does not act when the inverter is switched on, so that the switching loss of the inverter can be reduced. O-state, i.e., O-clamped state.

Fig. 5 is a schematic diagram of a NPC type three-level inverter topology. FIG. 5 is a diagram of a NPC type three-level inverter topology, V being shown in FIG. 5_dcIs a DC bus voltage, C₁、C₂Are respectively DC-side voltage-stabilizing capacitors, wherein the midpoint of the two capacitors is connected to the midpoint of the two freewheeling diodes of each phase, which is the midpoint O, S of the NPC three-level inverter_k1-S_k4The (k ═ a, B, C) are a-phase, B-phase, C-phase power switching tubes, the load A, B, C is a three-phase resistive-inductive load, and N is a load neutral point. As can be seen from the illustration in fig. 5, according to the different switching (i.e. on and off) combinations of the four power switching tubes of each of the phases a, B and C,p, O, N three level states can be combined, which respectively correspond to V of the DC bus voltage_dc/2、0、-V_dc/2 inverter generated i_A、i_B、i_CThree-phase current is used for realizing the driving of the load.

Wherein, O, N in P, O, N is different from the meanings of the midpoint O and the neutral point N, P, O, N states in the switching sequence refer to switching states, which are determined by different switching combinations of the switching devices, and belongs to a mathematical expression method, the midpoint O and the load neutral point N of the inverter refer to an actual point on the inverter or the load, which is a recognized expression method in the field of three-level inverters, and the expression is only required to be accurate, and no distinction is required.

Fig. 6 is a schematic diagram of the entire space vector in the α β coordinate system. In fig. 6, the horizontal axis α is horizontal, the β axis is vertical, the α axis is reference, the space vector diagram rotates counterclockwise, each pi/3 angle is a sector, the whole space vector diagram is divided into 6 sectors, which are respectively marked as Z₁～Z₆Each sector is divided into (r), (r) and (r) four small areas as shown in fig. 6.

Fig. 7 is a schematic diagram of a virtual medium vector. In the example shown in FIG. 7, Z is₁Taking a sector as an example, the space vector diagram is re-partitioned, and the difference from the space vector diagram in the figure 6 is that a virtual medium vector is added, the phase of the virtual medium vector is the same as that of the medium vector, the amplitude of the virtual medium vector is half of that of the medium vector, and the virtual medium vector V is₁₃' composed of two small vectors V₇、V₈Taking part in the synthesis, the new partition is shown in FIG. 7, whose basic voltage vector comprises a zero vector V₀Small vector V₇、V₈Middle vector V₁₃And a virtual medium vector V₁₃' sum large vector V₁、V₂。

The problem of serious distortion of the inverter output waveform due to low switching frequency and low carrier ratio in the NPC type three-level inverter synchronous modulation method of the related scheme is considered. In the scheme of the invention, a synchronous virtual vector (such as a virtual medium vector) modulation method is provided, under the condition of low carrier ratio, a space vector diagram is further divided by synthesizing the virtual medium vector, and a virtual vector (such as the virtual medium vector) is used for participating in synthesizing a reference voltage vector by subdividing sectors, so that the error in synthesizing the reference voltage vector is reduced, and the quality of the output waveform of an inverter is further improved.

The carrier ratio, i.e. the ratio of the carrier to the modulated wave, is low, i.e. the ratio of the carrier to the modulated wave is low, when the modulated wave frequency is fixed, the carrier frequency is low, and the carrier frequency here is the inverter switching frequency, which is also the low carrier ratio under the low switching frequency condition indicated in the present invention.

Therefore, aiming at the problem of inverter output waveform distortion caused by low switching frequency, a virtual vector (such as a virtual medium vector) modulation method is provided, a virtual medium vector is synthesized by small vectors, a reference voltage vector is further synthesized, and a space vector diagram is partitioned again by adding the virtual vector (such as the virtual medium vector), so that the error when the reference voltage vector is synthesized is lower, and the method has positive significance for improving the waveform quality.

In some embodiments, the determining the duty ratio of each switching device in the NPC type three-level inverter in step S130 includes: and determining the duty ratio of each switching device in the NPC type three-level inverter by using a volt-second product balance equation. The volt-second product equilibrium equation is:

And 5, after obtaining a corresponding switching sequence, performing a volt-second balance equation:

the duty ratio of each switching device can be obtained, wherein V is in the formula_refAs a vector of reference voltages, T_sIs a unit of sampling time, V_x、V_y、V_zThe basic voltage vectors, respectively, which are involved in the synthesis of the reference voltage vector, also include the above-mentioned virtual medium vector, T₀、T₁、T₂The corresponding duty ratios are respectively, and the corresponding PWM pulse waveforms can be obtained according to the duty ratios, so that the control of the inverter is realized.

The above formula and parameters are abstract formulas, that is, formulas with general meaning, and the volt-second equilibrium equation presented here is intended to illustrate that the duty ratio of the basic voltage vector and the virtual vector can be calculated according to the equation. According to the different sectors of the reference vector, the corresponding basic voltage vector and virtual vector combination are different, so that it is not necessary to implement visualization, therefore V_x、V_y、V_zWhich may be expressed as a combination of synthetic reference vectors, but which represent the base voltage vectors and which represent the virtual vectors, need not be described in great detail, which is also a common expression method in many papers and patents.

In the solution of the invention, a virtual vector (e.g. a virtual medium vector) is composed between adjacent small vectors, in Z₁Sector as an example, V in step 4₁₃' it can be proved by geometric drawing method that the synthetic method can determine the amplitude of the virtual vector (such as virtual middle vector) on the boundary line of the small boundary region, i.e. the common intersection point of the small regions (r), (c) and (c) in fig. 7. Therefore, a virtual vector (such as a virtual medium vector) is additionally arranged in the middle of the small vector, the alternative basic voltage vector set is widened, and according to the concept of vector errors in the latest three-vector synthesis method, when the basic voltage vector is synthesized into a reference voltage vector, the distance is shortened, the vector error is reduced, the synthesis precision is increased, and the waveform quality can be improved.

By adopting the technical scheme of the embodiment, the space vector diagram is further divided by synthesizing the virtual medium vector under the condition of low carrier ratio, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, a virtual vector (such as the virtual medium vector) is added between the adjacent small vectors, and the common-mode voltage amplitude is also suppressed when the basic voltage vector is screened. Therefore, by using the virtual vector (such as a virtual medium vector) to participate in synthesizing the reference voltage vector, the error in synthesizing the reference voltage vector can be lower, the quality of the output waveform of the inverter can be improved, and the amplitude of the common-mode voltage at the output side of the inverter can be effectively inhibited.

According to an embodiment of the present invention, there is also provided a modulation apparatus of an inverter corresponding to a modulation method of the inverter. Referring to fig. 9, a schematic diagram of an embodiment of the apparatus of the present invention is shown. The inverter comprises an NPC type three-level inverter. The modulation device of the NPC type three-level inverter comprises: an acquisition unit 102 and a modulation unit 104.

The acquisition unit 102 is configured to acquire a direct-current bus voltage and a three-phase voltage of the NPC type three-level inverter. DC bus voltage, e.g. DC bus voltage V, of said NPC type three-level inverter_dc. Three-phase voltage of said NPC type three-level inverter, e.g. three-phase voltage V_a、V_bAnd V_c. The detailed function and processing of the acquisition unit 102 are shown in step S110.

A modulation unit 104 configured to synthesize a reference voltage vector according to the dc bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again. The specific function and processing of the modulation unit 104 are shown in step S120.

In some embodiments, the modulation unit 104 synthesizes a reference voltage vector according to the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again from a preset basic voltage vector, a reference voltage vector is equivalently synthesized from the virtual medium vector and the basic voltage vector, and a switching sequence is re-determined, including:

the modulation unit 104 is specifically further configured to combine the dc bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal in a stationary coordinate system. A first voltage signal, e.g. signal V_αA second voltage signal such as signal V_β. The specific function and processing of the modulation unit 104 are also referred to in step S210.

The modulation unit 104 is specifically further configured to synthesize a reference voltage vector, such as a reference voltage vector V, from the first voltage signal and the second voltage signal_ref. The detailed function and processing of the modulation unit 104 are also shown in step S220.

The modulation unit 104 is further specifically configured to determine, according to the amplitude and the phase of the reference voltage vector, a sector and a corresponding small area of the reference voltage vector in a space vector diagram of the NPC three-level inverter, and determine an angle and a modulation degree of the reference voltage vector in the sector and the corresponding small area; the small region is a sub-region within the sector. Angles such as angle theta_nThe modulation degree is, for example, modulation degree m. The specific function and processing of the modulation unit 104 are also referred to in step S230.

Fig. 8 is a flow chart of an embodiment of an NPC type three-level inverter modulation apparatus. As shown in fig. 8, an embodiment of the present invention provides an NPC type three-level inverter modulation apparatus, including: step 1, sampling three-phase voltage V_a、V_bAnd V_cSynthesizing a signal V in a stationary coordinate system (i.e., an alpha beta coordinate system)_α、V_βAnd further synthesizing a reference voltage vector V_refAccording to the judgment reference voltage vector V_refDetermining the sector where the amplitude and the phase are located and the corresponding small area, and judging the modulation degree range of the amplitude and the phase according to a calculation mode of a modulation degree m, wherein the expression of m is as follows:

the modulation unit 104 is further specifically configured to screen basic voltage vectors of the NPC three-level inverter according to the sector and the corresponding small area in the space vector diagram, and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area, and synthesize a virtual medium vector. The specific function and processing of the modulation unit 104 are also referred to in step S240. And the number of the first and second groups,

in some embodiments, the modulation unit 104 screens basic voltage vectors of the NPC three-level inverter to synthesize a virtual medium vector, and includes:

the modulation unit 104 is specifically configured to screen a basic voltage vector in a space vector of the NPC three-level inverter according to a calculation manner of the common-mode voltage amplitude, remove a part of zero vectors and small vectors, obtain a basic voltage vector of which the common-mode voltage amplitude meets a set value, and record the basic voltage vector as a basic voltage vector alternative set. The specific function and processing of the modulation unit 104 are also referred to in step S310.

As shown in fig. 8, an NPC three-level inverter modulation apparatus according to an aspect of the present invention further includes:

K＝|S₁+S₂+S₃| (2)。

in the above formula, S₁、S₂And S₃Three-phase switch states, P, O and N states are represented as 2, 1 and 0, respectively. And substituting each alternative vector set and the basic voltage vector into a K value expression to perform rolling optimization calculation, wherein the higher the K value is, the higher the common mode voltage amplitude is, and vice versa, screening out the basic voltage vector with the lowest common mode voltage amplitude, and subsequently, synthesizing the optimal switching sequence.

The modulation unit 104 is specifically further configured to synthesize a virtual medium vector by the participation of adjacent small vectors according to the alternative set of basic voltage vectors according to the following formula:

wherein, V₀Is a zero vector, V₇、V₈Small vector, V₁₃Is a medium vector, and V₁₃' is a virtual medium vector, V₁、V₂For large vectors, P, O and the N state are denoted as 2, 1, and 0, respectively. The detailed function and processing of the modulation unit 104 are also referred to in step S320.

the problem that the common mode voltage amplitude is too high in the NPC type three-level inverter synchronous modulation device of the related scheme is considered. In the scheme of the invention, aiming at the problem that the amplitude of the common-mode voltage in the synchronous modulation device of the related scheme is higher, when the virtual medium vector is synthesized, the basic voltage vector which generates the high amplitude of the common-mode voltage is abandoned, so that the common-mode voltage of the system is reduced. Therefore, aiming at the problem that the common-mode voltage amplitude of the modulation device of the related scheme is higher, the sequence synthesis device which is initiated by the zero vector is adopted under a low modulation degree, and when the virtual medium vector and the reference voltage vector are synthesized, the basic voltage vector which generates the high common-mode voltage amplitude is abandoned, so that the common-mode voltage amplitude of the system is reduced.

The modulation unit 104 is further specifically configured to re-determine the partition of the intra-sector sub-area in the spatial vector diagram according to the sector and the corresponding sub-area in the spatial vector diagram, and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding sub-area, and re-design the switching sequence. The specific function and processing of the modulation unit 104 are also referred to in step S250.

In the example shown in fig. 8, first, the dc bus voltage V is collected_dcAnd three phase voltage V_a、V_bAnd V_cFrom signal V_α、V_βSynthetic reference voltage vector V_refAnd makes sector judgment and angle theta_nAnd a modulation m, etc. And secondly, after the signals are obtained, virtual medium vector synthesis, re-partition and switch sequence design are carried out. And finally, according to the condition of the switching sequence, carrying out duty ratio calculation by a volt-second balance equation to obtain PWM pulses acting on the inverter so as to realize the control of the inverter.

In some embodiments, the modulation unit 104, re-determining the partition of the small region in the sector in the spatial vector map, and re-designing the switching sequence, includes:

the modulation unit 104 is further specifically configured to subdivide the distribution areas of the virtual middle vector and the remaining basic voltage vectors according to the sector and the corresponding small area in the spatial vector diagram, and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area. The specific function and processing of the modulation unit 104 are also referred to in step S410.

The modulation unit 104 is further specifically configured to re-divide the spatial vector map according to the distribution region, so as to obtain a re-determined partition of a small region in a sector in the spatial vector map. The specific function and processing of the modulation unit 104 are also referred to in step S420.

The modulation unit 104 is specifically further configured to determine a switching sequence of a region where the reference voltage vector is located according to a corresponding relationship between a set region and a set switching sequence when the reference voltage vector is distributed in the corresponding region in the partition, so as to obtain the redesigned switching sequence. The specific function and processing of the modulation unit 104 are also referred to in step S430.

The modulation unit 104 is further configured to determine duty ratios of switching devices in the NPC three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence, so as to implement modulation on the NPC three-level inverter. The specific function and processing of the modulation unit 104 are also referred to in step S130.

The scheme of the invention provides an NPC type three-level inverter modulation device, and proposes the idea of applying virtual vector (such as virtual medium vector) modulation in synchronous modulation, and adds a virtual vector (such as virtual medium vector) between adjacent small vectors, so that when synthesizing a reference voltage vector, the virtual vector (such as virtual medium vector) can be selected for synthesis, the accuracy in synthesis is increased, and the waveform quality can be improved. In the scheme of the invention, a synchronous modulation device applied to the condition of low carrier ratio is also designed, the switching sequence of the synchronous modulation device has O clamping characteristic, and a certain phase is clamped in an O state and does not act in a period of time in a clamping mode, so that the switching action of the inverter is reduced, and the switching loss is further reduced.

Fig. 5 is a schematic diagram of a NPC type three-level inverter topology. FIG. 5 is a diagram of a NPC type three-level inverter topology, V being shown in FIG. 5_dcIs a DC bus voltage, C₁、C₂Are respectively DC-side voltage-stabilizing capacitors, wherein the midpoint of the two capacitors is connected to the midpoint of the two freewheeling diodes of each phase, which is the midpoint O, S of the NPC three-level inverter_k1-S_k4The (k ═ a, B, C) are a-phase, B-phase, C-phase power switching tubes, the load A, B, C is a three-phase resistive-inductive load, and N is a load neutral point. As can be seen from fig. 5, according to different switch (i.e., on and off) combinations of the four power switching tubes in each of the phases a, B and C, P, O, N three level states can be combined, corresponding to V of the dc bus voltage respectively_dc/2、0、-V_dc/2 inverter generated i_A、i_B、i_CThree-phase current is used for realizing the driving of the load.

A problem of serious distortion of an inverter output waveform due to a low switching frequency and a low carrier ratio in the NPC type three-level inverter synchronous modulation apparatus of the related art is considered. In the scheme of the invention, a synchronous virtual vector (such as a virtual medium vector) modulation device is provided, under the condition of low carrier ratio, a space vector diagram is further divided by synthesizing the virtual medium vector, and a virtual vector (such as the virtual medium vector) is used for participating in synthesizing a reference voltage vector by subdividing sectors, so that the error in synthesizing the reference voltage vector is reduced, and the quality of the output waveform of an inverter is improved.

In this way, aiming at the problem of inverter output waveform distortion caused by low switching frequency, a virtual vector (such as a virtual medium vector) modulation device is provided, wherein a small vector is synthesized into a virtual medium vector, and then a reference voltage vector is synthesized, and a virtual vector (such as a virtual medium vector) is added to re-partition a space vector diagram, so that the error in synthesizing the reference voltage vector is lower, and the modulation device has positive significance for improving the waveform quality.

In some embodiments, the modulating unit 104, determining the duty cycle of each switching device in the NPC type three-level inverter, includes: the modulation unit 104 is specifically further configured to determine duty ratios of the switching devices in the NPC three-level inverter by using a volt-second product balance equation. The volt-second product equilibrium equation is:

In the solution of the invention, a virtual vector (e.g. a virtual medium vector) is composed between adjacent small vectors, in Z₁Sector as an example, V in step 4₁₃' it can be proved by geometric mapping method that the synthetic device can determine the amplitude of the virtual vector (such as virtual middle vector) on the boundary line of the small boundary region, i.e. the common intersection point of the small regions (r), (c) and (c) in fig. 7. Therefore, a virtual vector (such as a virtual medium vector) is additionally arranged in the middle of the small vector, the alternative basic voltage vector set is widened, and according to the concept of vector errors in the latest three-vector synthesis method, when the basic voltage vector is synthesized into a reference voltage vector, the distance is shortened, the vector error is reduced, the synthesis precision is increased, and the waveform quality can be improved.

Since the processes and functions implemented by the apparatus of this embodiment substantially correspond to the embodiments, principles and examples of the method, reference may be made to the related descriptions in the embodiments without being detailed in the description of this embodiment, which is not described herein again.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual medium vector under the condition of low carrier ratio, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, a virtual vector (such as the virtual medium vector) is added between the adjacent small vectors, and the basic voltage vector which generates higher common-mode voltage amplitude is abandoned when the virtual medium vector and the reference voltage vector are synthesized, so that the common-mode voltage amplitude of the system is reduced.

According to an embodiment of the present invention, there is also provided an inverter corresponding to a modulation apparatus of the inverter. The inverter may include: the modulation device of the inverter described above.

Since the processes and functions implemented by the inverter of the present embodiment substantially correspond to the embodiments, principles, and examples of the foregoing devices, reference may be made to the related descriptions in the foregoing embodiments without being detailed in the description of the present embodiment.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual medium vector under the condition of low carrier ratio, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector by subdividing the sectors, and a virtual vector (such as the virtual medium vector) is added between the adjacent small vectors; therefore, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector, so that the error in synthesizing the reference voltage vector can be lower, and the quality of the output waveform of the inverter can be improved.

According to an embodiment of the present invention, there is also provided a storage medium corresponding to a modulation method of an inverter, the storage medium including a stored program, wherein when the program is executed, a device in which the storage medium is located is controlled to execute the modulation method of the inverter.

Since the processing and functions implemented by the storage medium of this embodiment substantially correspond to the embodiments, principles, and examples of the foregoing method, reference may be made to the related descriptions in the foregoing embodiments without being detailed in the description of this embodiment.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual medium vector under the condition of low carrier ratio, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector by subdividing the sector, and a virtual vector (such as the virtual medium vector) is added between the adjacent small vectors, so that the precision in synthesis is increased, and the waveform quality can be improved.

According to an embodiment of the present invention, there is also provided a processor corresponding to a modulation method of an inverter, the processor being configured to run a program, wherein the program is configured to execute the modulation method of the inverter.

Since the processing and functions implemented by the processor of this embodiment substantially correspond to the embodiments, principles, and examples of the foregoing method, reference may be made to the related descriptions in the foregoing embodiments without being detailed in the description of this embodiment.

By adopting the technical scheme of the invention, the space vector diagram is further divided by synthesizing the virtual medium vector under the condition of low carrier ratio, the virtual vector (such as the virtual medium vector) is used for participating in synthesizing the reference voltage vector by subdividing the sectors, a virtual vector (such as the virtual medium vector) is added between the adjacent small vectors, the space vector diagram is re-divided, the error is lower when the reference voltage vector is synthesized, and the waveform quality is improved.

In summary, it is readily understood by those skilled in the art that the advantageous modes described above can be freely combined and superimposed without conflict.

The above description is only an example of the present invention, and is not intended to limit the present invention, and it is obvious to those skilled in the art that various modifications and variations can be made in the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A modulation method of an inverter, characterized in that the inverter comprises a NPC type three-level inverter; the modulation method of the NPC type three-level inverter comprises the following steps:

collecting direct-current bus voltage and three-phase voltage of the NPC type three-level inverter;

synthesizing a reference voltage vector according to the direct current bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again;

and determining the duty ratio of each switching device in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence so as to realize the modulation of the NPC type three-level inverter.

2. The method for modulating an inverter according to claim 1, wherein a reference voltage vector is synthesized from the dc bus voltage and the three-phase voltages; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again from a preset basic voltage vector, a reference voltage vector is equivalently synthesized from the virtual medium vector and the basic voltage vector, and a switching sequence is re-determined, including:

synthesizing the direct-current bus voltage and the three-phase voltage into a first voltage signal and a second voltage signal under a static coordinate system;

synthesizing a reference voltage vector according to the first voltage signal and the second voltage signal;

determining a sector and a corresponding small area of the reference voltage vector in a space vector diagram of the NPC type three-level inverter according to the amplitude and the phase of the reference voltage vector, and determining an angle and a modulation degree of the reference voltage vector in the sector and the corresponding small area; the small region is a sub-region inside the sector;

screening basic voltage vectors of the NPC type three-level inverter according to the sector and the corresponding small area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area, and synthesizing a virtual medium vector; and the number of the first and second groups,

and re-determining the partition of the sub-area in the sector in the space vector diagram according to the sector and the corresponding small area in the space vector diagram and the angle and the modulation degree of the reference voltage vector in the sector and the corresponding small area in the space vector diagram, and re-designing the switching sequence.

3. The method for modulating an inverter according to claim 2, wherein the screening of the basic voltage vectors of the NPC type three-level inverter and the synthesis of the virtual medium vector comprise:

according to the calculation mode of the common-mode voltage amplitude, basic voltage vectors in space vectors of the NPC type three-level inverter are screened, partial zero vectors and small vectors are removed, the basic voltage vectors with the common-mode voltage amplitude meeting a set value are obtained, and the basic voltage vectors are recorded as a basic voltage vector alternative set;

synthesizing a virtual medium vector by the participation of adjacent small vectors according to the alternative set of the basic voltage vectors and the following formula:

4. The method of modulating an inverter according to claim 2, wherein re-determining the partition of the intra-sector small area in the spatial vector map and re-designing the switching sequence comprises:

the distribution areas of the virtual medium vector and the rest basic voltage vectors are divided again;

according to the distribution region, the space vector diagram is divided again to obtain the partition of the small region in the sector in the re-determined space vector diagram;

and when the reference voltage vectors are distributed in corresponding areas in the subareas, determining the switching sequence of the area where the reference voltage vectors are located according to the corresponding relation between the set area and the set switching sequence to obtain the redesigned switching sequence.

5. The method for modulating the inverter according to any one of claims 1 to 4, wherein determining the duty ratio of each switching device in the NPC type three-level inverter comprises:

determining the duty ratio of each switching device in the NPC type three-level inverter by using a volt-second product balance equation; the volt-second product equilibrium equation is:

6. A modulation device of an inverter, characterized in that the inverter comprises a NPC type three-level inverter; the modulation device of the NPC type three-level inverter comprises:

the acquisition unit is configured to acquire the direct-current bus voltage and the three-phase voltage of the NPC type three-level inverter;

the modulation unit is configured to synthesize a reference voltage vector according to the direct-current bus voltage and the three-phase voltage under a set low carrier ratio condition; in a space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again by a preset basic voltage vector, a reference voltage vector is equivalently synthesized by the virtual medium vector and the basic voltage vector, and a switching sequence is determined again;

the modulation unit is further configured to determine duty ratios of the switching devices in the NPC type three-level inverter according to the basic voltage vector, the virtual medium vector and the switching sequence, so as to realize modulation of the NPC type three-level inverter.

7. The modulation device of the inverter according to claim 6, wherein the modulation unit synthesizes a reference voltage vector from the dc bus voltage and the three-phase voltage; in the space vector diagram of the NPC type three-level inverter, a new virtual medium vector is synthesized again from a preset basic voltage vector, a reference voltage vector is equivalently synthesized from the virtual medium vector and the basic voltage vector, and a switching sequence is re-determined, including:

8. The apparatus as claimed in claim 7, wherein the modulation unit screens basic voltage vectors of the NPC type three-level inverter and synthesizes a virtual medium vector, comprising:

9. The apparatus according to claim 7, wherein the modulation unit re-determines the partition of the intra-sector small area in the space vector diagram and re-designs the switching sequence, and comprises:

10. The apparatus according to any one of claims 6 to 9, wherein the modulation unit determines a duty ratio of each switching device in the NPC type three-level inverter, and comprises:

11. An inverter, comprising: the modulation device of the inverter according to any one of claims 6 to 10.

12. A storage medium, characterized in that the storage medium comprises a stored program, wherein a device in which the storage medium is located is controlled to execute the modulation method of the inverter according to any one of claims 1 to 5 when the program is executed.

13. A processor, characterized in that the processor is configured to run a program, wherein the program is run to perform the modulation method of the inverter of any one of claims 1 to 5.