CN113765337A - Self-checking method for T-type three-level inverter switching tube applied to SVG - Google Patents

Self-checking method for T-type three-level inverter switching tube applied to SVG Download PDF

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CN113765337A
CN113765337A CN202111323827.2A CN202111323827A CN113765337A CN 113765337 A CN113765337 A CN 113765337A CN 202111323827 A CN202111323827 A CN 202111323827A CN 113765337 A CN113765337 A CN 113765337A
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voltage
sum
value
inductive current
normal
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CN113765337B (en
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范建华
曹乾磊
马玉坤
杨森
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Qingdao Topscomm Communication Co Ltd
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Qingdao Topscomm Communication Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40—Testing power supplies
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels

Abstract

The invention provides a self-checking method of a T-type three-level inverter switching tube applied to SVG, which comprises the following steps: s1, judging whether the direct current bus is normal according to the ratio of the actual bus voltage sampling value to the input voltage peak value; s2, detecting whether the voltage of a filter capacitor of the T-shaped three-level inverter is normal; and S3, applying a PWM driving signal to a switching tube of the T-shaped three-level inverter, determining an inductive current threshold value according to the calculated inductive current theoretical value sum, and comparing the inductive current actual value sum obtained by sampling with the inductive current threshold value to further judge whether the switching tube is normal. According to the invention, the abnormal condition of the switching tube of the T-shaped three-level grid-connected inverter can be timely and comprehensively detected through direct-current bus voltage detection, filter capacitor voltage detection and sequential detection of the switching tube without additional circuits or equipment, and the equipment cost is reduced on the premise of avoiding further damage of the inverter.

Description

Self-checking method for T-type three-level inverter switching tube applied to SVG
Technical Field
The invention relates to a self-checking method of an inverter, in particular to a self-checking method of a T-shaped three-level inverter switching tube applied to SVG.
Background
Static Var Generators (SVG) are grid-connected inverter devices, which are connected in parallel to a low-voltage line and inject current into a power grid to solve the problem of low reactive power, harmonic power and power factor at the low-voltage side. The T-type three-level inverter is a common topology, the switching tube is a core circuit of the inverter, the abnormal condition of the switching tube of the inverter can be detected in time, and the inverter can be prevented from being further damaged. However, the existing switch tube detection module needs an additional circuit, which increases the equipment cost.
The hysteresis control has the characteristic of high-frequency sampling, so that the hysteresis control can be used for self-checking of a T-type grid-connected inverter switching tube.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a self-checking method of a T-type three-level inverter switching tube applied to SVG, double-loop control is adopted, the voltage outer loop is linear control, the current inner loop is hysteresis control, the self-checking can be realized without additional circuits or equipment, and the abnormal condition of the switch can be timely and effectively detected.
The purpose of the invention can be realized by the following technical scheme:
a self-checking method for a T-type three-level inverter switching tube applied to SVG comprises a bus capacitor C1, a bus capacitor C2, a switching tube T1, a switching tube T2, a switching tube T3, a switching tube T4, an inductor L1, an inductor L2 and a filter capacitor C3;
the connection relationship is as follows: a first end part of a capacitor C1 is connected with a collector of a switch tube T1, an emitter of a switch tube T1 is respectively connected with an emitter of the switch tube T3, a collector of the switch tube T4 and a first end part of an inductor L1, a second end part of a capacitor C1, an emitter of the switch tube T2 and a first end part of the capacitor C2 are connected with a connecting wire point N, a collector of a switch tube T2 is connected with a collector of the switch tube T3, an emitter of the switch tube T4 is connected with a second end part of the capacitor C2, a second end part of the inductor L1 is connected with a first end part of the inductor L2 and a first end part of the capacitor C3, a second end part of the inductor L2 is connected with a positive electrode of an alternating current power supply, a second end part of the capacitor C3 is connected with a negative electrode of the alternating current power supply at a point O of the connecting wire, and bases of the T1, the T2, the T3 and the T4 are connected with a driving unit;
the switch tube T1 comprises an IGBT tube and a diode D1, and the diode D1 is connected in reverse parallel with the IGBT tube; the switch tube T2 comprises an IGBT tube and a diode D2, and the diode D2 is connected in reverse parallel with the IGBT tube; the switch tube T3 comprises an IGBT tube and a diode D3, and the diode D3 is connected in reverse parallel with the IGBT tube; the switch tube T4 comprises an IGBT tube and a diode D4, and the diode D4 is connected in reverse parallel with the IGBT tube;
the method comprises the following steps:
step S1, judging whether the direct current bus is normal according to the ratio of the actual bus voltage sampling value to the input voltage peak value, if so, skipping to step S2, otherwise, repeatedly detecting, if not, judging that the direct current bus of the inverter is abnormal and ending the process;
step S2, detecting whether the voltage of the filter capacitor of the T-shaped three-level inverter is normal, if so, jumping to step S3, otherwise, repeatedly detecting, if not, judging that the voltage sampling of the filter capacitor of the inverter is abnormal and ending the process, wherein the voltage of the filter capacitor of the T-shaped three-level inverter is not normal, and if not, the 3 times of repeated detection are not passed;
and step S3, applying a PWM driving signal to a switching tube of the T-shaped three-level inverter, determining an inductive current threshold value according to the calculated inductive current theoretical value sum, and comparing the inductive current actual value sum obtained by sampling with the inductive current threshold value to further judge whether the switching tube is normal.
Further, the criterion whether the dc bus is normal in step S1 is as follows: and when the ratio of the actual bus voltage sampling value to the input voltage peak value is larger than a set threshold value, the direct current bus is considered to be normal, otherwise, the direct current bus is considered to be abnormal.
Further, the criterion whether the filter capacitor voltage is normal in step S2 is as follows: and when the effective value of the voltage of the filter capacitor is within a set threshold range, the voltage of the filter capacitor is considered to be normal, otherwise, the voltage of the filter capacitor is considered to be abnormal, and the threshold range is set according to the effective value of the voltage of the power grid.
Further, the step S3 specifically includes the following sub-steps:
s301, when the voltage of the filter capacitor is within a threshold range, a driving signal is applied to T2;
respectively calculating the sum of the actual value and the theoretical value of the inductive current of the voltage outer ring sampling period Tout time passing through T2D3 and D1, and determining the inductive current threshold of the voltage outer ring sampling period Tout time and the theoretical value of the inductive current of the voltage outer ring sampling period Tout time according to the sum of the theoretical value and the theoretical value of the inductive current of the voltage outer ring sampling period Tout time;
when the sum of the actual values of the inductor currents of the T2D3 is within a threshold range, the T2D3 is considered normal; when the sum of the actual values of the inductor currents of D1 is within the threshold range, D1 is considered normal; otherwise, repeating self-checking; if the 3 times of retest fails, judging that the T2D3 or D1 is abnormal, and ending the process;
s302, when the voltage of the filter capacitor is within a threshold range, a driving signal is applied to T3;
respectively calculating the sum of the actual value and the theoretical value of the inductive current of the Tout time passing through T3D2 and D4, and determining the inductive current threshold of the Tout time and the theoretical value of the inductive current of the T3D2 and D4;
when the sum of the actual values of the inductor currents of the T3D2 is within the threshold range, the T3D2 is considered normal; when the sum of the actual values of the inductor currents of D4 is within the threshold range, D4 is considered normal; otherwise, repeating self-checking; if the 3 times of retest fails, judging that the T3D2 or D4 is abnormal, and ending the process;
s303, when the voltage of the filter capacitor is within a threshold value range, a driving signal is applied to T1;
calculating the sum of the actual value and the theoretical value of the inductive current of which the Tout time passes through T1, and determining an inductive current threshold according to the sum of the theoretical value of the inductive current;
when the sum of the actual values of the inductor currents is within the threshold range, the T1 is considered to be normal; otherwise, repeating self-checking; if the 3 times of retest are not passed, judging that T1 is abnormal, and ending the process;
s304, when the voltage of the filter capacitor is within the threshold value range, a driving signal is applied to T4;
calculating the sum of the actual value and the theoretical value of the inductive current of which the Tout time passes through T4, and determining an inductive current threshold according to the sum of the theoretical value of the inductive current;
when the sum of the actual values of the inductive currents is within the threshold range, considering that T4 is normal, and ending self-checking; otherwise, repeating self-checking; if the 3 times of retest are not passed, the T4 is judged to be abnormal, and the process is terminated.
The invention has the beneficial technical effects that: the abnormal condition of the T-shaped three-level grid-connected inverter switching tube can be timely and comprehensively detected through direct current bus voltage detection, filter capacitor voltage detection and sequential detection of the switching tube without extra circuits or equipment, and the equipment cost is reduced on the premise that further damage of the T-shaped three-level inverter can be avoided.
Drawings
FIG. 1 is a topological diagram of a switching tube of a T-type three-level grid-connected inverter according to the present invention;
FIG. 2 is an overall flow diagram of the present invention;
FIG. 3 is a diagram illustrating a T2D3 detection turn-on topology according to an embodiment of the present invention;
FIG. 4 illustrates an embodiment of the present invention in which D1 detects a conduction topology;
FIG. 5 is a graph illustrating the inductance current and pulse test of the T2D3 and D1 embodiments of the present invention;
FIG. 6 is a diagram of a T3D2 detection turn-on topology according to an embodiment of the present invention;
FIG. 7 illustrates an embodiment of the present invention in which D4 detects a conduction topology;
FIG. 8 is a graph illustrating the inductance current and pulse measurements of the T3D2 and D4 embodiments of the present invention;
FIG. 9 illustrates an embodiment of the present invention in which T1 detects a conduction topology;
FIG. 10 shows a T4 detection conduction topology according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
A self-checking method for a T-type three-level inverter switching tube applied to SVG is disclosed, the inverter is a T-type three-level inverter and comprises a bus capacitor C1, a bus capacitor C2, a switching tube T1, a switching tube T2, a switching tube T3, a switching tube T4, an inductor L1, an inductor L2 and a filter capacitor C3;
the connection relationship is as follows: a first end of a capacitor C1 is connected to a collector of a switch tube T1, an emitter of a switch tube T1 is connected to an emitter of the switch tube T3, a collector of the switch tube T4 and a first end of an inductor L1, respectively, a second end of a capacitor C1, an emitter of the switch tube T2 and a first end of a capacitor C2 are connected to a point N of a connection line, a collector of a switch tube T2 is connected to a collector of the switch tube T3, an emitter of the switch tube T4 is connected to a second end of the capacitor C2, a second end of the inductor L1 is connected to a first end of the inductor L2 and a first end of the capacitor C3, a second end of the inductor L2 is connected to a positive pole of an ac power source, a second end of the capacitor C3 is connected to a negative pole of the ac power source at a point O of the connection line, and bases of the capacitor T1, T2, T3 and T4 are connected to a driving unit, as shown in fig. 1.
The switch tube T1 comprises an IGBT tube and a diode D1, and the diode D1 is connected in reverse parallel with the IGBT tube; the switch tube T2 comprises an IGBT tube and a diode D2, and the diode D2 is connected in reverse parallel with the IGBT tube; the switch tube T3 comprises an IGBT tube and a diode D3, and the diode D3 is connected in reverse parallel with the IGBT tube; the switch tube T4 includes an IGBT tube and a diode D4, and the diode D4 is connected in anti-parallel with the IGBT tube.
As shown in fig. 2, the method comprises the steps of:
step S1, judging whether the direct current bus is normal according to the ratio of the actual bus voltage sampling value to the input voltage peak value, if so, skipping to step S2, otherwise, repeatedly detecting, if not, judging that the direct current bus of the inverter is abnormal and ending the process;
the criterion whether the direct current bus is normal is as follows: when the ratio of the actual bus voltage sampling value to the input voltage peak value is larger than a set threshold value, the direct current bus is considered to be normal, otherwise, the direct current bus is considered to be abnormal;
in this example, the set threshold value is preferably 0.8, that is, when the ratio of the actual bus voltage sampling value to the input voltage peak value is greater than 0.8, the step S2 is skipped; when the ratio is less than or equal to 0.8, repeated judgment is needed, and the direct current bus is judged to be abnormal only when the conditions are not met in the three judgments, and the process is terminated. Such a design can effectively reduce misjudgment.
Step S2, detecting whether the voltage of the filter capacitor of the T-shaped three-level inverter is normal, if so, jumping to step S3, otherwise, repeatedly detecting, if not, judging that the voltage sampling of the filter capacitor of the inverter is abnormal and ending the process, wherein the voltage of the filter capacitor of the T-shaped three-level inverter is not normal, and if not, the 3 times of repeated detection are not passed;
the criterion of whether the voltage of the filter capacitor is normal is as follows: and when the effective value of the voltage of the filter capacitor is within a set threshold range, the voltage of the filter capacitor is considered to be normal, otherwise, the voltage of the filter capacitor is considered to be abnormal, and the threshold range is set according to the effective value of the voltage of the power grid.
In this example, the threshold range is preferably set to plus or minus 20V, i.e., the effective value U of the filter capacitor voltageCapRmsAnd the effective value U of the network voltageGridRmsSatisfy the requirement of
Figure 390786DEST_PATH_IMAGE001
If so, go to step S3; and when the effective value of the voltage of the filter capacitor does not meet the condition, repeated judgment is needed, and the abnormal voltage of the filter capacitor is judged only when the effective value of the voltage of the filter capacitor does not meet the condition in three times of judgment, so that the process is terminated. Such a design can effectively reduce misjudgment. The threshold range can also be adjusted according to actual conditions and requirements.
And step S3, applying a PWM driving signal to a switching tube of the T-shaped three-level inverter, determining an inductive current threshold value according to the calculated inductive current theoretical value sum, and comparing the inductive current actual value sum obtained by sampling with the inductive current threshold value to further judge whether the switching tube is normal. S3 includes the following substeps:
s301, T2D3, D1 self-test: when the filter capacitor is at voltage
Figure 650866DEST_PATH_IMAGE002
While applying ToutThe PWM driving signal of time is sent to the switching tube T2, and the conduction topology is as shown in fig. 3, at this time, T2D3 is conducted, and the inductor current is slowly increased; after the PWM signal disappears, the conduction topology is as shown in FIG. 4, D1 is conducted, and the inductive current is slowed downSlow decrease, the change in inductor current is shown in fig. 5; sampling the voltage of a filter capacitor, the inductive current and the voltage of an upper bus and a lower bus, and storing the sampled values to an array UCap、IComp、UdcPos、UdcNegWherein the array length is 2N;
wherein, the sampling period of the voltage outer ring is ToutThe sampling period of the current inner loop is Tin，ToutNumber of samples taken over time
Figure 916631DEST_PATH_IMAGE003
；
The positive direction of the current is defined as the direction of the inductor L1 to the switching tube.
Calculating ToutThe sum of the actual values of the inductor current through T2D3 over time is given by:
Figure 273663DEST_PATH_IMAGE004
calculating ToutThe sum of the theoretical values of the inductor current through T2D3 over time is given by:
Figure 717414DEST_PATH_IMAGE005
wherein L is the inductance of the inductor L1, FinIs the sampling frequency of the current inner loop.
Determining the inductive current threshold value according to the inductive current theoretical value
Figure 464790DEST_PATH_IMAGE006
；
Calculating ToutThe sum of the actual values of the inductor current through D1 over time is given by the following equation:
Figure 268667DEST_PATH_IMAGE007
calculating ToutThe sum of the theoretical values of the inductor current through D1 in time is given by the following formula:
Figure 558834DEST_PATH_IMAGE008
determining the inductive current threshold value according to the inductive current theoretical value
Figure 691262DEST_PATH_IMAGE009
；
Wherein
Figure 535722DEST_PATH_IMAGE010
For a pre-set filter capacitor voltage error,
Figure 487497DEST_PATH_IMAGE011
is a preset inductor current error.
When the actual value of the inductor current is Isum_T2D3At a threshold value
Figure 615859DEST_PATH_IMAGE006
Within the range, T2D3 is considered normal; when the actual value of the inductor current is Isum_D1At a threshold value
Figure 526046DEST_PATH_IMAGE009
Within the range, D1 was considered normal; skipping to step S302; otherwise, repeating self-checking; and if the 3 retests do not pass, judging that the T2D3 or the D1 is abnormal, and ending the process.
S302, self-test of T3D2 and D4: when the filter capacitor is at voltage
Figure 123381DEST_PATH_IMAGE012
While applying ToutA PWM driving signal of time is sent to a switching tube T3, a conduction topology is shown in figure 6, at the moment, T3D2 is conducted, the inductive current is slowly reduced, after the PWM signal disappears, the conduction topology is shown in figure 7, D4 is conducted, the inductive current is slowly increased, and the change of the inductive current is shown in figure 8; high-frequency sampling is carried out on the voltage of the filter capacitor, the inductive current and the voltage of the upper bus and the lower bus, and the high-frequency sampling is stored to an array UCap、IComp、UdcPos、UdcNegWherein the array length is 2N.
Calculating ToutThe sum of the actual values of the inductor currents through the switching tube T3D2 in time is given by the following formula:
Figure 3481DEST_PATH_IMAGE013
calculating ToutThe sum of the theoretical values of the inductor current passing through the switching tube T3D2 in time is as follows:
Figure 596136DEST_PATH_IMAGE014
determining a threshold value according to the theoretical value of the inductive current
Figure 287012DEST_PATH_IMAGE015
；
Calculating ToutThe sum of the actual values of the inductor current through the switching tube D4 in time is given by the following formula:
Figure 230697DEST_PATH_IMAGE016
calculating ToutThe sum of the theoretical values of the inductor current through the switching tube D4 in time is as follows:
Figure 914488DEST_PATH_IMAGE017
determining the inductive current threshold value according to the inductive current theoretical value
Figure 627229DEST_PATH_IMAGE018
；
When the actual value of the inductor current is Isum_T3D2At a threshold value
Figure 223427DEST_PATH_IMAGE015
Within range, T3D2 is considered normal; when the actual value of the inductor current is Isum_D4At a threshold value
Figure 654408DEST_PATH_IMAGE019
Within the range, D4 was considered normal; skipping to step S303; otherwise, repeating self-checking; and if the 3 retests do not pass, judging that the T3D2 or the D4 is abnormal, and ending the process.
S303, T1 self test: when the filter capacitor is at voltage
Figure 885100DEST_PATH_IMAGE020
While applying ToutThe PWM driving signal of time is sent to a switching tube T1, the conducting topology is as shown in figure 9, the voltage of a filter capacitor, the inductive current and the voltage of an upper bus and a lower bus are sampled and stored to an array UCap、IComp、UdcPos、UdcNegWherein the array length is N.
Calculating ToutThe sum of the actual values of the inductor current through the switching tube T1 in time is given by the following formula:
Figure 717927DEST_PATH_IMAGE021
calculating ToutThe sum of the theoretical values of the inductor current of the switching tube T1 in time is as follows:
Figure 485026DEST_PATH_IMAGE022
determining the inductive current threshold value according to the inductive current theoretical value
Figure 403303DEST_PATH_IMAGE023
；
When the actual value of the inductor current is Isum_T1At a threshold value
Figure 428897DEST_PATH_IMAGE023
If the range is within the range, the T1 is considered to be normal, and the step S304 is skipped; otherwise, repeating self-checking; if the 3 retests do not pass, the T1 is judged to be abnormal, and the process is terminated.
S304, self-checking of T4: when the filter capacitor is at voltage
Figure 850651DEST_PATH_IMAGE020
While applying ToutThe PWM driving signal of time is sent to the switching tube T4, the conducting topology is as shown in fig. 10, the filter capacitor voltage, the inductor current, the upper and lower bus voltages are sampled and stored in the array UCap、IComp、UdcPos、UdcNegWherein the array length is N.
Calculating ToutThe sum of the actual values of the inductor current through the switching tube T4 in time is given by the following formula:
Figure 54230DEST_PATH_IMAGE024
calculating ToutThe sum of the theoretical values of the inductor current of the switching tube T4 in time is as follows:
Figure 194224DEST_PATH_IMAGE025
determining the inductive current threshold value according to the inductive current theoretical value
Figure 289088DEST_PATH_IMAGE026
；
When the actual value of the inductor current is Isum_T4At a threshold value
Figure 830928DEST_PATH_IMAGE026
If the range is within the range, the T4 is considered to be normal, and the self-test is ended; otherwise, repeating self-checking; if the 3 retests do not pass, the T4 is judged to be abnormal, and the process is terminated.
Filter capacitor voltage error in this example
Figure 205409DEST_PATH_IMAGE010
Is 10V; error of inductive current
Figure 832699DEST_PATH_IMAGE011
Is 50A. In an actual scene, the two values can be adjusted according to the actual sampling frequency; according to inductanceThe actual current value sum is judged, so that misjudgment caused by judgment according to the inductance current value of a single point can be effectively prevented, and the reliability of self-checking is improved.
The above-mentioned embodiments are illustrative of the specific embodiments of the present invention, and are not restrictive, and those skilled in the relevant art can make various changes and modifications to obtain corresponding equivalent technical solutions without departing from the spirit and scope of the present invention, so that all equivalent technical solutions should be included in the scope of the present invention.

Claims (4)

1. A self-checking method for a T-type three-level inverter switching tube applied to SVG is characterized in that the T-type three-level inverter comprises a bus capacitor C1, a bus capacitor C2, a switching tube T1, a switching tube T2, a switching tube T3, a switching tube T4, an inductor L1, an inductor L2 and a filter capacitor C3;
the connection relationship is as follows: a first end part of a capacitor C1 is connected with a collector of a switch tube T1, an emitter of a switch tube T1 is respectively connected with an emitter of the switch tube T3, a collector of the switch tube T4 and a first end part of an inductor L1, a second end part of a capacitor C1, an emitter of the switch tube T2 and a first end part of the capacitor C2 are connected with a connecting wire point N, a collector of a switch tube T2 is connected with a collector of the switch tube T3, an emitter of the switch tube T4 is connected with a second end part of the capacitor C2, a second end part of the inductor L1 is connected with a first end part of the inductor L2 and a first end part of the capacitor C3, a second end part of the inductor L2 is connected with a positive electrode of an alternating current power supply, a second end part of the capacitor C3 is connected with a negative electrode of the alternating current power supply at a point O of the connecting wire, and bases of the T1, the T2, the T3 and the T4 are connected with a driving unit;
the switch tube T1 comprises an IGBT tube and a diode D1, and the diode D1 is connected in reverse parallel with the IGBT tube; the switch tube T2 comprises an IGBT tube and a diode D2, and the diode D2 is connected in reverse parallel with the IGBT tube; the switch tube T3 comprises an IGBT tube and a diode D3, and the diode D3 is connected in reverse parallel with the IGBT tube; the switch tube T4 comprises an IGBT tube and a diode D4, and the diode D4 is connected in reverse parallel with the IGBT tube;
the method comprises the following steps:
step S1, judging whether the direct current bus is normal according to the ratio of the actual bus voltage sampling value to the input voltage peak value, if so, skipping to step S2, otherwise, repeatedly detecting, if not, judging that the direct current bus of the inverter is abnormal and ending the process;
step S2, detecting whether the voltage of the filter capacitor of the T-shaped three-level inverter is normal, if so, jumping to step S3, otherwise, repeatedly detecting, if not, judging that the voltage sampling of the filter capacitor of the inverter is abnormal and ending the process, wherein the voltage of the filter capacitor of the T-shaped three-level inverter is not normal, and if not, the 3 times of repeated detection are not passed;
and step S3, applying a PWM driving signal to a switching tube of the T-shaped three-level inverter, determining an inductive current threshold value according to the calculated inductive current theoretical value sum, and comparing the inductive current actual value sum obtained by sampling with the inductive current threshold value to further judge whether the switching tube is normal.
2. The self-checking method for the switching tube of the T-type three-level inverter applied to SVG of claim 1, wherein the criterion of whether the DC bus is normal in step S1 is: and when the ratio of the actual bus voltage sampling value to the input voltage peak value is larger than a set threshold value, the direct current bus is considered to be normal, otherwise, the direct current bus is considered to be abnormal.
3. The self-checking method for the switching tube of the T-type three-level inverter applied to SVG of claim 1, wherein the criterion of whether the filter capacitor voltage is normal in step S2 is: and when the effective value of the voltage of the filter capacitor is within a set threshold range, the voltage of the filter capacitor is considered to be normal, otherwise, the voltage of the filter capacitor is considered to be abnormal, and the threshold range is set according to the effective value of the voltage of the power grid.
4. The self-checking method for the switching tube of the T-type three-level inverter applied to SVG according to claim 1, characterized in that said step S3 specifically comprises the following sub-steps:
s301, when the voltage of the filter capacitor is within a threshold range, a driving signal is applied to T2;
respectively calculating the sampling period T of the voltage outer ringoutThe sum of the actual value and the theoretical value of the inductive current of the T2D3 and the D1 is passed through in time, and the inductive current threshold values of the two are determined according to the sum of the theoretical values of the inductive current of the two;
when the sum of the actual values of the inductor currents of the T2D3 is within a threshold range, the T2D3 is considered normal; when the sum of the actual values of the inductor currents of D1 is within the threshold range, D1 is considered normal; otherwise, repeating self-checking; if the 3 times of retest fails, judging that the T2D3 or D1 is abnormal, and ending the process;
s302, when the voltage of the filter capacitor is within a threshold range, a driving signal is applied to T3;
separately calculate ToutThe sum of the actual value and the theoretical value of the inductive current of the T3D2 and the D4 is passed through in time, and the inductive current threshold values of the two are determined according to the sum of the theoretical values of the inductive current of the two;
when the sum of the actual values of the inductor currents of the T3D2 is within the threshold range, the T3D2 is considered normal; when the sum of the actual values of the inductor currents of D4 is within the threshold range, D4 is considered normal; otherwise, repeating self-checking; if the 3 times of retest fails, judging that the T3D2 or D4 is abnormal, and ending the process;
s303, when the voltage of the filter capacitor is within a threshold value range, a driving signal is applied to T1;
calculating ToutDetermining an inductive current threshold value according to the sum of the inductive current theoretical value and the inductive current actual value sum of the time passing T1;
when the sum of the actual values of the inductor currents is within the threshold range, the T1 is considered to be normal; otherwise, repeating self-checking; if the 3 times of retest are not passed, judging that T1 is abnormal, and ending the process;
s304, when the voltage of the filter capacitor is within the threshold value range, a driving signal is applied to T4;
calculating ToutDetermining an inductive current threshold value according to the sum of the inductive current theoretical value and the inductive current actual value sum of the time passing T4;
when the sum of the actual values of the inductive currents is within the threshold range, considering that T4 is normal, and ending self-checking; otherwise, repeating self-checking; if the 3 times of retest are not passed, the T4 is judged to be abnormal, and the process is terminated.
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