CN113763863A

CN113763863A - Display panel driving method and display device

Info

Publication number: CN113763863A
Application number: CN202111140939.4A
Authority: CN
Inventors: 郑艺芬; 黄敏; 黄建才
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2021-09-28
Filing date: 2021-09-28
Publication date: 2021-12-07
Anticipated expiration: 2041-09-28
Also published as: CN113763863B

Abstract

The embodiment of the invention provides a driving method of a display panel and a display device, relates to the technical field of display, and can reduce the power consumption of the display panel. The display panel comprises a plurality of display units arranged along a first direction, each display unit comprises a first type pixel unit and a second type pixel unit, each first type pixel unit comprises a plurality of first type pixel rows arranged along the first direction, and each second type pixel unit comprises a plurality of second type pixel rows arranged along the first direction; one driving cycle of the display panel includes a plurality of driving periods corresponding one-to-one to the plurality of display units, and the driving method includes: in each driving period, the first-type pixel rows and the second-type pixel rows in the display unit corresponding to the first-type pixel rows and the second-type pixel rows are charged, and the charging time of at least two first-type pixel rows and the charging time of at least two second-type pixel rows with the same color are adjacent.

Description

Display panel driving method and display device

[ technical field ] A method for producing a semiconductor device

The invention relates to the technical field of display, in particular to a display panel driving method and a display device.

[ background of the invention ]

Three-dimensional (3D) display can make a picture stereoscopic and vivid, and provide viewers with a feeling of being personally on the scene, which is an inevitable trend of future image display, compared with Two-dimensional (2D) display. Polarized glasses type stereoscopic display is a mainstream technology in the field of current 3D display, however, when a 3D picture is viewed in this way, polarized glasses need to be worn, so that the viewing comfort of a user is not high. Therefore, the naked eye 3D technology comes along, but the current naked eye 3D technology still has the problems of high power consumption and the like.

[ summary of the invention ]

In view of this, embodiments of the present invention provide a driving method of a display panel and a display device, which can effectively reduce power consumption of the display panel.

In one aspect, an embodiment of the present invention provides a driving method for a display panel, where the display panel includes a plurality of display units arranged along a first direction, where each display unit includes a first-type pixel unit and a second-type pixel unit, where the first-type pixel unit includes a plurality of first-type pixel rows arranged along the first direction, and the second-type pixel unit includes a plurality of second-type pixel rows arranged along the first direction;

one driving cycle of the display panel includes a plurality of driving periods corresponding one-to-one to a plurality of the display units, the driving method including: in each driving period, the first-type pixel rows and the second-type pixel rows in the display unit corresponding to the driving period are charged, and the charging time of at least two first-type pixel rows and the charging time of at least two second-type pixel rows with the same color are adjacent.

In another aspect, an embodiment of the present invention provides a display device, including:

the display panel comprises a plurality of display units arranged along a first direction, wherein each display unit comprises a first type pixel unit and a second type pixel unit, the first type pixel unit comprises a plurality of first type pixel rows arranged along the first direction, and the second type pixel unit comprises a plurality of second type pixel rows arranged along the first direction;

in one display unit, at least two pixel rows of the first type and two pixel rows of the second type which have the same color are adjacent in charging time.

One of the above technical solutions has the following beneficial effects:

when the display panel performs left-eye and right-eye imaging, the left-eye image and the right-eye image have the same display content, and only a slight difference exists between the display voltages, so that for two first-type pixel rows and two second-type pixel rows with the same color in the same display unit, the difference of the light-emitting brightness of two sub-pixels in the same column in the two pixel rows is small. Therefore, when the charging time of at least two first-type pixel rows and two second-type pixel rows with the same color are adjacent, after the data line charges the sub-pixels in the first-type pixel rows by using a certain charging voltage, the sub-pixels in the other second-type pixel rows can be charged only by jumping to the other charging voltage with a smaller amplitude or without jumping, so that the voltage jumping frequency and the voltage jumping amplitude of the data line are reduced, and the total power consumption of the display panel during working is effectively reduced.

[ description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a timing diagram of the prior art;

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 3 is a timing diagram corresponding to FIG. 2;

fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 5 is a timing diagram corresponding to FIG. 4;

fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 7 is a timing diagram corresponding to FIG. 6;

FIG. 8 is another timing diagram corresponding to FIG. 4;

FIG. 9 is a further timing diagram corresponding to FIG. 4;

FIG. 10 is another timing diagram corresponding to FIG. 6;

FIG. 11 is a further timing diagram corresponding to FIG. 6;

fig. 12 is a schematic structural diagram of a display device according to an embodiment of the invention;

fig. 13 is a schematic structural diagram of a display device according to an embodiment of the invention;

fig. 14 is a schematic structural diagram of a display device according to an embodiment of the invention.

[ detailed description ] embodiments

For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.

It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

Before describing the technical solutions provided by the embodiments of the present invention, the embodiments of the present invention first describe the problems existing in the prior art.

A display panel in the related art includes a plurality of display units each including a left-eye pixel row and a right-eye pixel row. Illustratively, the display unit includes a left-eye red pixel line, a left-eye green pixel line, a left-eye blue pixel line, a right-eye red pixel line, a right-eye green pixel line, and a right-eye blue pixel line. The left-eye pixel lines are used for displaying a left-eye image, the right-eye pixel lines are used for displaying a right-eye image, and the left-eye image and the right-eye image have a displacement difference, namely a voltage difference, so that a stereoscopic 3D image can be formed after synthesis.

As shown in fig. 1, fig. 1 is a timing diagram of a related art, and one driving cycle of a display panel includes a plurality of driving periods T corresponding to a plurality of display units one to one. In one driving period T, the charging sequence of the Data lines Data to the pixel rows in the display unit is: left eye red pixel row (corresponding to a charging voltage of V)_1R) And the left eye green pixel row (corresponding charging voltage is V)_1G) Left eye blue pixel row (corresponding to charging voltage V)_1B) And the red pixel row of the right eye (corresponding to the charging voltage V)_2R) And a green pixel row for the right eye (corresponding to a charging voltage of V)_2G) And a right eye blue pixel row (corresponding to a charging voltage of V)_2B)。

The inventors have studied and found that, based on the above-described driving manner, two pixel rows adjacent to each other in an arbitrary charging time are pixel rows of different colors. It can be understood that, when the display panel performs left-eye and right-eye image formation, the luminance difference of the light emitted from the sub-pixels with different colors is large, and thus the difference of the charging voltages transmitted to the data lines is also large. If two adjacent pixel rows with different charging time are pixel rows with different colors, after the data line finishes charging the sub-pixels in one of the pixel rows with a certain charging voltage, it is necessary to jump to another charging voltage with a larger difference to charge the sub-pixels in the other pixel row.

Specifically, referring again to FIG. 1, the data lines utilize a higher charging voltage V_1RAfter the sub-pixels in the red pixel row for the left eye are charged, the voltage needs to jump to a lower charging voltage V_1GCharging the sub-pixels in the left eye green pixel row and then jumping to a lower charging voltage V_1BCharging the sub-pixels in the left-eye blue pixel row and then jumping to a higher charging voltage V_2RThe subpixels in the row of red pixels for the right eye are charged, …, and so on, until the right eye is chargedThe charging of the sub-pixels in the eye blue pixel row ends.

Therefore, based on the above charging mode, each pair of data lines needs to perform a large voltage jump when charging the next pixel row, and the high and low potential jumps of the signal have a large influence on power consumption, so that the power consumption of the display panel during operation is high due to the charging mode.

To this end, an embodiment of the present invention provides a driving method of a display panel, as shown in fig. 2, fig. 2 is a schematic structural diagram of a display panel to which the driving method is applied, the display panel 100 includes a plurality of display units 1 arranged along a first direction, and each display unit 1 includes a first type pixel unit 2 and a second type pixel unit 3. The first-class pixel unit 2 comprises a plurality of first-class pixel rows 4 arranged along a first direction, the first-class pixel rows 4 comprise a plurality of first-class sub-pixels 5 arranged along a second direction and having the same emergent light color, the second-class pixel unit 3 comprises a plurality of second-class pixel rows 6 arranged along the first direction, the second-class pixel rows 6 comprise a plurality of second-class sub-pixels 7 arranged along the second direction and having the same emergent light color, and the first direction is intersected with the second direction.

The first-type pixel lines 4 are left-eye pixel lines, and the second-type pixel lines 6 are right-eye pixel lines, or the first-type pixel lines 4 are right-eye pixel lines, and the second-type pixel lines 6 are left-eye pixel lines.

In a possible embodiment, the first type pixel unit 2 comprises at least two first type pixel rows 4 with different light emission colors, and the second type pixel unit 3 comprises at least two second type pixel rows 6 with different light emission colors. Illustratively, referring again to fig. 2, the first-type pixel cells 2 include a first-type red pixel row 4R for emitting red light, a first-type green pixel row 4G for emitting green light, and a first-type blue pixel row 4B for emitting blue light, and the second-type pixel cells 3 include a second-type red pixel row 6R for emitting red light, a second-type green pixel row 6G for emitting green light, and a second-type blue pixel row 6B for emitting blue light.

Based on the above structure, one driving cycle of the display panel 100 includes a plurality of driving periods, and the plurality of driving periods T correspond to the plurality of display units 1 one to one, and the driving method provided by the embodiment of the present invention includes: in each driving period T, the first-type pixel row 4 and the second-type pixel row 6 in the display unit 1 corresponding thereto are charged, and the charging times of at least two first-type pixel rows 4 and second-type pixel rows 6 of the same color are adjacent.

In a possible implementation manner, referring to fig. 2 and fig. 3, as shown in fig. 3, fig. 3 is a timing diagram corresponding to fig. 2, in a driving period T, a charging sequence of a pixel row in the display unit 1 by a Data line Data is as follows: red pixel row 4R of the first type (corresponding to a charging voltage V)_1R) First green pixel row 4G (corresponding to a charging voltage V)_1G) A first blue pixel row 4B (corresponding to a charging voltage V)_1B) A second type of blue pixel row 6B (corresponding to a charging voltage V)_2B) A second red pixel row 6R (corresponding to a charging voltage V)_2R) And a second type of green pixel row 6G (corresponding to a charging voltage V)_2G)。

When the display panel 100 performs left-eye and right-eye imaging, the left-eye image and the right-eye image have the same display content, and only a slight difference exists between the display voltages, so that for two first-type pixel rows 4 and two second-type pixel rows 6 with the same color in the same display unit 1, the difference of the luminance of the two sub-pixels in the same column in the two pixel rows is small. Therefore, when the charging time of at least two first-type pixel rows 4 and two second-type pixel rows 6 with the same color are adjacent, after the Data line Data finishes charging the sub-pixels in the first-type pixel row 4 by using a certain charging voltage, the sub-pixels in the other second-type pixel row 6 can be charged only by jumping to another charging voltage with a small amplitude or without jumping.

For example, referring again to fig. 1 in the prior art, the Data line Data utilizes a very low charging voltage V_1BAfter the sub-pixels in the left-eye blue pixel row are charged, the charging voltage V needs to jump to a higher charging voltage_2RThe sub-pixels in the right eye green pixel row are charged and the voltage jump amplitude is large. In the embodiment of the present invention, referring to fig. 3, the Data line Data is goodWith very low charging voltage V_1BAfter the sub-pixels in the first blue pixel row 4B are charged, the same very low charge voltage V can be used with only a slight or no transition_2BThe sub-pixels in the second type blue pixel row 6B are charged.

Therefore, by using the driving method provided by the embodiment of the present invention, when charging the pixel rows in the display unit 1, the charging time of at least two pixel rows of the first type 4 and the second type 6 with the same color are adjacent to each other, so that the voltage jump frequency and the voltage jump amplitude of the Data line Data can be reduced, and the total power consumption of the display panel 100 during operation can be effectively reduced.

In one embodiment, as shown in fig. 4 to 7, fig. 4 is another schematic structural diagram of the display panel 100 according to an embodiment of the present invention, fig. 5 is a timing diagram corresponding to fig. 4, fig. 6 is a schematic structural diagram of the display panel 100 according to another embodiment of the invention, fig. 7 is a timing diagram corresponding to fig. 6, the display panel 100 further includes a plurality of scan line groups 8, the plurality of scan line groups 8 are in one-to-one correspondence with the plurality of display units 1 (in fig. 4 and 6, the scan line group corresponding to the ith display unit is denoted by reference numeral 8_ i, i is a positive integer greater than or equal to 1), the scan line group 8 is connected to the plurality of first-type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of first switches 9, and is connected to the plurality of second-type pixel rows 6 in the display unit 1 corresponding thereto through the plurality of second switches 10.

The display panel 100 further includes a clock line group 11, where the clock line group 11 includes a plurality of clock signal lines CK, the control electrodes of the first switches 9 corresponding to the first-type pixel rows 4 of the same color in the plurality of display units 1 are connected to the same clock signal line CK, and the control electrodes of the second switches 10 corresponding to the second-type pixel rows 6 of the same color in the plurality of display units 1 are connected to the same clock signal line CK.

Based on the above structure, in each driving period T, the scanning line group 8 outputs the first active level 12 for starting charging of the pixel rows, the plurality of clock signal lines CK output the second active level 13 for controlling the switches to be turned on in a time-sharing manner, the first switch 9 transmits the first active level 12 to the first-type pixel rows 4 connected thereto when turned on, the first-type pixel rows 4 are controlled to be charged, and the second switch 10 transmits the first active level 12 to the second-type pixel rows 6 connected thereto when turned on, and the second-type pixel rows 6 are controlled to be charged.

It should be noted that, based on the specific structure of the pixel circuit in the display panel 100, when the transistor for controlling the writing of the charging voltage in the pixel circuit is a p-type transistor, the first active level 12 is at a low level, and when the transistor for controlling the writing of the charging voltage in the pixel circuit is an n-type transistor, the first active level 12 is at a high level. The second active level 13 is low when the first switch 9 and the second switch 10 are p-type transistors, and the second active level 13 is high when the first switch 9 and the second switch 10 are n-type transistors.

Based on the above driving manner, the plurality of scan line groups 8 output the first active level 12 in a time-sharing manner, when a certain scan line group 8 outputs the first active level 12, the plurality of clock signal lines CK output the second active level 13 in a time-sharing manner, and control the first switch 9 and the second switch 10 connected thereto to be turned on in a time-sharing manner, so as to control the first active level 12 output by the scan line group 8 to be transmitted to the first type pixel row 4 through the turned-on first switch 9 or to be transmitted to the second type pixel row 6 through the turned-on second switch 10, thereby controlling the sub-pixels in the first type pixel row 4 or the second type pixel row 6 to write the charging voltage in a time-sharing manner.

This time sharing charge's drive mode has not only reduced the mutual crosstalk between the different pixel row, has improved the reliability of charging of first type pixel row 4 and second type pixel row 6 in display element 1, and a plurality of pixel rows only need be connected to same scanning line or same clock signal line moreover, have reduced the line quantity of walking that sets up in display panel 100, have reduced the wiring complexity.

In one embodiment, referring to fig. 4 again, the scan line group 8 includes a first scan signal output line Gout1, and the first scan signal output line Gout1 is connected to the plurality of first type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of first switches 9 and is connected to the plurality of second type pixel rows 6 in the display unit 1 corresponding thereto through the plurality of second switches 10.

The clock line group 11 includes a plurality of first clock signal lines CK1 and a plurality of second clock signal lines CK2, the control electrodes of the first switches 9 corresponding to the first-type pixel rows 4 of the same color in the plurality of display units 1 are connected to the same first clock signal line CK1, and the control electrodes of the second switches 10 corresponding to the second-type pixel rows 6 of the same color in the plurality of display units 1 are connected to the same second clock signal line CK2 (the first clock signal lines CK1 connected to the first-type red pixel rows 4R, the first-type green pixel rows 4G, and the first-type blue pixel rows 4B in fig. 4 are denoted by reference symbols CK1R, CK1G, and CK1B, respectively, and the second clock signal lines CK2 connected to the second-type red pixel rows 6R, the second-type green pixel rows 6G, and the second-type blue pixel rows 6B are denoted by reference symbols CK2R, CK2G, and CK2B, respectively).

Based on the above-described structure, referring again to fig. 5, in each driving period T, the first scan signal output line Gout1 outputs the first active level 12, the first clock signal line CK1 and the second clock signal line CK2 alternately outputs the second active level 13, the first-type pixel rows 4 and the second-type pixel rows 6 are controlled to be alternately charged, and the first-type pixel rows 4 and one of the second-type pixel rows 6 adjacent to the charging time thereof are the same color.

Taking the first active level 12 and the second active level 13 as high levels as an example, in one possible implementation, referring to fig. 5 again, one driving period T includes six periods. In the first period t1, the first clock signal line CK1R outputs a high level, the first switch 9 connected to the first red pixel row 4R is turned on, and the high level output by the first scan signal output line Gout1 controls the first red pixel row 4R to be charged on, so that the charging voltage V transmitted on the Data line Data is enabled_4RWritten into the sub-pixels of the first red pixel row 4R.

In the second period t2, the second clock signal line CK2R outputs a high level, the second switch 10 connected to the second type red pixel row 6R is turned on, and the high level output by the first scan signal output line Gout1 controls the second type red pixel row 6R to be charged on, so that the charging voltage V transmitted on the Data line Data is_6RWriting red pixels of the second typeRow 6R of subpixels.

In the third period t3, the first clock signal line CK1G outputs a high level, the first switch 9 connected to the first kind of green pixel row 4G is turned on, and the high level output by the first scan signal output line Gout1 controls the first kind of green pixel row 4G to be charged on, so that the charging voltage V transmitted on the Data line Data is_4GAnd written into the sub-pixels of the first type green pixel row 4G.

During a fourth period t4, the second clock signal line CK2G outputs a high level, the second switch 10 connected to the second type green pixel row 6G is turned on, and the high level output by the first scan signal output line Gout1 controls the second type green pixel row 6G to be charged on, so that the charging voltage V transmitted on the Data line Data is enabled_6GAnd written into the subpixels of the second type green pixel row 6G.

In the fifth period t5, the first clock signal line CK1B outputs a high level, the first switch 9 connected to the first blue pixel row 4B is turned on, and the high level output by the first scan signal output line Gout1 controls the first blue pixel row 4B to be charged on, so that the charging voltage V transmitted on the Data line Data_4BWritten into the sub-pixels of the first type blue pixel row 4B.

In the sixth period t6, the second clock signal line CK2B outputs a high level, the second switch 10 connected to the second type blue pixel row 6B is turned on, and the high level output by the first scan signal output line Gout1 controls the second type blue pixel row 6B to be charged on, so that the charging voltage V transmitted on the Data line Data is_6BInto the sub-pixels of the second type blue pixel row 6B.

In this embodiment, the order of charging the rows of pixels in the display unit 1 by the Data lines Data is: a first red pixel row of type 4R, a second red pixel row of type 6R, a first green pixel row of type 4G, a second green pixel row of type 6G, a first blue pixel row of type 4B, and a second blue pixel row of type 6B.

Based on the above driving manner, each first-type pixel row 4 in the display unit 1 has the same color as one of the second-type pixel rows 6 adjacent to the charging time thereof, and the driving manner enables the charging times of the first-type pixel rows 4 and the second-type pixel rows 6 having the same color to be adjacent as much as possible, so that the jump frequency and the jump amplitude of the voltage on the Data line Data are reduced to a greater extent, and the total power consumption of the display panel 100 is further reduced to a greater extent.

In contrast, the inventor has verified that, when the display panel 100 displays a plurality of pure color pictures or non-pure color pictures, in combination with table 1, IOVCC shown in table 1 is a digital voltage of the display panel 100, and VSP and VSN are analog voltages of the display panel 100, respectively, as can be seen from comparing the embodiment of the present invention with the prior art, by using the driving method provided by the embodiment of the present invention, the power consumption of the display panel 100 can be reduced by about 100 mW.

TABLE 1

In addition, based on the above driving manner, all the first-type pixel rows 4 and the second-type pixel rows 6 in one display unit 1 only need to be connected to one first scanning signal output line Gout1, the number of scanning signal output lines required in the display panel 100 is small, the space occupied by the scanning line group 8 in the display panel 100 is reduced, and thus the area of the non-display area of the display panel 100 can be correspondingly reduced.

In addition, it should be noted that, based on the above concept that the color of the first-type pixel row 4 and one of the second-type pixel rows 6 adjacent to the charging time thereof are the same, the embodiment of the present invention may also use other charging sequences to charge the pixel rows in the display unit 1.

Exemplarily, as shown in fig. 8, fig. 8 is another timing chart corresponding to fig. 4, and in one driving period T, the sequence of charging the data line to the pixel row in the display unit 1 is as follows: a first type red pixel row 4R, a second type red pixel row 6R, a first type blue pixel row 4B, a second type blue pixel row 6B, a first type green pixel row 4G, and a second type green pixel row 6G.

Alternatively, as shown in fig. 9, fig. 9 is still another timing chart corresponding to fig. 4, in one driving period T, the sequence of charging the pixel rows in the display unit 1 by the data lines is: a first type blue pixel row 4B, a second type blue pixel row 6B, a first type red pixel row 4R, a second type red pixel row 6R, a first type green pixel row 4G, and a second type green pixel row 6G.

Still alternatively, the charging order of the data lines to the pixel rows in the display unit 1 may also be: a first type green pixel row 4G, a second type green pixel row 6G, a first type red pixel row 4R, a second type red pixel row 6R, a first type blue pixel row 4B, and a second type blue pixel row 6B. Alternatively, it may be: the second-type red pixel row 6R, the first-type red pixel row 4R, the second-type blue pixel row 6B, the first-type blue pixel row 4B, the second-type green pixel row 6G, the first-type green pixel row 4G, and the like, that is, the driving sequence of the red, green, and blue pixel rows in the first-type pixel row or the second-type pixel row is not limited in the embodiment of the present invention, and the driving sequence of the first-type pixel row and the second-type pixel row is not limited in the embodiment of the present invention, which is not described in detail any more.

Alternatively, in another embodiment, referring to fig. 6 again, the scan line group 8 includes one second scan signal output line Gout2 and one third scan signal output line Gout3, the second scan signal output line Gout2 is connected to the plurality of first-type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of first switches 9, and the third scan signal output line Gout3 is connected to the plurality of second-type pixel rows 6 in the display unit 1 corresponding thereto through the plurality of second switches 10.

The clock line group 11 includes a plurality of third clock signal lines CK3, and for the first-type pixel lines 4 and the second-type pixel lines 6 of the same color in the plurality of display units 1, the gate of the first switch 9 corresponding to the first-type pixel line 4 and the gate of the second switch 10 corresponding to the second-type pixel line 6 are connected to the same third clock signal line CK3 (the third clock signal line connected to the first-type red pixel line 4R and the second-type red pixel line 6R in fig. 6 is denoted by reference sign CK3R, the third clock signal line connected to the first-type green pixel line 4G and the second-type green pixel line 6G is denoted by reference sign CK3G, and the third clock signal line connected to the first-type blue pixel line 4B and the second-type blue pixel line 6B is denoted by reference sign CK 3B).

Based on the above structure, please refer to fig. 7 again, the driving period T includes the first sub-period T11 and the second sub-period T12. In the first sub-period T11, the second scan signal output line Gout2 outputs the first active level 12, the plurality of third clock signal lines CK3 output the second active level 13 in a time-sharing manner, and the first switch 9 transmits the first active level 12 to the first-type pixel rows 4 when turned on, thereby controlling the first-type pixel rows 4 to be charged; in the second sub-period T12, the third scan signal output line Gout3 outputs the first active level 12, the plurality of third clock signal lines CK3 outputs the second active level 13 in a time-sharing manner, and the second switch 10 transmits the first active level 12 to the second type pixel rows 6 when turned on, thereby controlling the second type pixel rows 6 to be charged. And, there are the same color of the first kind pixel row 4 and the second kind pixel row 6 adjacent to each other in part of the charging time.

Taking the first active level 12 and the second active level 13 as high levels as an example, in a possible implementation manner, referring to fig. 7 again, in the first sub-period T11, the second scan signal output line Gout2 outputs high levels, first, the third clock signal line CK3R outputs high levels, the first switch 9 connected to the first red pixel row 4R is turned on, the high level output by the second scan signal output line Gout2 controls the first red pixel row 4R to be charged, and the Data line Data writes the charging voltage V to the sub-pixels of the first red pixel row 4R_4R(ii) a Then, the third clock signal line CK3G outputs a high level, the first switch 9 connected to the first green pixel row 4G is turned on, the high level output by the second scan signal output line Gout2 controls the first green pixel row 4G to be charged, and the Data line Data writes the charging voltage V to the subpixels of the first green pixel row 4G_4G(ii) a Then, the third clock signal line CK3B outputs a high level, the first switch 9 connected to the first blue pixel row 4B is turned on, the high level output by the second scan signal output line Gout2 controls the first blue pixel row 4B to be charged, and the Data line Data writes the charging voltage V into the sub-pixels of the first blue pixel row 4B_4B。

The third scan signal output line G during the second sub-period T12out3 outputs a high level, first, the third clock signal line CK3B outputs a high level, the second switch 10 connected to the second type blue pixel row 6B is turned on, the high level output from the third scan signal output line Gout3 controls the charging in the second type blue pixel row 6B to be turned on, and the Data line Data writes the charging voltage V to the sub-pixels of the second type blue pixel row 6B_6B(ii) a Then, the third clock signal line CK3G outputs a high level, the second switch 10 connected to the second type green pixel row 6G is turned on, the high level output by the third scanning signal output line Gout3 controls the second type green pixel row 6G to be charged and turned on, and the Data line Data writes the charging voltage V to the sub-pixels of the second type green pixel row 6G_6G(ii) a Then, the third clock signal line CK3R outputs a high level, the second switch 10 connected to the second red pixel row 6R is turned on, the high level output by the third scan signal output line Gout3 controls the second red pixel row 6R to be charged and turned on, and the Data line Data writes the charging voltage V into the sub-pixels of the second red pixel row 6R_6R。

As can be seen, in this embodiment, the order of charging the rows of pixels in the display unit 1 by the data lines is: a first type red pixel row 4R, a first type green pixel row 4G, a first type blue pixel row 4B, a second type blue pixel row 6B, a second type green pixel row 6G, and a second type red pixel row 6R. The charging times of the first type blue pixel rows 4B and the second type blue pixel rows 6B are adjacent.

Based on the above driving manner, on one hand, the light emitting colors of the first-type pixel row 4 charged last in the first sub-period T11 and the second-type pixel row 6 charged first in the second sub-period T12 are the same, and when the two pixel rows are charged, the data lines only need to perform slight voltage jump or do not need to perform jump, so that the total power consumption of the display panel 100 is reduced. On the other hand, the first pixel row 4 and the second pixel row 6 of the same color in the display panel 100 only need to be connected to the same third clock signal line CK3, so that the number of clock signal lines required in the display panel 100 is small, and the space occupied by the clock line group 11 in the display panel 100 is reduced.

In addition, it should be noted that, based on the above concept, the embodiment of the present invention may also use other charging sequences to charge the pixel rows in the display unit 1.

Illustratively, as shown in fig. 10, fig. 10 is another timing diagram corresponding to fig. 6, and in one driving period T, the sequence of charging the pixel rows in the display unit 1 by the data lines is as follows: a first type red pixel row 4R, a first type blue pixel row 4B, a first type green pixel row 4G, a second type green pixel row 6G, a second type blue pixel row 6B, and a second type red pixel row 6R.

Alternatively, as shown in fig. 11, fig. 11 is still another timing chart corresponding to fig. 6, in a driving period T, the sequence of charging the pixel rows in the display unit 1 by the data lines is: a first type blue pixel row 4B, a first type red pixel row 4R, a first type green pixel row 4G, a second type green pixel row 6G, a second type red pixel row 6R, and a second type blue pixel row 6B.

Further, in conjunction with fig. 7, 10 and 11, there is a second active level 13 corresponding to the first-type pixel row 4 and the second-type pixel row 6 which are adjacent in part of the charging time, which lasts from the charging of the first-type pixel row 4 to the charging of the second-type pixel row 6, or from the charging of the second-type pixel row 6 to the charging of the first-type pixel row 4.

For example, referring to fig. 7 again, in the driving period T, the second active level 13 corresponding to the first type blue pixel row 4B charged last in the first sub-period T11 and the second type blue pixel row 6B charged first in the second sub-period T12 lasts from the charging of the first type blue pixel row 4B to the charging of the second type blue pixel row 6B.

With this arrangement, when the third clock signal line CK3 controls the two first-type pixel rows 4 and the second-type pixel rows 6 to be charged, only the second active level 13 needs to be maintained, and the high and low levels do not need to jump, so that the voltage jump frequency on the third clock signal line CK3 is reduced, and the total power consumption of the display panel 100 is reduced to a greater extent.

In one embodiment, referring to fig. 5 and 7 again, one driving period T of two adjacent driving periods T is a first driving period T1, the other driving period T is a second driving period T2, and the first driving period T1 is earlier than the second driving period T2. The last charged pixel row in the first driving period T1 is a first pixel row, and the first charged pixel row in the second driving period T2 is a second pixel row, and the colors of the first pixel row and the second pixel row are the same.

For example, referring to fig. 5 again, taking the first driving period T1 and the second driving period T2 labeled in fig. 5 as an example, the first pixel row charged last in the first driving period T1 is the second kind of blue pixel row 6B, and the second pixel row charged first in the second driving period T2 is the second kind of blue pixel row 6B. Referring to fig. 7 again, taking the first driving period T1 and the second driving period T2 labeled in fig. 7 as an example, the first pixel row charged last in the first driving period T1 is the red pixel row of the second type 6R, and the second pixel row charged first in the second driving period T2 is the red pixel row of the first type 4R.

With this arrangement, in addition to making the colors of the first-type pixel row 4 and the second-type pixel row 6 adjacent to each other in at least two charging times in the single driving period T identical, the color of the last-charged pixel row in the first driving period T1 and the color of the first-charged pixel row in the second driving period T2 are also identical, and in the charging process, the charging times of the first-type pixel row 4 and the second-type pixel row 6 having the same color are made adjacent to each other as much as possible, so that the hopping frequency and the hopping width of the charging voltage on the data lines are reduced to a greater extent, and the total power consumption of the display panel 100 is reduced to a greater extent.

Further, referring to fig. 5 and 7 again, the second active level 13 corresponding to the first pixel row and the second pixel row continues from the beginning of charging the first pixel row to the end of charging the second pixel row, so that the voltage jump frequency on a portion of the third clock signal lines can be reduced, and the total power consumption of the display panel 100 can be further reduced.

Based on the same inventive concept, an embodiment of the present invention further provides a display apparatus, please refer to fig. 2 and fig. 3 again, the display apparatus includes a display panel 100, the display panel 100 includes a plurality of display units 1 arranged along a first direction, the display units 1 include first-type pixel units 2 and second-type pixel units 3, the first-type pixel units 2 include a plurality of first-type pixel rows 4 arranged along the first direction, and the second-type pixel units 3 include a plurality of second-type pixel rows 6 arranged along the first direction.

In one display unit 1, there are at least two pixel rows of the first type 4 and pixel rows of the second type 6 of the same color, which have adjacent charging times.

The first-type pixel lines 4 are left-eye pixel lines, and the second-type pixel lines 6 are right-eye pixel lines, or the first-type pixel lines 4 are right-eye pixel lines, and the second-type pixel lines 6 are left-eye pixel lines. The left-eye pixel lines are used for presenting a left-eye image, the right-eye pixel lines are used for presenting a right-eye image, and the left-eye image and the right-eye image have a displacement difference, so that a stereoscopic 3D image can be formed after synthesis.

In the embodiment of the present invention, by making the charging time of at least two first-type pixel rows 4 and second-type pixel rows 6 with the same color adjacent to each other, after the data line charges the sub-pixels in the first-type pixel row 4 with a certain charging voltage, the sub-pixels in the other second-type pixel row 6 can be charged only by jumping to another charging voltage with a small amplitude or without jumping, so that the voltage jump frequency and the voltage jump amplitude on the data line are effectively reduced, and the total power consumption of the display panel 100 is further effectively reduced.

In one embodiment, referring to fig. 4 to 7 again, the display panel 100 further includes a plurality of scan line groups 8, the plurality of scan line groups 8 correspond to the plurality of display units 1 one by one, and the scan line groups 8 are connected to the plurality of first-type pixel rows 4 in the display units 1 corresponding thereto through the plurality of first switches 9 and connected to the plurality of second-type pixel rows 6 in the display units 1 corresponding thereto through the plurality of second switches 10. The display panel 100 further includes a clock line group 11, where the clock line group 11 includes a plurality of clock signal lines, the control electrodes of the first switches 9 corresponding to the first-type pixel rows 4 of the same color in the plurality of display units 1 are connected to the same clock signal line, and the control electrodes of the second switches 10 corresponding to the second-type pixel rows 6 of the same color in the plurality of display units 1 are connected to the same clock signal line.

Based on the above structure, in each driving period T, the scanning line group 8 outputs the first active level 12 for starting charging of the pixel rows, the plurality of clock signal lines output the second active level 13 for controlling the switches to be turned on in a time-sharing manner, the first switch 9 transmits the first active level 12 to the first-type pixel rows 4 connected thereto when turned on, the first-type pixel rows 4 are controlled to be charged, and the second switch 10 transmits the first active level 12 to the second-type pixel rows 6 connected thereto when turned on, and the second-type pixel rows 6 are controlled to be charged.

So set up, the first type pixel row 4 and the second type pixel row 6 in the display element 1 charge the timesharing and go on, not only reduced the mutual crosstalk between the different pixel rows, improved the reliability of charging of first type pixel row 4 and second type pixel row 6 in the display element 1, and a plurality of pixel rows only need be connected to same scanning line or same clock signal line, the line quantity of walking that has reduced to set up in display panel 100, wiring complexity has been reduced, also the corresponding area that reduces display panel 100 non-display area.

In one embodiment, referring again to fig. 4 and 5, the scan line group 8 includes a first scan signal output line Gout1, the first scan signal output line Gout1 is connected to the plurality of first-type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of first switches 9, and is connected to the plurality of second-type pixel rows 6 in the display unit 1 corresponding thereto through the plurality of second switches 10.

The clock line group 11 includes a plurality of first clock signal lines CK1 and a plurality of second clock signal lines CK2, the control electrodes of the first switches 9 corresponding to the first-type pixel rows 4 of the same color in the plurality of display units 1 are connected to the same first clock signal line CK1, and the control electrodes of the second switches 10 corresponding to the second-type pixel rows 6 of the same color in the plurality of display units 1 are connected to the same second clock signal line CK 2.

In one display unit 1, the first-type pixel rows 4 and the second-type pixel rows 6 are alternately charged, and the first-type pixel rows 4 and one of the second-type pixel rows 6 adjacent to the charging time thereof are the same color.

The specific charging process has been described in detail in the above embodiments, and is not described herein again.

With this arrangement, on one hand, each first-type pixel row 4 in the display unit 1 has the same color as one of the second-type pixel rows 6 adjacent to the charging time thereof, and the driving method makes the charging times of the first-type pixel rows 4 and the second-type pixel rows 6 having the same color adjacent to each other as much as possible, so as to reduce the jump frequency and jump amplitude of the voltage on the Data lines Data to a greater extent, and further reduce the total power consumption of the display panel 100 to a greater extent. On the other hand, all the first-type pixel rows 4 and the second-type pixel rows 6 in one display unit 1 only need to be connected to one first scanning signal output line Gout1, the number of scanning signal output lines required in the display panel 100 is small, and the space occupied by the scanning line group 8 in the display panel 100 is reduced, so that the area of the non-display area of the display panel 100 is correspondingly reduced.

Further, as shown in fig. 12, fig. 12 is another schematic structural diagram of the display device according to the embodiment of the present invention, the display device further includes a first shift register 200 and a second shift register 300, the first shift register 200 includes a plurality of cascaded first shift units 201, and the first shift units 201 are connected to first scan signal output lines Gout1 corresponding to odd display units 1; the second shift register 300 includes a plurality of second shift units 301 connected in cascade, and the second shift units 301 are connected to the first scan signal output lines Gout1 corresponding to an even number of display units 1.

The first shift register 200 and the first switch 9 and the second switch 10 connected thereto are located at a first side of the display unit 1, the second shift register 300 and the first switch 9 and the second switch 10 connected thereto are located at a second side of the display unit 1, and the first side and the second side are opposite sides of the display unit 1.

Note that, with the orientation of the user facing the display panel 100 as a reference, the first side is the left side of the display unit 1 and the second side is the right side of the display unit 1, or the first side is the right side of the display unit 1 and the second side is the left side of the display unit 1.

By adopting the above arrangement, all the first-type pixel rows 4 and the second-type pixel rows 6 included in one display unit 1 only need to be connected with one first shifting unit 201 or one second shifting unit 301, the number of the shifting units required in the display panel 100 is small, and the space occupied by the shifting register area in the frame area of the display panel 100 is reduced. In addition, compared with the case that all the shift registers and the switches are arranged on only one side of the display unit 1, the shift registers and the switches are distributed on two opposite sides of the display unit 1, and the shift registers and the switches occupy smaller spaces on the two sides, so that the narrow frame design of the display device is facilitated.

Alternatively, in another embodiment, referring to fig. 6 and 7 again, the scan line group 8 includes one second scan signal output line Gout2 and one third scan signal output line Gout3, wherein the second scan signal output line Gout2 is electrically connected to the plurality of first type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of first switches 9, and the third scan signal output line Gout3 is electrically connected to the plurality of first type pixel rows 4 in the display unit 1 corresponding thereto through the plurality of second switches 10.

The clock line group 11 includes a plurality of third clock signal lines CK3, and for the first-type pixel rows 4 and the second-type pixel rows 6 of the same color in the plurality of display units 1, the gates of the first switches 9 connected to the first-type pixel rows 4 and the gates of the second switches 10 connected to the second-type pixel rows 6 are connected to the same third clock signal line CK 3.

In one display unit 1, the charging time of the first type pixel row 4 is earlier than the charging time of the second type pixel row 6, or the charging time of the second type pixel row 6 is earlier than the charging time of the first type pixel row 4, and the colors of the first type pixel row 4 and the second type pixel row 6 adjacent to the charging time are the same.

With such a configuration, on the one hand, in one display unit 1, the light emitting colors of the first-type pixel row 4 charged last and the second-type pixel row 6 charged first are the same, and when the two pixel rows are charged, the data line only needs to perform slight voltage jump or does not need to perform jump, so that the total power consumption of the display panel 100 is reduced. On the other hand, the first pixel row 4 and the second pixel row 6 of the same color in the display panel 100 only need to be connected to the same third clock signal line CK3, so that the number of clock signal lines required in the display panel 100 is small, and the space occupied by the clock line group 11 in the display panel 100 is reduced.

Further, as shown in fig. 13, fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention; the display device further includes a third shift register 400 and a fourth shift register 500, the third shift register 400 includes a plurality of third shift cells 401 connected in cascade, the third shift cells 401 are connected to a second scan signal output line Gout 2; the fourth shift register 500 includes a plurality of fourth shift units 501 cascaded, and the fourth shift units 501 are connected to the third scan signal output line Gout 3.

The third shift register 400 and the first switch 9 connected thereto are located at a first side of the display unit 1, and the fourth shift register 500 and the second switch 10 connected thereto are located at a second side of the display unit 1, the first side and the second side being opposite sides of the display unit 1.

With the above arrangement, all the first-type pixel rows 4 included in one display unit 1 are connected to one third shifting unit 401, and all the second-type pixel rows 6 included in one display unit 1 are connected to one fourth shifting unit 501. Compared with the mode that all the shift registers and the switches are arranged on only one side of the display unit 1, the shift registers and the switches are distributed on two opposite sides of the display unit 1, and the shift registers and the switches occupy smaller spaces on the two sides, so that the narrow frame design of the display device is facilitated.

In one embodiment, referring to fig. 4 and fig. 6 again, the display device further includes a display area 600 and a non-display area 700 surrounding the display area 600, the non-display area 700 including a driving chip 800; the clock signal line CK extends around the display area 600 in the non-display area 700, and both ends of the clock signal line CK are electrically connected to the driving chip 800, respectively. At this time, the driving chip 800 provides the clock signal to the clock signal line CK at two ends of the clock signal line CK at the same time, which not only improves the signal transmission rate on the clock signal line CK, but also reduces the voltage drop of the clock signal during transmission, and improves the driving capability of the clock signal to the first switch 9 or the second switch 10.

In one embodiment, for two display units 1 with adjacent charging time, one display unit 1 is a first display unit, the other display unit 1 is a second display unit, and the charging time of the first display unit is earlier than that of the second display unit; the last charged pixel line in the first display unit is a first pixel line, the last charged pixel line in the second display unit is a second pixel line, and the first pixel line and the second pixel line are the same in color.

Correspondingly, in conjunction with fig. 5 and 7, the driving period T for charging the first display cell is the first driving period T1, the driving period T for charging the second display cell is the second driving period T2, and the first driving period T1 is earlier than the second driving period T2.

Taking the first driving period T1 and the second driving period T2 labeled in fig. 5 as an example, the first pixel row charged last in the first driving period T1 (first display unit) is the second kind of blue pixel row 6B, and the second pixel row charged first in the second driving period T2 (second display unit) is the second kind of blue pixel row 6B. Referring to fig. 7 again, taking the first driving period T1 and the second driving period T2 labeled in fig. 7 as an example, the first pixel row charged last in the first driving period T1 (the first display unit) is the red pixel row of the second type 6R, and the second pixel row charged first in the second driving period T2 (the second display unit) is the red pixel row of the first type 4R.

At this time, in addition to the fact that at least two first-type pixel rows 4 and second-type pixel rows 6 with adjacent charging times exist in a single display unit 1, the colors of the last-charged pixel row in the first display unit and the first-charged pixel row in the second display unit are also the same, and in the charging process, the charging times of the first-type pixel row 4 and the second-type pixel row 6 with the same color are adjacent as much as possible, so that the jump frequency and the jump amplitude of the charging voltage on the data line are reduced to a greater extent, and the total power consumption of the display panel 100 is further reduced to a greater extent.

In one embodiment, referring again to fig. 4, the first-type pixel rows 4 and the second-type pixel rows 6 are alternately arranged in the first direction; the first-type pixel rows 4 and the second-type pixel rows 6 form a plurality of pixel rows arranged along the first direction, the 2n-1 th pixel rows and the 2 n-th pixel rows have the same color, and n is a positive integer greater than or equal to 1.

In one possible implementation, referring to fig. 4 again, in one display unit 1, the first red pixel rows 4R, the second red pixel rows 6R, the first green pixel rows 4G, the second green pixel rows 6G, the first blue pixel rows 4B, and the second blue pixel rows 6B are arranged along the first direction.

In the above arrangement, the first-type pixel lines 4 and the second-type pixel lines 6 are alternately arranged, and any two adjacent first-type pixel lines 4 or any two adjacent second-type pixel lines 6 are close to each other, so that the left-eye image represented by the first-type pixel lines 4 and the right-eye image represented by the second-type pixel lines 6 have continuous brightness, no obvious dark region appears in the image, and the display effect of the left-eye image and the right-eye image is improved.

Alternatively, in another implementation, as shown in fig. 14, fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention, in which the first-type pixel units 2 and the second-type pixel units 3 are alternately arranged in the first direction.

For example, referring to fig. 14 again, in one display unit 1, the first red pixel row 4R, the first green pixel row 4G, the first blue pixel row 4B, the second red pixel row 6R, the second green pixel row 6G, and the second blue pixel row 6B are arranged along the first direction.

In the above arrangement, the first-type pixel units 2 and the second-type pixel units 3 are arranged in a crossed manner, that is, the plurality of first-type pixel lines 4 included in the first-type pixel units 2 are arranged continuously, and the plurality of second-type pixel lines 6 included in the second-type pixel units 3 are arranged continuously, which can reduce mutual crosstalk between the left-eye image and the right-eye image.

In addition, it should be noted that, in the embodiment of the present invention, the arrangement of the pixel rows in the display unit 1 may be matched with the arrangement of the scan line group 8. For example, referring again to fig. 4, when the scan line group 8 includes the first scan signal output line Gout1, the first type pixel rows 4 and the second type pixel rows 6 may be alternately arranged in the first direction, and thus, the plurality of pixel rows in the display unit 1 may be sequentially scanned in the first direction. Alternatively, referring again to fig. 14, when the scan line group 8 includes the second scan signal output line Gout2 and the third scan signal output line Gout3, the first type pixel cells 2 and the second type pixel cells 3 may be alternately arranged in the first direction, thereby sequentially scanning a plurality of pixel rows in the display unit 1 in the first direction.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A driving method of a display panel is characterized in that,

2. The driving method according to claim 1,

the display panel further includes:

the scanning line groups are in one-to-one correspondence with the display units and are connected with the first pixel rows in the display units corresponding to the scanning line groups through a plurality of first switches and the second pixel rows in the display units corresponding to the scanning line groups through a plurality of second switches;

the control electrode of the first switch corresponding to the first type of pixel row with the same color in the display units is connected with the same clock signal line, and the control electrode of the second switch corresponding to the second type of pixel row with the same color in the display units is connected with the same clock signal line;

in each driving period, the scanning line group outputs a first effective level for starting pixel row charging, the clock signal lines output a second effective level for controlling switch conduction in a time-sharing manner, the first effective level is transmitted to the first type of pixel rows connected with the first effective level when the first switch is conducted to control the first type of pixel rows to be charged, and the first effective level is transmitted to the second type of pixel rows connected with the second effective level when the second switch is conducted to control the second type of pixel rows to be charged.

3. The driving method according to claim 2,

the scanning line group comprises a first scanning signal output line which is connected with a plurality of first pixel rows in the display unit corresponding to the first scanning signal output line through a plurality of first switches and is connected with a plurality of second pixel rows in the display unit corresponding to the second scanning signal output line through a plurality of second switches;

the clock line group comprises a plurality of first clock signal lines and a plurality of second clock signal lines, the control electrodes of the first switches corresponding to the first pixel rows with the same color in the display units are connected with the same first clock signal line, and the control electrodes of the second switches corresponding to the second pixel rows with the same color in the display units are connected with the same second clock signal line;

in each of the driving periods, the first scan signal output line outputs the first active level, the first clock signal line and the second clock signal line alternately output the second active level, the first type of pixel row and the second type of pixel row are controlled to be alternately charged, and the first type of pixel row and one of the second type of pixel rows adjacent to a charging time thereof are the same in color.

4. The driving method according to claim 2,

the scanning line group comprises a second scanning signal output line and a third scanning signal output line, the second scanning signal output line is connected with a plurality of first pixel rows in the display unit corresponding to the second scanning signal output line through a plurality of first switches, and the third scanning signal output line is connected with a plurality of second pixel rows in the display unit corresponding to the third scanning signal output line through a plurality of second switches;

the clock line group comprises a plurality of third clock signal lines, and for the first type of pixel lines and the second type of pixel lines with the same color in the plurality of display units, the control electrode of the first switch corresponding to the first type of pixel lines and the control electrode of the second switch corresponding to the second type of pixel lines are connected with the same third clock signal line;

the driving period includes a first sub-period and a second sub-period;

in the first sub-period, the second scanning signal output line outputs the first effective level, a plurality of third clock signal lines output the second effective level in a time-sharing mode, and the first switch transmits the first effective level to the first pixel rows when being turned on to control the first pixel rows to be charged;

in the second sub-period, the third scanning signal output line outputs the first effective level, a plurality of third clock signal lines output the second effective level in a time-sharing mode, and the second switch transmits the first effective level to the second type of pixel rows when being turned on to control the second type of pixel rows to be charged;

and the colors of the first-type pixel rows and the second-type pixel rows adjacent to each other in partial charging time are the same.

5. The driving method according to claim 4,

and the second effective level corresponding to the first-class pixel row and the second-class pixel row which are adjacent in partial charging time exists, and the charging is continued from the first-class pixel row charging to the second-class pixel row charging, or the charging is continued from the second-class pixel row charging to the first-class pixel row charging.

6. The driving method according to claim 2,

one of the two adjacent driving periods is a first driving period, and the other driving period is a second driving period, wherein the first driving period is earlier than the second driving period;

the last charged pixel row in the first driving period is a first pixel row, the first charged pixel row in the second driving period is a second pixel row, and the first pixel row and the second pixel row are the same in color.

7. The driving method according to claim 6,

a second active level corresponding to the first pixel row and the second pixel row continues from the beginning of the first pixel row charging to the end of the second pixel row charging.

8. A display device, comprising:

9. The display device according to claim 8, wherein the display panel further comprises:

the control electrode of the first switch corresponding to the first type pixel row of the same color in the display units is connected with the same clock signal line, and the control electrode of the second switch corresponding to the second type pixel row of the same color in the display units is connected with the same clock signal line.

10. The display device according to claim 9,

in one of the display units, the first-type pixel rows and the second-type pixel rows are alternately charged, and the first-type pixel rows and one of the second-type pixel rows adjacent to the charging time thereof are the same in color.

11. The display device according to claim 10, further comprising:

the first shift register comprises a plurality of cascade first shift units, and the first shift units are connected with the first scanning signal output lines corresponding to the odd display units;

the second shift register comprises a plurality of cascaded second shift units, and the second shift units are connected with the first scanning signal output lines corresponding to an even number of the display units;

the first shift register, the first switch connected with the first shift register and the second switch are located on a first side of the display unit, the second shift register, the first switch connected with the second shift register and the second switch are located on a second side of the display unit, and the first side and the second side are opposite sides of the display unit.

12. The display device according to claim 9,

the scanning line group comprises a second scanning signal output line and a third scanning signal output line, wherein the second scanning signal output line is electrically connected with a plurality of first pixel rows in the display unit corresponding to the second scanning signal output line through a plurality of first switches, and the third scanning signal output line is electrically connected with a plurality of first pixel rows in the display unit corresponding to the third scanning signal output line through a plurality of second switches;

the clock line group comprises a plurality of third clock signal lines, and for the first type of pixel lines and the second type of pixel lines of the same color in the plurality of display units, the control electrode of the first switch connected with the first type of pixel lines and the control electrode of the second switch connected with the second type of pixel lines are connected with the same third clock signal line;

in one display unit, the charging time of the first type pixel row is earlier than that of the second type pixel row, or the charging time of the second type pixel row is earlier than that of the first type pixel row, and the first type pixel row and the second type pixel row adjacent to each other in part of the charging time have the same color.

13. The display device according to claim 12, further comprising:

a third shift register including a plurality of cascaded third shift units, the third shift units being connected to the second scan signal output lines;

a fourth shift register including a plurality of cascade-connected fourth shift units, the fourth shift units being connected to the third scanning signal output lines;

the third shift register and the first switch connected with the third shift register are located on the first side of the display unit, the fourth shift register and the second switch connected with the fourth shift register are located on the second side of the display unit, and the first side and the second side are opposite sides of the display unit.

14. The display device according to claim 9,

the display device further comprises a display area and a non-display area surrounding the display area, wherein the non-display area comprises a driving chip;

the clock signal wire extends around the display area in the non-display area, and two ends of the clock signal wire are respectively electrically connected with the driving chip.

15. The display device according to claim 8,

for two display units with adjacent charging time, one display unit is a first display unit, the other display unit is a second display unit, and the charging time of the first display unit is earlier than that of the second display unit;

the last charged pixel line in the first display unit is a first pixel line, the last charged pixel line in the second display unit is a second pixel line, and the first pixel line and the second pixel line are the same in color.

16. The display device according to claim 8,

the first pixel rows and the second pixel rows are alternately arranged in the first direction;

the first pixel rows and the second pixel rows form a plurality of pixel rows arranged along the first direction, the 2n-1 th pixel rows and the 2 n-th pixel rows have the same color, and n is a positive integer greater than or equal to 1.

17. The display device according to claim 8,

the first type pixel units and the second type pixel units are alternately arranged in the first direction.