CN110517636B

CN110517636B - Organic light emitting display panel, display device and driving method

Info

Publication number: CN110517636B
Application number: CN201910815787.XA
Authority: CN
Inventors: 王宝男
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2019-08-30
Filing date: 2019-08-30
Publication date: 2021-03-26
Anticipated expiration: 2039-08-30
Also published as: CN110517636A

Abstract

The embodiment of the application provides an organic light-emitting display panel, a display device and a driving method, relates to the technical field of display, and can improve the picture refresh rate under higher resolution. The organic light emitting display panel includes: the first data line corresponds to each column of sub-pixels, and the first data line is electrically connected with odd-numbered rows of sub-pixels in the corresponding column of sub-pixels; the second data line is electrically connected with the even-numbered rows of the sub-pixels in the corresponding column; the multi-path selector is used for controlling the connection or disconnection between any one of the first gating end and the second gating end and the input end.

Description

Organic light emitting display panel, display device and driving method

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to an organic light emitting display panel, a display device, and a driving method.

Background

With the development of Display technology, Organic Light Emitting Display (OLED) panels are increasingly widely used due to their excellent characteristics of self-luminescence, high brightness, wide viewing angle, fast response, etc. In addition, the resolution of the organic light emitting display panel is higher and higher, however, the conventional organic light emitting display panel includes a plurality of sub-pixels distributed in an array, each row of sub-pixels corresponds to one scan line, each column of sub-pixels corresponds to one data line, the organic light emitting display panel is driven in a line-by-line scanning manner, that is, in each frame time, the scan lines sequentially provide a conducting level to the pixel driving circuits of the sub-pixels in the corresponding row, when the scan lines provide a conducting level to one row of sub-pixels, a data voltage on the data lines is transmitted to the pixel driving circuits of the sub-pixels in the row to charge the sub-pixels in the row, and so on, when all the sub-pixels in the row are charged once, the refresh of one frame is completed, the frame refresh rate is the number of frame refresh times in only one second time, the refresh rate is higher, and the frame display is smoother.

In the current driving mode, when the frame refresh rate is high, the charging is insufficient due to the large number of pixel rows and the complex structure of the pixel driving circuit; if the charging time is guaranteed, a higher frame refresh rate cannot be achieved due to a larger number of pixel rows.

Disclosure of Invention

The embodiment of the application provides an organic light-emitting display panel, a display device and a driving method, which can improve the picture refresh rate under higher resolution.

In one aspect, an embodiment of the present application provides an organic light emitting display panel, including:

a plurality of sub-pixels arranged in a plurality of rows and a plurality of columns;

the scanning line corresponds to each row of sub-pixels and is electrically connected with the corresponding row of sub-pixels;

the first data line corresponds to each column of sub-pixels, and the first data line is electrically connected with odd-numbered rows of sub-pixels in the corresponding column of sub-pixels;

the second data line is electrically connected with the even-numbered rows of the sub-pixels in the corresponding column;

the multi-channel selector comprises a first gating end, a second gating end and an input end, wherein the first gating end is electrically connected to the corresponding first data line, the second gating end is electrically connected to the corresponding second data line, the input end is electrically connected to the corresponding source signal line, and the multi-channel selector is used for controlling the connection or the disconnection between any one of the first gating end and the second gating end and the input end.

Optionally, the scan lines corresponding to every two rows of sub-pixels are electrically connected to each other.

Optionally, the plurality of sub-pixels arranged in a plurality of rows and a plurality of columns include sub-pixels of different colors, each of the first data lines is electrically connected to the sub-pixels of the same color, and each of the second data lines is electrically connected to the sub-pixels of the same color.

Optionally, the plurality of subpixels arranged in multiple rows and multiple columns includes a plurality of column repeating units, each column repeating unit includes a plurality of subpixel columns, and the plurality of subpixel columns includes a heterochromatic subpixel column and a pure-chromatic subpixel column;

the pure color sub-pixel column is composed of sub-pixels of the same color, and the mixed color sub-pixel column is composed of sub-pixels of different colors.

Optionally, the plurality of sub-pixels arranged in multiple rows and multiple columns include a red sub-pixel, a green sub-pixel and a blue sub-pixel;

the plurality of sub-pixel columns comprise a plurality of mixed color sub-pixel columns, and the plurality of mixed color sub-pixel columns comprise a first mixed color sub-pixel column and a second mixed color sub-pixel column;

in each first variegated sub-pixel column, the sub-pixels in the odd rows are red sub-pixels, and the sub-pixels in the even rows are blue sub-pixels;

in each second variegated sub-pixel column, the sub-pixels in the odd-numbered rows are blue sub-pixels, and the sub-pixels in the even-numbered rows are red sub-pixels;

the pure color sub-pixel column is composed of green sub-pixels.

Optionally, each of the column repeating units includes the first mixed color sub-pixel column, the pure color sub-pixel column, and the second mixed color sub-pixel column which are adjacent in sequence.

Optionally, the columns of pure color sub-pixels comprise a first column of pure color sub-pixels and a second column of pure color sub-pixels;

each column repeating unit comprises the first variegated sub-pixel column, the first pure-color sub-pixel column, the second variegated sub-pixel column and the second pure-color sub-pixel column which are adjacent in sequence.

Optionally, the organic light emitting display panel further includes:

a first gate control signal line and a second gate control signal line;

each of the multiplexers includes a first switching transistor and a second switching transistor;

the first end of the first switch transistor is electrically connected to the first gating end, the second end of the first switch transistor is electrically connected to the input end, and the control end of the first switch transistor is electrically connected to the first gating control signal line;

the first end of the second switch transistor is electrically connected to the second gating end, the second end of the second switch transistor is electrically connected to the input end, and the control end of the second switch transistor is electrically connected to the second gating control signal line.

On the other hand, an embodiment of the present application further provides a display device including the organic light emitting display panel.

On the other hand, an embodiment of the present application further provides a driving method for the organic light emitting display panel, where the driving method includes:

driving the organic light emitting display panel by taking a frame as a period, wherein each frame comprises a plurality of driving time periods, the ith driving time period corresponds to the sub-pixels of the 2i-1 th row and the 2i th row, the value of i is 1, 2, 3, … and n, n is the total row number of the sub-pixels, and each driving time period sequentially comprises a first moment, a second moment and a third moment;

at the first moment of the ith driving period, one of the first gating end and the second gating end of each multiplexer is conducted with the input end, and the other of the first gating end and the second gating end of each multiplexer is cut off with the input end;

at the second moment of the ith driving period, one of the first gating end and the second gating end of each multiplexer is cut off from the input end, and the other of the first gating end and the second gating end of each multiplexer is conducted from the input end;

at the third moment of the ith driving period, the first gating end and the input end of each multiplexer are cut off, the second gating end and the input end of each multiplexer are cut off, and the on level is supplied to the scanning lines corresponding to the sub-pixels of the 2i-1 th row and the 2 i-th row.

Optionally, providing an off-level to the scan line corresponding to each row of sub-pixels at a first time and a second time of the ith driving period;

and at the third moment of the ith driving period, providing an off level for the scanning line corresponding to the sub-pixels of each row except the 2i-1 th row and the 2 i-th row.

Optionally, at a first time of the ith driving period, the first gating terminal and the input terminal of each multiplexer are turned on, the second gating terminal and the input terminal of each multiplexer are turned off, and the off level is provided for the scanning lines corresponding to the sub-pixels in the 2i-1 th and 2 i-th rows;

at the second moment of the ith driving period, the first gating end and the input end of each multiplexer are cut off, the second gating end and the input end of each multiplexer are connected, the on level is provided for the scanning line corresponding to the sub-pixel of the 2i-1 th row, and the off level is provided for the scanning line corresponding to the sub-pixel of the 2i th row.

Optionally, when the value of i is 2, 3, …, n;

at the first moment of the ith driving period, providing an on level for the scanning line corresponding to the sub-pixels of the 2i-2 th row, and providing an off level for the scanning line corresponding to the sub-pixels of each row except the 2i-2 nd row;

at the second moment of the ith driving period, providing a turn-on level for the scanning line corresponding to the sub-pixel of the 2i-1 th row, and providing a turn-off level for the scanning line corresponding to the sub-pixel of each row except the 2i-1 th row;

In the organic light emitting display panel, the display device and the driving method in the embodiment of the application, the first data line and the second data line corresponding to each column of sub-pixels are arranged and respectively connected with the sub-pixels in odd rows and even rows, and the multiplexer corresponding to each column of sub-pixels is matched.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.

Fig. 1 is a schematic structural view of a partial region of an organic light-emitting display panel according to an embodiment of the present application;

FIG. 2 is a timing diagram of a signal corresponding to the structure of FIG. 1;

FIG. 3 is a schematic diagram of a sub-pixel arrangement corresponding to FIG. 1;

fig. 4 is a schematic structural view of a partial region of another organic light-emitting display panel according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a sub-pixel arrangement corresponding to FIG. 4;

fig. 6 is a schematic structural view of a partial region of another organic light-emitting display panel according to an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a display device according to an embodiment of the present application;

FIG. 8 is a timing diagram of an organic light emitting display panel according to an embodiment of the present disclosure;

fig. 9 is another signal timing diagram of an organic light emitting display panel according to an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a partial region of an organic light emitting display panel in an embodiment of the present application, and fig. 2 is a signal timing diagram corresponding to the structure in fig. 1, where an embodiment of the present application provides an organic light emitting display panel, including: a plurality of sub-pixels 1 arranged in a plurality of rows and a plurality of columns, wherein the row direction is h1, and the column direction is h 2; a scanning line S corresponding to each row of the sub-pixels 1, wherein the scanning line S is electrically connected to the corresponding row of the sub-pixels 1; the first data line D1 corresponding to each column of sub-pixels 1, the first data line D1 being electrically connected to the sub-pixels 1 in odd rows of the corresponding column of sub-pixels 1; the second data line D2 corresponding to each column of sub-pixels 1, the second data line D2 being electrically connected to the sub-pixels 1 in the even rows of the corresponding column of sub-pixels 1; the multiplexer mux comprises a first gate terminal O1, a second gate terminal O2 and an input terminal IN, the first gate terminal O1 is electrically connected to the corresponding first data line D1, the second gate terminal O2 is electrically connected to the corresponding second data line D2, the input terminal IN is electrically connected to the corresponding source signal line SR, the source signal line SR is electrically connected to a driving chip (not shown IN the figure) for providing data voltage to the source signal line SR, and the multiplexer mux is used for controlling the connection or disconnection between any one of the first gate terminal O1 and the second gate terminal O2 and the input terminal IN.

Specifically, for example, in the driving method corresponding to the timing sequence shown in fig. 2, the organic light emitting display panel is driven in a frame period, each frame includes a plurality of driving periods, the ith driving period corresponds to the 2i-1 th and 2i th rows of sub-pixels 1, i has values of 1, 2, 3, …, n is the total number of rows of sub-pixels 1, i.e., the 1 st driving period T1 corresponds to the 1 st and 2 nd rows of sub-pixels 1, the 2 nd driving period T2 corresponds to the 3 rd and 4 th rows of sub-pixels 1, and so on, each driving period corresponds to two rows of sub-pixels 1. In fig. 1, S1, S2, S3 and S4 respectively represent the scanning lines S corresponding to the sub-pixels 1 in the

rows

1, 2, 3 and 4, and in fig. 2, S1, S2, S3 and S4 respectively represent the signals on the scanning lines S1, S2, S3 and S4, and in the embodiment of the present application, the description is made by taking the high level as the off level and the low level as the on level, that is, when the scanning lines S are at the on level, the voltage on the data lines is transmitted to the sub-pixels 1 in the row for charging, and when the scanning lines S are at the off level, the voltage on the data lines cannot be transmitted to the sub-pixels 1 in the row, that is, the sub-pixels 1 in the row for not charging. Ck1 and ck2 IN fig. 2 are used to indicate the gating state of each multiplexer mux, and indicate that the first gating terminal O1 of the multiplexer mux is turned off from the input terminal IN when ck1 is high, that the first gating terminal O1 of the multiplexer mux is turned on from the input terminal IN when ck1 is low, that the second gating terminal O2 of the multiplexer mux is turned off from the input terminal IN when ck2 is high, and that the second gating terminal O2 of the multiplexer mux is turned on from the input terminal IN when ck2 is low. Each driving period sequentially includes a first time T1, a second time T2 and a third time T3, at the first time T1 of the first driving period T1, the scan lines S1 and S2 provide on levels, the other scan lines S all provide off levels, the first gate terminal O1 and the input terminal IN of each multiplexer mux are turned on, the second gate terminal O2 and the input terminal IN are turned off, the data voltage on the source signal line SR is transmitted to each first data line D1, and the data voltage on the first data line D1 is transmitted to the first row sub-pixel 1 for charging; at a second time T2 of the first driving period T1, the scan lines S1 and S2 provide an on level, the other scan lines S each provide an off level, a gap between the first gate terminal O1 and the input terminal IN each multiplexer mux is turned off, the second gate terminal O2 and the input terminal IN are turned on, and the data voltage on the source signal line SR is transmitted to each second data line D2, at which time, the first data line D1 continues to transmit the data voltage acquired at the previous time to the first row sub-pixel 1, and the second data line D2 transmits the data voltage acquired at the current time from the source signal line SR to the second row sub-pixel 1 while charging the first and second row sub-pixels 1; at a third time T3 of the first driving period T2, the scan lines S1 and S2 provide an on level, the other scan lines S all provide an off level, the first gate terminal O1 and the input terminal IN each multiplexer mux are turned off, and the second gate terminal O2 and the input terminal IN are turned on or off, only the timing when the two are turned on is shown IN fig. 2, and no matter the second gate terminal O2 and the input terminal IN are turned on or off, at this time, the first data line D1 transmits the previously acquired data voltage to the first row sub-pixel 1 for charging, and the second data line D2 transmits the previously acquired data voltage or the data voltage acquired at this time to the second row sub-pixel 1 for charging. In the first driving period T1, the first and second row sub-pixels 1 are charged simultaneously through the first data line D1 and the second data line D2, then the second driving period T2 is entered, the third and fourth row sub-pixels 1 are charged in the same driving manner, and so on, and after all the row sub-pixels 1 are charged, the scanning refresh of one picture is completed. First, the source signal line SR transmits the required data voltage to the first data line D1 and the second data line D2 at the time of interleaving, the corresponding row of sub-pixels 1 is charged after the required data voltage is obtained by the first data line D1, and the corresponding other row of sub-pixels 1 is charged after the required data voltage is obtained by the second data line D2, because there is a stage in which the first data line D1 and the second data line D2 charge two rows of sub-pixels 1 at the same time, compared with the line-by-line charging method, on the premise that the sub-pixels 1 are ensured to have sufficient charging time, more rows of sub-pixels 1 can be scanned, that is, the time required for refreshing one frame of picture is shortened, that is, the picture refreshing frequency is increased. It should be noted that, in the embodiment of the present application, at least part of the phase in each driving period, the corresponding two rows of sub-pixels 1 are charged simultaneously. Since each column of sub-pixels 1 corresponds to the first data line D1 and the second data line D2, and the multiplexer mux corresponding to the two data lines is provided, the data voltage on the source signal line SR can be transmitted to the first data line D1 and the second data line D2 in a time-sharing manner under the control of the multiplexer mux, that is, the first data line D1 and the second data line D2 can charge two rows of sub-pixels 1 at the same time, that is, the picture refresh frequency can be increased on the premise that the sub-pixels 1 have a long charging time, the timing shown in fig. 2 is only an example, and other driving methods will be described in detail later.

In the organic light emitting display panel in the embodiment of the application, the first data line and the second data line corresponding to each column of sub-pixels are arranged and are respectively connected with odd-numbered rows and even-numbered rows of sub-pixels, and the multiplexer corresponding to each column of sub-pixels is matched.

Optionally, the scanning lines S corresponding to each two rows of sub-pixels 1 are electrically connected to each other, that is, the scanning lines S corresponding to the 2 i-th and 2 i-th rows of sub-pixels 1 are electrically connected to each other, that is, the scanning line S1 corresponding to the 1 st row of sub-pixels 1 and the scanning line S2 corresponding to the 2 nd row of sub-pixels 1 are electrically connected to each other, the scanning line S3 corresponding to the 3 rd row of sub-pixels 1 and the scanning line S4 corresponding to the 4 th row of sub-pixels 1 are electrically connected to each other, and so on.

Alternatively, the plurality of sub-pixels 1 arranged in a plurality of rows and a plurality of columns include sub-pixels 1 of different colors, each of the first data lines D1 is electrically connected to the sub-pixel of the same color, and each of the second data lines D2 is electrically connected to the sub-pixel of the same color.

In the prior art, the same data line is connected to the subpixels of different colors in the same column, and even if the partial picture displays the pure color, in the switching process of scanning two adjacent rows of subpixels, the data line is switched to the data voltage corresponding to the subpixels of different colors, so that unstable voltage during voltage switching on the data line is easily written into the subpixels to cause uneven display, and the charging time is shortened due to voltage switching, so that the subpixels cannot be charged to the target voltage value.

In the embodiment of the present application, taking the structure shown in fig. 1 and fig. 2 and the driving method corresponding to the timing sequence as an example, the first data line D1 and the second data line D2 corresponding to each column of sub-pixels 1 are respectively connected to the sub-pixels 1 in the odd-numbered rows and the even-numbered rows, each first data line D1 is connected to the sub-pixel 1 in the same color, each second data line D2 is connected to the sub-pixel 1 in the same color, and the color of the sub-pixel connected to the second data line D2 and the color of the sub-pixel connected to the first data line D1 are different. In the scanning process of the multiple rows of sub-pixels 1, the voltages on the data lines of the first data line D1 and the second data line D2 are constant, and a switching voltage writing stage of the existing pixel circuit is not needed, so that the charging time of the sub-pixels is prolonged, the sub-pixels 1 can be charged to reach a target voltage value in a shorter time, on one hand, the power consumption in the picture refreshing process is reduced, and on the other hand, the display uniformity is improved.

Alternatively, as shown in fig. 1 and fig. 3, fig. 3 is a schematic structural diagram of a sub-pixel arrangement corresponding to fig. 1, where a plurality of sub-pixels 1 arranged in multiple rows and multiple columns include a plurality of column repeating units 10, each column repeating unit 10 includes a plurality of sub-pixel columns, and the plurality of sub-pixel columns include a mixed-color sub-pixel column 11 and a pure-color sub-pixel column 20; the pure color sub-pixel column 20 is composed of sub-pixels of the same color, and the variegated color sub-pixel column 11 is composed of sub-pixels of different colors.

Alternatively, as shown in fig. 1 and 3, the plurality of sub-pixels 1 arranged in a plurality of rows and columns includes a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B; the plurality of sub-pixel columns comprise a plurality of mixed color sub-pixel columns 11, and the plurality of mixed color sub-pixel columns 11 comprise a first mixed color sub-pixel column 111 and a second mixed color sub-pixel column 112; in each first variegated subpixel column 111, the odd-numbered rows of subpixels 1 are red subpixels R, and the even-numbered rows of subpixels 1 are blue subpixels B; in each second variegated subpixel column 112, the odd-numbered rows of subpixels 1 are blue subpixels B, and the even-numbered rows of subpixels 1 are red subpixels R; the pure color sub-pixel column 20 is composed of green sub-pixels G.

Alternatively, each column repeating unit 10 includes a first variegated-color sub-pixel column 111, a pure-color sub-pixel column 20, and a second variegated-color sub-pixel column 112, which are adjacent in this order.

Alternatively, as shown in fig. 4 and fig. 5, fig. 4 is a schematic structural diagram of a partial region of another organic light emitting display panel in the embodiment of the present application, fig. 5 is a schematic structural diagram of a sub-pixel arrangement corresponding to fig. 4, and the pure-color sub-pixel column 20 includes a first pure-color sub-pixel column 21 and a second pure-color sub-pixel column 22; each column repetition unit 10 includes a first mixed color sub-pixel column 111, a first pure color sub-pixel column 21, a second mixed color sub-pixel column 112, and a second pure color sub-pixel column 22, which are adjacent in this order.

Optionally, as shown in fig. 6, fig. 6 is a schematic structural diagram of a partial region of another organic light emitting display panel in this embodiment of the present application, where the organic light emitting display panel further includes: a first gate control signal line CK1 and a second gate control signal line CK 2; each multiplexer mux includes a first switching transistor M1 and a second switching transistor M2; a first terminal of the first switching transistor M1 is electrically connected to the first gate terminal O1, a second terminal of the first switching transistor M1 is electrically connected to the input terminal IN, and a control terminal of the first switching transistor M1 is electrically connected to the first gate control signal line CK 1; a first terminal of the second switching transistor M2 is electrically connected to the second gate terminal O2, a second terminal of the second switching transistor M2 is electrically connected to the input terminal IN, and a control terminal of the second switching transistor M2 is electrically connected to the second gate control signal line CK 2.

Specifically, the first switching transistor M1 and the second switching transistor M2 may be N-type transistors or P-type transistors, which is illustrated only by way of example IN fig. 6, and as shown IN fig. 2 and 6, CK1 may represent a voltage on the first gate control signal line CK1, and CK2 may represent a voltage on the second gate control signal line CK2, and when CK1 is at a high level, the first switching transistor M1 is turned off, i.e., between the first gate terminal O1 and the input terminal IN, and when CK1 is at a low level, the first switching transistor M1 is turned on, i.e., between the first gate terminal O1 and the input terminal IN, and when CK2 is at a high level, the second switching transistor M2 is turned off, i.e., between the second gate terminal O2 and the input terminal IN, and when CK2 is at a low level, the second switching transistor M2 is turned on, i.e., between the second gate terminal O2 and the input terminal IN.

On the other hand, as shown in fig. 7, fig. 7 is a schematic structural diagram of a display device in an embodiment of the present application, and the embodiment of the present application further provides a display device including the organic light emitting display panel 100.

The specific structure and principle of the organic light emitting display panel 100 are the same as those of the above embodiments, and are not described herein again. The display device in the embodiment of the present application may be any electronic device with a display function, such as a touch display screen, a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.

As shown in fig. 8, fig. 8 is a signal timing diagram corresponding to an organic light emitting display panel in an embodiment of the present application, and the timing diagram in fig. 8 can be used in the organic light emitting display panel structure illustrated in fig. 1, fig. 4, or fig. 6, for example, and an embodiment of the present application provides a driving method for the organic light emitting display panel, where the driving method includes: driving the organic light emitting display panel by taking a frame as a period, wherein each frame comprises a plurality of driving time periods, the ith driving time period corresponds to the 2i-1 th row and the 2i th row of sub-pixels 1, the value of i is 1, 2, 3, … and n, n is the total row number of the sub-pixels 1, and each driving time period sequentially comprises a first time t1, a second time t2 and a third time t 3; at the first time t1 of the ith driving period, one of the first and second gate terminals O1 and O2 of each multiplexer mux is turned on with the input terminal IN, and the other of the first and second gate terminals O1 and O2 of each multiplexer mux is turned off with the input terminal IN, so that the data voltage on the source signal line SR is transmitted to one of the first and second data lines D1 and D2 through the multiplexer mux at the first time t 1; at a second time t2 of the i-th driving period, one of the first and second gate terminals O1 and O2 of each multiplexer mux is turned off from the input terminal IN, and the other of the first and second gate terminals O1 and O2 of each multiplexer mux is turned on from the input terminal IN, so that the data voltage on the source signal line SR is transmitted to the other of the first and second data lines D1 and D2 through the multiplexer mux at the second time t 2; at the third time t3 of the ith driving period, the first gate terminal O1 of each multiplexer mux is turned off from the input terminal IN, the second gate terminal O2 of each multiplexer mux is turned off from the input terminal IN, and the scan line S corresponding to the 2i-1 and 2 i-th rows of sub-pixels 1 is supplied with the on level.

Specifically, for example, the 1 st driving period T1 corresponds to the 1 st and 2 nd rows of sub-pixels 1, the 2 nd driving period T2 corresponds to the 3 rd and 4 th rows of sub-pixels 1, and so on, and each driving period corresponds to two rows of sub-pixels 1. The meaning of the reference numerals in fig. 8 is the same as that of fig. 2, and will not be described again. At a first time T1 of the first driving period T1, ck1 is low, ck2 is high, the data voltage on the source signal line SR is transmitted to the first data line D1, at a second time T2 of the first driving period T1, ck1 is high, ck2 is low, the data voltage on the source signal line SR is transmitted to the second data line D2, at a third time T3 of the first driving period T1, ck1 is high, ck2 is high, the data voltage on the first data line D1 is transmitted to the corresponding first row subpixel 1, the data voltage on the second data line D2 is transmitted to the corresponding second row subpixel 1, i.e., the first and second row subpixels 1 are charged at the same time, and both have no influence on each other, and, further, at the third time T3, since the source SR is off with both data lines, even if the voltage on the source signal line SR changes during charging, the charging process of the sub-pixel 1 is not adversely affected, and at the third time t3, the driving chip can provide the data voltage required by the next period for the signal line SR, so as to improve the charging efficiency in the subsequent driving process; after the first driving period T1 is finished, the second driving period T2 is entered, the third and fourth rows of sub-pixels 1 are charged in the same manner, and so on, and when all the rows of sub-pixels 1 are charged, the refreshing of one frame of picture is realized.

In the driving method in the embodiment of the application, the first data line and the second data line corresponding to each column of sub-pixels are arranged and respectively connected with the sub-pixels in odd rows and even rows, and the multiplexer corresponding to each column of sub-pixels is matched.

Alternatively, as shown in fig. 8, at the first time t1 and the second time t2 of the ith driving period, an off level (e.g., a high level) is supplied to the scanning line S corresponding to each row of the sub-pixels 1; at a third time t3 of the ith driving period, the off level is supplied to the scanning line S corresponding to each row of sub-pixels 1 other than the 2i-1 th and 2 i-th rows. That is, at the first time t1, only the data voltage on the source signal line SR is transmitted to the first data line D1, which does not disturb the subpixel 1 nor the second data line D2, at the second time t2, only the data voltage on the source signal line SR is transmitted to the second data line D2, which does not disturb the subpixel 1 nor the first data line D1, at the third time t3, the first data line D1 and the second data line D2 are respectively charged to the corresponding subpixels 1, which is not disturbed by the voltage variation on the source signal line SR, and, when each of the first data lines D1 is connected to the subpixel 1 of the same color and each of the second data lines D2 is connected to the subpixel 1 of the same color, adjacent rows of subpixels 1 display the same color in a scene, at the next driving period, the data voltages on the first and second data lines D1 and D2 are not changed, power consumption is low, and charging efficiency is higher. In addition, the pulse waveform on each scan line S in fig. 8 is relatively simple, that is, the structure of the scan driving circuit for generating the scan signal on each scan line S is relatively simple, and the design cost and the process cost are relatively low.

It should be noted that, IN fig. 8, IN each driving period, a buffering time may be set between the first time t1 and the second time t2, and a buffering time may also be set between the second time t2 and the third time t3, at which a cutoff level is provided to each scan line, a cutoff between the first gate terminal O1 and the input terminal IN each multiplexer mux is controlled, and a cutoff between the second gate terminal O2 and the input terminal IN each multiplexer mux is controlled, so as to prevent interference that may occur when signals are switched between times.

Alternatively, as shown in fig. 9, fig. 9 is another signal timing diagram corresponding to an organic light emitting display panel in the embodiment of the present application, and the timing diagram in fig. 9 may be used in, for example, the organic light emitting display panel structure illustrated in fig. 1, fig. 4, or fig. 6, and the meaning of the reference symbols in fig. 9 is the same as the meaning of the reference symbols in fig. 2 and fig. 8, and is not repeated here, except that fig. 9 further illustrates the pulse signal s5 on the scan line corresponding to the fifth row of sub-pixels 1, the pulse signal s6 on the scan line corresponding to the sixth row of sub-pixels 1, and the timing diagram of the third driving period T3, and in fig. 1, fig. 4, or fig. 6, only the 1 st to 4 th rows of sub-pixels 1 are illustrated, and the fifth and sixth rows of sub-pixels 1 are omitted. At the first time t1 of the ith driving period, the first gate terminal O1 of each multiplexer mux is turned on and the input terminal IN is turned off, and the second gate terminal O2 of each multiplexer mux is turned off and the input terminal IN is turned on and the off level is supplied to the scan line S corresponding to the 2i-1 and 2 i-th rows of sub-pixels 1; at the second time t2 of the ith driving period, the first gate terminal O1 of each multiplexer mux is turned off from the input terminal IN, the second gate terminal O2 of each multiplexer mux is turned on from the input terminal IN, the scan line S corresponding to the sub-pixel 1 of the 2i-1 th row is supplied with the on level, and the scan line S corresponding to the sub-pixel 1 of the 2 i-th row is supplied with the off level.

Specifically, for example, at a first time T1 of the 1 st driving period T1, the data voltage on the source signal line SR is transferred to the first data line D1 through the multiplexer mux, at a second time t2 of the 1 st driving period, the data voltage on the source signal line SR is transferred to the second data line D2 through the multiplexer mux, meanwhile, an on level is supplied to the scan line S corresponding to the first row of sub-pixels 1, an off level is supplied to the scan line S corresponding to the second row of sub-pixels 1, the first row of sub-pixels 1 corresponds to each of the first data lines D1, i.e., the data voltage on the first data line D1, is transmitted to the first row subpixel 1, charges the first row subpixel 1, while the first row sub-pixels 1 are charged, the first data line D1 and the source signal line SR do not interfere with each other, increasing the charging time of the first row sub-pixels 1 compared to the timing shown in fig. 8; by analogy, the charging time of the odd row sub-pixels 1 is increased in the whole scanning process.

Optionally, as shown in fig. 9, when i takes on values of 2, 3, …, n; at a first time t1 of the ith driving period, providing an on level to the scanning line S corresponding to the sub-pixel 1 of the 2i-2 th row and providing an off level to the scanning line S corresponding to the sub-pixel 1 of each row except the 2i-2 th row; at a second time t2 of the ith driving period, providing an on level to the scanning line S corresponding to the sub-pixel 1 of the 2i-1 th row and providing an off level to the scanning line S corresponding to the sub-pixel 1 of each row except the 2i-1 th row; at a third time t3 of the ith driving period, the off level is supplied to the scanning line S corresponding to each row of sub-pixels 1 other than the 2i-1 th and 2 i-th rows.

Specifically, for example, at the first time T1 of the 2 nd driving period T1, the data voltage on the source signal line SR is transmitted to the first data line D1 through the multiplexer mux, while the on level is supplied to the scan line S corresponding to the second row of sub-pixels 1 and the off level is supplied to the other scan lines S, even if the data voltage on the second data line D2 is transmitted to the second row of sub-pixels 1 but not transmitted to the other row of sub-pixels 1 and only the second row of sub-pixels 1 is charged, the source signal line SR and the second data line D2 do not interfere with each other; at a second time t2 of the 2 nd driving period, the data voltage on the source signal line SR is transmitted to the second data line D2 through the multiplexer mux, and at the same time, the on level is provided to the scan line S corresponding to the third row sub-pixel 1, and the off level is provided to the other scan lines S, so that even if the data voltage on the first data line D1 is transmitted to the third row sub-pixel 1, but is not transmitted to the other row sub-pixels 1, only the third row sub-pixel 1 is charged, and the first data line D1 and the source signal line SR do not interfere with each other while the first row sub-pixel 1 is charged; at a third time t3 of the 2 nd driving period, the source signal line SR and each data line are all turned off without interfering with each other, and the first data line D1 and the second data line D2 charge the third and fourth rows of sub-pixels 1, respectively; by analogy, in each driving phase, in addition to the common charging process at the third time t3, at the first time t1 and the second time t2, the first data line D1 and the second data line D2 are also charged for the corresponding sub-pixel 1, and compared with the timing shown in fig. 8, the charging time of the sub-pixel 1 in each row is increased in the whole scanning process, so that the picture refresh frequency can be further increased.

It should be noted that, IN fig. 9, IN each driving period, a buffering time may be set between the first time t1 and the second time t2, and a buffering time may also be set between the second time t2 and the third time t3, at which a cutoff level is provided to each scan line, a cutoff between the first gate terminal O1 and the input terminal IN each multiplexer mux is controlled, and a cutoff between the second gate terminal O2 and the input terminal IN each multiplexer mux is controlled, so as to prevent interference that may occur when signals are switched between times. IN addition, between the adjacent two driving periods, there may be provided a buffer period IN which an off level is supplied to the scan line corresponding to the sub-pixel 1 of the odd-numbered row, the off between the first gate terminal O1 and the input terminal IN each multiplexer mux is controlled, and the off between the second gate terminal O2 and the input terminal IN each multiplexer mux is controlled, thereby preventing interference that may occur when signals are switched between the driving periods.

In the organic light emitting display panel and the driving method in the embodiment of the application, each column of sub-pixels corresponds to two data lines, namely, a first data line and a second data line, the first data line and the second data line are respectively connected with odd-numbered rows and even-numbered rows of sub-pixels, in the driving process of the organic light emitting display panel, firstly, a source signal line respectively transmits respectively required data voltages for the first data line and the second data line at staggered time (namely, first time and second time), the corresponding row of sub-pixels is charged after the first data line obtains the required data voltage, the corresponding other row of sub-pixels is charged after the second data line obtains the required data voltage, and as a stage (third time) exists in which the first data line and the second data line simultaneously charge the two rows of sub-pixels, compared with a row-by-row charging mode, on the premise that the sub-pixels have enough charging time is ensured, more rows of sub-pixels can be scanned, i.e. the time required to refresh a picture is reduced, i.e. the picture refresh frequency is increased.

The data lines (the first data line D1 or the second data line D2) are further electrically connected with the sub-pixels with the same color through the data lines, in the scanning process, the voltage on the data lines is constant in the scanning process of a plurality of rows of sub-pixels, the voltage writing stage of the switching voltage of the existing pixel circuit is not needed, the charging time of the sub-pixels is prolonged, the sub-pixels can be charged in a shorter time to reach the target voltage value, the power consumption in the picture refreshing process is reduced, and the display uniformity is improved.

Further, as shown in the timing sequence of fig. 8, the scan lines corresponding to every two rows of sub-pixels have the same timing sequence, and the pulse waveforms on the scan lines are simpler, that is, the structure of the scan driving circuit for generating the scan signals on the scan lines is simpler, and the design cost and the process cost are lower.

As shown in fig. 9, in addition to the charging at the third time, the sub-pixels in each row are also charged at least at the first time or the second time, that is, the charging time of the sub-pixels is further increased, and the picture refresh frequency is further increased.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An organic light emitting display panel, comprising:

the multi-path selector comprises a first gating end, a second gating end and an input end, wherein the first gating end is electrically connected to the corresponding first data line, the second gating end is electrically connected to the corresponding second data line, the input end is electrically connected to the corresponding source signal line, and the multi-path selector is used for controlling the connection or the disconnection between any one of the first gating end and the second gating end and the input end;

at the first moment of the ith driving period, the first gating end and the input end of each multiplexer are switched on, the second gating end and the input end of each multiplexer are switched off, and the switching-off level is provided for the scanning lines corresponding to the sub-pixels of the 2i-1 th row and the 2 i-th row;

at the second moment of the ith driving period, the first gating end and the input end of each multiplexer are cut off, the second gating end of each multiplexer is connected with the input end, the on level is provided for the scanning line corresponding to the sub-pixel of the 2i-1 th row, and the cut-off level is provided for the scanning line corresponding to the sub-pixel of the 2i th row;

2. The organic light-emitting display panel according to claim 1,

the scanning lines corresponding to every two rows of sub-pixels are mutually and electrically connected.

3. The organic light-emitting display panel according to claim 1,

the plurality of sub-pixels arranged in a plurality of rows and columns comprise sub-pixels with different colors, each first data line is electrically connected with the sub-pixels with the same color, and each second data line is electrically connected with the sub-pixels with the same color.

4. The organic light-emitting display panel according to claim 3,

the multiple sub-pixels arranged in multiple rows and multiple columns comprise multiple column repeating units, each column repeating unit comprises multiple sub-pixel columns, and the multiple sub-pixel columns comprise a mixed-color sub-pixel column and a pure-color sub-pixel column;

5. The organic light-emitting display panel according to claim 4,

the plurality of sub-pixels arranged in multiple rows and multiple columns comprise red sub-pixels, green sub-pixels and blue sub-pixels;

the pure color sub-pixel column is composed of green sub-pixels.

6. The organic light-emitting display panel according to claim 5,

each column repeating unit comprises the first variegated sub-pixel column, the pure-color sub-pixel column and the second variegated sub-pixel column which are adjacent in sequence.

7. The organic light-emitting display panel according to claim 5,

the pure color sub-pixel columns comprise a first pure color sub-pixel column and a second pure color sub-pixel column;

8. The organic light-emitting display panel according to claim 1, further comprising:

a first gate control signal line and a second gate control signal line;

9. A display device characterized by comprising the organic light emitting display panel according to any one of claims 1 to 8.

10. A driving method for the organic light emitting display panel according to any one of claims 1 to 8, comprising:

11. The driving method according to claim 10,

when the value of i is 2, 3, …, n;