CN113753849A - Block copolymer directional self-assembly etching method - Google Patents
Block copolymer directional self-assembly etching method Download PDFInfo
- Publication number
- CN113753849A CN113753849A CN202010495119.6A CN202010495119A CN113753849A CN 113753849 A CN113753849 A CN 113753849A CN 202010495119 A CN202010495119 A CN 202010495119A CN 113753849 A CN113753849 A CN 113753849A
- Authority
- CN
- China
- Prior art keywords
- layer
- block copolymer
- neutral
- etching
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0042—Assembling discrete nanostructures into nanostructural devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0009—Forming specific nanostructures
- B82B3/0014—Array or network of similar nanostructural elements
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention provides a block copolymer directional self-assembly etching method, which is characterized in that after a barrier layer and a transition layer are formed on a semiconductor substrate, a nano-imprinting method is adopted, an anti-reflection layer and a hard mask layer do not need to be prepared, a groove with smaller characteristic dimension can be formed in the transition layer, then an interval structure with smaller characteristic dimension can be formed through the groove, after the transition layer is removed, a neutral layer covering the side wall of the interval structure and covering the barrier layer can be formed, and after the interval structure is removed, an induction structure filling the groove can be formed in the neutral layer, so that the block copolymer layer is directionally self-assembled based on the induction structure and the neutral layer; the block copolymer directional self-assembly etching method has simple preparation process, can reduce the characteristic size of a device, and improves the space utilization rate and the product quality of the device.
Description
Technical Field
The invention belongs to the field of integrated circuit manufacturing, and relates to a block copolymer directional self-assembly etching method.
Background
Currently, the integrated circuit technology node has entered into the nanometer era across the micron, submicron and deep submicron stages, the etching technology is one of the core manufacturing technologies supporting the updating of the integrated circuit devices, and the appearance of each new generation of integrated circuits always takes the etching process to realize smaller feature size (CD) as the main technical sign.
Currently, the industry has extended 193nm optical etching techniques to the 32nm, 20nm, and even 16/14nm nodes. However, the extremely high process development cost, process complexity and physical limitations of etching itself limit the further development of the existing etching technology, and especially have great limitations when the process faces the fabrication of patterns with smaller sizes.
Directed Self-Assembly etching (DSA) of Block copolymers is a nano-patterning technology with great potential. DSA is to polymerize two monomers with different chemical properties to form a block copolymer layer, wherein the block copolymer layer can be induced into a regular nanowire array, a nanopore array, a nanosphere array and the like by a certain method, an etching film plate can be formed after etching, and then the film plate can be transferred onto a substrate by adopting an etching technology, so that the DSA can be used for preparing nano structures with different controllable sizes and related semiconductor devices.
DSA has the advantages of low cost, high resolution, high yield and large-scale application because no light source, mask and complex process conditions are needed, and rapidly gets wide attention of the semiconductor industry. At present, DSA induction methods in the world mainly comprise a graph structure epitaxy method and a chemical substrate epitaxy method. The 'pattern structure epitaxy method' is characterized in that a large-size groove structure is made on a neutralized substrate by using high-temperature-resistant photoresist, then a block copolymer film is spin-coated in a groove, phase separation is carried out, directional self-assembly is carried out along the side wall of the groove, long-range ordered homogenization of a nano structure is realized, the 'chemical substrate epitaxy method' is used for inducing self-assembly of the block copolymer from the substrate, an 'elution method (Lift-off propach') and an 'etching modification method (Trim-etch propach') are commonly used, but the 'pattern structure epitaxy method' has the problem of space sacrifice, a process window obtained by the elution method is small, more defects are caused by high-low dislocation, and the 'etching modification method' is complex in process and large in control difficulty.
Therefore, it is necessary to provide a method for etching block copolymers by directed self-assembly.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a method for directional self-assembly etching of a block copolymer, which is used to solve the problems of complicated process, high process difficulty, low space utilization rate, high defects, etc. of the method for directional self-assembly etching of a block copolymer in the prior art.
To achieve the above and other related objects, the present invention provides a method for directional self-assembly etching of a block copolymer, comprising the steps of:
providing a semiconductor substrate, and forming a barrier layer on the semiconductor substrate;
forming a transition layer on the barrier layer, and patterning the transition layer by adopting a nano-imprinting method to form a groove exposing the barrier layer;
forming a spacer structure filling the trench;
removing the transition layer to form a neutral layer which covers the side wall of the interval structure and covers the barrier layer;
removing the interval structure, and forming an induction structure for filling the groove in the neutral layer;
and forming a block copolymer layer covering the induced structure and the neutral layer, and carrying out oriented self-assembly on the block copolymer layer.
Optionally, the nano-imprinting method comprises one of a thermal imprinting method and a photo-imprinting method.
Optionally, the width of the inducing structure ranges from 5nm to 20 nm.
Optionally, the material of the block copolymer layer comprises PS-b-PMMA, the material of the induced structure comprises non-neutral PS, and the material of the neutral layer comprises random copolymer PS-b-PMMA-HEMA.
Optionally, the method of forming the spacer structure includes:
forming a silicon oxide spacing layer or a silicon nitride spacing layer covering the transition layer and filling the groove under the condition of 50-100 ℃;
and removing the silicon oxide spacing layer or the silicon nitride spacing layer on the surface of the transition layer by adopting wet etching to form a silicon oxide spacing structure or a silicon nitride spacing structure.
Optionally, the material of the barrier layer includes one of titanium nitride, hafnium oxide, and silicon oxide.
Optionally, the material of the transition layer includes one of a thermoplastic material and a light-cured material.
Optionally, the method of directed self-assembly of the block copolymer layer comprises a thermal annealing process.
Optionally, the method further includes the steps of etching the block copolymer layer to pattern the block copolymer layer, and etching the patterned block copolymer layer as a mask to expose the semiconductor substrate.
Optionally, the semiconductor substrate includes a transistor structure therein.
As described above, according to the block copolymer directional self-assembly etching method of the present invention, after the barrier layer and the transition layer are formed on the semiconductor substrate, the nano-imprint method is adopted, and the anti-reflection layer and the hard mask layer are not required to be prepared, the trench having a smaller feature size can be formed in the transition layer, and then the spacer structure having a smaller feature size can be formed through the trench, and after the transition layer is removed, the spacer structure side wall can be formed to wrap the spacer structure and the neutral layer covering the barrier layer, and after the spacer structure is removed, the inducing structure filling the trench can be formed in the neutral layer, so that the block copolymer layer is directionally self-assembled based on the inducing structure and the neutral layer; the block copolymer directional self-assembly etching method has simple preparation process, can reduce the characteristic size of a device, and improves the space utilization rate and the product quality of the device.
Drawings
FIG. 1 is a schematic flow chart of the block copolymer directed self-assembly etching method of the present invention.
FIGS. 2-10 are schematic structural diagrams of steps in the method of performing directed self-assembly etching of block copolymers according to the present invention.
Description of the element reference numerals
100 semiconductor substrate
200 barrier layer
300 transition layer
400 groove
500 spacer layer
600 space structure
700 neutral layer
800 inducing structure
900 block copolymer layer
910 first block copolymer region
920 second block copolymer region
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 10. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Referring to fig. 1, the present embodiment provides a block copolymer directional self-assembly etching method, in which a barrier layer and a transition layer are formed on a semiconductor substrate, and then a nano-imprint method is employed, without preparing an anti-reflection layer and a hard mask layer, a trench having a smaller feature size can be formed in the transition layer, and then an interval structure having a smaller feature size can be formed through the trench, and after the transition layer is removed, a neutral layer covering a sidewall of the interval structure and covering the barrier layer can be formed, and after the interval structure is removed, an inducing structure filling the trench can be formed in the neutral layer, so that directional self-assembly of the block copolymer layer can be performed based on the inducing structure and the neutral layer; the block copolymer directional self-assembly etching method has simple preparation process, can reduce the characteristic size of a device, and improves the space utilization rate and the product quality of the device.
Specifically, referring to FIGS. 2-10, the structural schematic of the steps in the block copolymer directed self-assembly etching process is illustrated
First, referring to fig. 2, a semiconductor substrate 100 is provided, and the material of the semiconductor substrate 100 may be a silicon-based or germanium-based material, such as one of Si, SOI, Ge, GeOI, GeSi, etc., and may also be a III, V group material, which is not limited herein. The semiconductor substrate 100 may include a transistor structure, such as a PMOS, an NMOS, a CMOS, a VDMOS, an LDMOS, an IGBT, and the like, and regarding the preparation of the transistor structure, the transistor structure may be prepared according to the existing semiconductor manufacturing process to form a source drain region, a gate electrode, and the like in the semiconductor substrate 100, which is not limited herein.
Next, a barrier layer 200 may be formed on the semiconductor substrate 100 by using a chemical vapor deposition or other methods, so as to protect the device structure in the semiconductor substrate 100 through the barrier layer 200, wherein the material of the barrier layer 200 may be one of titanium nitride, hafnium oxide, and silicon oxide, and may be specifically selected according to the requirement.
Next, referring to fig. 2 and 3, a transition layer 300 may be formed on the barrier layer 200 by coating, wherein the material of the transition layer 300 may include one of a thermoplastic material and a light-curing material, such as a photoresist, a thermoplastic polymer, a hardening resin, and the like.
Next, referring to fig. 3, the transition layer 300 may be imprinted by a mold using a nano-imprinting method to pattern the transition layer 300, so as to form a trench 400 exposing the barrier layer 200.
As an example, the nano-imprinting method may include one of a thermal imprinting method and a photo-imprinting method.
Specifically, according to the material of the transition layer 300, a suitable embossing method may be correspondingly adopted to transfer the pattern in the mold to the transition layer 300 through the mold, for example, when the material of the transition layer 300 is a thermoplastic material, the groove 400 may be formed in the transition layer 300 through a hot embossing method, and when the material of the transition layer 300 is a photo-curing material, the groove 400 may be formed in the transition layer 300 through a photo-embossing method, such as UV light irradiation. By the nano-imprint method, the trench 400 having a smaller feature size may be formed in the transition layer 300 without preparing an anti-reflection layer and a hard mask layer, wherein the feature size of the trench 400 may range from 5nm to 20nm, such as 6nm, 10nm, 15nm, and the like. In this embodiment, the transition layer 300 is made of photoresist, and the groove 400 is formed by the nano-imprint method, so that the process is simple, the operation is convenient, the mold can be repeatedly used, and the production cost is low.
Next, referring to fig. 4 and 5, a spacer structure 600 filling the trench 400 is formed.
Specifically, in the present embodiment, the material of the spacer layer 500 is preferably silicon oxide to reduce the formation temperature and reduce the influence on the device structure, but is not limited thereto. Wherein, taking silicon oxide as an example, the method for forming the spacer structure 600 may include:
forming a silicon oxide spacing layer covering the transition layer 300 and filling the groove 400 at the temperature of 50-100 ℃;
and removing the silicon oxide spacing layer on the surface of the transition layer 300 by wet etching to form a silicon oxide spacing structure.
Specifically, the spacer layer 500 may be formed by a chemical vapor deposition method, but is not limited thereto, and then, the excess spacer layer 500 on the surface of the transition layer 300 may be removed by wet etching to expose the surface of the transition layer 300, so as to form the spacer structure 600 filling the trench 400. Of course, the material of the spacer layer 500 may also be silicon nitride, which is not described herein again.
Next, referring to fig. 6, the transition 300 is removed to expose the barrier layer 200 and the spacer structure 600.
Next, referring to fig. 7, a neutral layer 700 is formed to cover the sidewalls of the spacer structure 600 and the barrier layer 200.
Specifically, referring to fig. 10, in the present embodiment, the material of the block copolymer layer 900 is a diblock copolymer, which includes, but is not limited to, a first block copolymer region 910 and a second block copolymer region 920. Since the block copolymer layer 900 is a polymer formed by linking two chemically different polymer segments through covalent bonds, wherein the first block copolymer region 910 and the second block copolymer region 920 are made of different materials, and the molecules of the block copolymer are separated into phases, the neutral layer 700 is required as an intermediate for linking the barrier layer 200 and the block copolymer to perform phase separation, so that the interfaces of the first block copolymer region 910 and the second block copolymer region 920 are equal to each other under certain conditions to form the same degree of affinity, and thus the block copolymer layer 900 can be formed in a vertical and periodic ordered arrangement to perform self-assembly of the block copolymer. In this embodiment, the material of the neutral layer 700 may be a random copolymer in the same system as the block copolymer, and preferably, the material of the block copolymer layer 900 includes PS-b-PMMA, that is, the material of the first block copolymer region 910 is PS, and the material of the second block copolymer region 920 is PMMA, so that the material of the neutral layer 700 is a random copolymer PS-b-PMMA-HEMA.
Next, referring to fig. 8 and 9, the spacer structure 600 is removed, and an inducing structure 800 filling the trench 400 is formed in the neutral structure 700.
Specifically, the material of the inducing structure 800 may be non-neutral PS, so that the PS in the block copolymer is preferentially attracted by the inducing structure 800, so that the first block copolymer regions 910 are distributed on the upper surface thereof, and extend outward with the block as an initial value to perform self-assembly, thereby forming a self-assembly pattern with a periodic order.
Next, referring to fig. 10, the block copolymer layer 900 covering the induced structure 800 and the neutral layer 700 is formed, and the block copolymer layer 900 is directionally self-assembled.
Specifically, the method for performing the directed self-assembly of the block copolymer layer 900 includes, but is not limited to, a thermal annealing method, wherein the nano self-assembly pattern ordered in a vertical direction and a period can be formed by the neutral layer 700 and the inducing structure 800. In this embodiment, the trench 400 having a smaller feature size is formed by using a nanoimprint method, so that the width range of the inducing structure 800 includes 5nm to 20nm, such as 6nm, 10nm, 15nm, and the like, and thus, the feature sizes of the first block copolymer region 910 and the second block copolymer region 920 can be further reduced by the action of the inducing structure 800, so as to improve the space utilization rate and the integration level, facilitate the subsequent reduction of the feature size of the device, improve the space utilization rate of the device, and reduce the etching step based on the nanoimprint method, thereby improving the product quality.
As an example, the method further includes the steps of etching the block copolymer layer 900 to pattern the block copolymer layer 900, and etching the patterned block copolymer layer 900 to expose the semiconductor substrate 100 by using the patterned block copolymer layer 900 as a mask.
Specifically, the second block copolymer region 920 may be removed by etching to form the patterned block copolymer layer 900, so that the patterned block copolymer layer 900 may be used as a mask for performing a subsequent etching process to form a trench, a hole or a combination of a trench and a hole, so as to perform a subsequent process such as metal deposition.
In summary, according to the block copolymer directional self-assembly etching method of the present invention, after the barrier layer and the transition layer are formed on the semiconductor substrate, the nano-imprint method is adopted, and the anti-reflection layer and the hard mask layer are not required to be prepared, the trench having a smaller feature size can be formed in the transition layer, and then the spacer structure having a smaller feature size can be formed through the trench, and after the transition layer is removed, the spacer structure side wall can be formed and the neutral layer covering the barrier layer can be formed, and after the spacer structure is removed, the inducing structure filling the trench can be formed in the neutral layer, so as to perform the directional self-assembly of the block copolymer layer based on the inducing structure and the neutral layer; the block copolymer directional self-assembly etching method has simple preparation process, can reduce the characteristic size of a device, and improves the space utilization rate and the product quality of the device.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A method for etching a block copolymer by directed self-assembly, comprising the steps of:
providing a semiconductor substrate, and forming a barrier layer on the semiconductor substrate;
forming a transition layer on the barrier layer, and patterning the transition layer by adopting a nano-imprinting method to form a groove exposing the barrier layer;
forming a spacer structure filling the trench;
removing the transition layer to form a neutral layer which covers the side wall of the interval structure and covers the barrier layer;
removing the interval structure, and forming an induction structure for filling the groove in the neutral layer;
and forming a block copolymer layer covering the induced structure and the neutral layer, and carrying out oriented self-assembly on the block copolymer layer.
2. The method of claim 1, wherein: the nano-imprinting method comprises one of a hot imprinting method and a photo-imprinting method.
3. The method of claim 1, wherein: the width range of the induction structure comprises 5 nm-20 nm.
4. The method of claim 1, wherein: the material of the block copolymer layer comprises PS-b-PMMA, the material of the induction structure comprises non-neutral PS, and the material of the neutral layer comprises random copolymer PS-b-PMMA-HEMA.
5. The method of claim 1, wherein the step of forming the spacer structure comprises:
forming a silicon oxide spacing layer or a silicon nitride spacing layer covering the transition layer and filling the groove under the condition of 50-100 ℃;
and removing the silicon oxide spacing layer or the silicon nitride spacing layer on the surface of the transition layer by adopting wet etching to form a silicon oxide spacing structure or a silicon nitride spacing structure.
6. The method of claim 1, wherein: the material of the barrier layer comprises one of titanium nitride, hafnium oxide and silicon oxide.
7. The method of claim 1, wherein: the material of the transition layer comprises one of thermoplastic material and light-cured material.
8. The method of claim 1, wherein: methods of directed self-assembly of the block copolymer layer include thermal annealing.
9. The method of claim 1, wherein: the method further comprises the steps of etching the block copolymer layer to pattern the block copolymer layer, and etching by taking the patterned block copolymer layer as a mask to expose the semiconductor substrate.
10. The method of claim 1, wherein: the semiconductor substrate comprises a transistor structure therein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010495119.6A CN113753849A (en) | 2020-06-03 | 2020-06-03 | Block copolymer directional self-assembly etching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010495119.6A CN113753849A (en) | 2020-06-03 | 2020-06-03 | Block copolymer directional self-assembly etching method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113753849A true CN113753849A (en) | 2021-12-07 |
Family
ID=78783258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010495119.6A Pending CN113753849A (en) | 2020-06-03 | 2020-06-03 | Block copolymer directional self-assembly etching method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113753849A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090179002A1 (en) * | 2008-01-14 | 2009-07-16 | International Business Machines Corporation | Method of forming polymer features by directed self-assembly of block copolymers |
| CN101913554A (en) * | 2008-11-19 | 2010-12-15 | 希捷科技有限公司 | Use self-assembled material to guide the chemical pinning of addressable array |
| CN102540702A (en) * | 2010-11-30 | 2012-07-04 | 希捷科技有限公司 | System and method for imprint-guided block copolymer nano-patterning |
| CN102983065A (en) * | 2011-09-06 | 2013-03-20 | 中芯国际集成电路制造(北京)有限公司 | Forming method for pattern, mask pattern and manufacture method for semiconductor component |
| US20150206548A1 (en) * | 2014-01-17 | 2015-07-23 | Seagate Technology Llc | Imprint pattern guided self-assembly of lamellar block copolymer for bpm |
-
2020
- 2020-06-03 CN CN202010495119.6A patent/CN113753849A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090179002A1 (en) * | 2008-01-14 | 2009-07-16 | International Business Machines Corporation | Method of forming polymer features by directed self-assembly of block copolymers |
| CN101913554A (en) * | 2008-11-19 | 2010-12-15 | 希捷科技有限公司 | Use self-assembled material to guide the chemical pinning of addressable array |
| CN102540702A (en) * | 2010-11-30 | 2012-07-04 | 希捷科技有限公司 | System and method for imprint-guided block copolymer nano-patterning |
| CN102983065A (en) * | 2011-09-06 | 2013-03-20 | 中芯国际集成电路制造(北京)有限公司 | Forming method for pattern, mask pattern and manufacture method for semiconductor component |
| US20150206548A1 (en) * | 2014-01-17 | 2015-07-23 | Seagate Technology Llc | Imprint pattern guided self-assembly of lamellar block copolymer for bpm |
Non-Patent Citations (2)
| Title |
|---|
| A. PAQUET等: "Spacer patterning lithography as a new process to induce block copolymer alignment by chemo-epitaxy", 《PROC. OF SPIE》 * |
| G.RADEMAKER等: "Establishing a sidewall image transfer chemo-epitaxial DSA process using 193 nm immersion", 《PROC. OF SPIE》 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Ji et al. | Directed self-assembly of block copolymers on chemical patterns: A platform for nanofabrication | |
| Stoykovich et al. | Block copolymers and conventional lithography | |
| CN102983065B (en) | Pattern, mask pattern forming method and method, semi-conductor device manufacturing method | |
| Jaszewski et al. | Hot embossing in polymers as a direct way to pattern resist | |
| US8529778B2 (en) | Large area patterning of nano-sized shapes | |
| US20030080471A1 (en) | Lithographic method for molding pattern with nanoscale features | |
| US20030034329A1 (en) | Lithographic method for molding pattern with nanoscale depth | |
| US20040211754A1 (en) | Method of forming stepped structures employing imprint lithography | |
| US8183138B2 (en) | Methods for forming nanodots and/or a patterned material during the formation of a semiconductor device | |
| CN104364713A (en) | Forming patterns using block copolymers and articles | |
| JP2009158972A (en) | Imprint lithography | |
| Cattoni et al. | Soft UV-NIL at 20 nm scale using flexible bi-layer stamp casted on HSQ master mold | |
| Shields et al. | Nanoimprint lithography resist profile inversion for lift-off applications | |
| KR101093204B1 (en) | Orientation Controlled Blockcopolymer Nanostructures Using Organic Compound Photoresist Cross Patterns and Method for Preparing the Same | |
| Schift et al. | Transparent hybrid polymer stamp copies with sub-50-nm resolution for thermal and UV-nanoimprint lithography | |
| TWI409582B (en) | A method of making a secondary imprint on an imprinted polymer | |
| TW201546872A (en) | Method of fabricating semiconductor integrated circuit | |
| US20140248439A1 (en) | Pattern formation method | |
| Alkaisi et al. | Multilevel nanoimprint lithography | |
| US8163656B2 (en) | Process for adjusting the size and shape of nanostructures | |
| US20100081282A1 (en) | Process for adjusting the size and shape of nanostructures | |
| CN113753849A (en) | Block copolymer directional self-assembly etching method | |
| Konijn et al. | Nanoimprint lithography of sub-100 nm 3D structures | |
| Chen et al. | Atomic layer deposition assisted pattern transfer technology for ultra-thin block copolymer films | |
| Sonkusale et al. | Fabrication of wafer scale, aligned sub-25 nm nanowire and nanowire templates using planar edge defined alternate layer process |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211207 |
|
| RJ01 | Rejection of invention patent application after publication |