CN113745381B - Mini LED chip and manufacturing method thereof - Google Patents
Mini LED chip and manufacturing method thereof Download PDFInfo
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- CN113745381B CN113745381B CN202111048112.0A CN202111048112A CN113745381B CN 113745381 B CN113745381 B CN 113745381B CN 202111048112 A CN202111048112 A CN 202111048112A CN 113745381 B CN113745381 B CN 113745381B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 238000005520 cutting process Methods 0.000 claims abstract description 94
- 238000005530 etching Methods 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 238000002161 passivation Methods 0.000 claims abstract description 45
- 238000007788 roughening Methods 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims description 112
- 239000002184 metal Substances 0.000 claims description 112
- 229910002601 GaN Inorganic materials 0.000 claims description 61
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 61
- 238000003466 welding Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 17
- 238000001259 photo etching Methods 0.000 claims description 12
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 10
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 230000003595 spectral effect Effects 0.000 description 15
- 238000000206 photolithography Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 238000000605 extraction Methods 0.000 description 6
- 238000003892 spreading Methods 0.000 description 6
- 239000011324 bead Substances 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 5
- 238000005260 corrosion Methods 0.000 description 5
- 230000007797 corrosion Effects 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000007771 core particle Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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Abstract
The invention discloses a Mini LED chip and a manufacturing method thereof, wherein a conical patterned dielectric film is prepared on a substrate, and an epitaxial layer is grown at one end of the patterned dielectric film far away from the substrate; after the epitaxial layer is subjected to dicing channel etching, the patterned dielectric film exposed from the side wall and the bottom of the dicing channel is etched, and the patterned dielectric film is conical, so that the lower side wall of the dicing channel with a positive trapezoid shape can be formed at the position of the patterned dielectric film; the side wall of the cutting channel is corroded, and a rough side wall surface can be formed, so that the efficiency of extracting light from the side surface of the chip is increased by adopting a side surface roughening mode, the overall brightness of the chip is improved, the occupation ratio of emergent light of the side surface is increased, and the luminous angle of the chip is increased; the insulating passivation layer and the reflecting layer are covered above the prepared chip, so that the requirement of a large light emitting angle of the Mini LED chip can be met while the side wall of the chip is protected.
Description
Technical Field
The invention relates to the field of LED manufacturing, in particular to a Mini LED chip and a manufacturing method thereof.
Background
Mini LED is an LED chip with the size of 100 micrometers, and is mainly applied to backlight and direct display. From the dimension, the size of a single LED chip of the Mini LED is between 50 and 200 mu m, and the pixel point spacing is about 0.5 to 1 mm. Compared with the traditional LED chip backlight product, the LED chip backlight product has smaller dot spacing, so that more LED backlight beads can be integrated on the same display screen, the screen is divided into more fine backlight partitions, finer regional luminous adjustment is facilitated, and the contrast close to an OLED screen can be achieved. In addition, compared with an OLED screen, the Mini LED backlight screen has the advantages of long service life, difficulty in screen burning and the like. The Mini LED has the defects that more backlight beads are integrated, the thickness is not easy to thin, more heat is easy to generate due to the accumulation of multiple backlight beads, and the heat dissipation requirement on equipment is higher. The large-angle Mini LED can realize large lamp bead spacing (pitch), so that the number of lamp beads is reduced. Because the Mini LED has small chip size and the proportion of the side area to the total light emitting area of the chip is large, the light emitting angle of the chip can be effectively increased by increasing the side light emitting efficiency.
The current method for realizing a large light-emitting angle of the Mini LED is to plate a part of reflecting film on the back surface of a transparent substrate, so that the reflected light escapes from the side surface, thereby increasing the light-emitting angle. However, the method has the defect that the absorption of epitaxial light is increased due to the increase of the reflection times of light on the upper surface and the lower surface of the chip, so that the brightness of side emergent light is greatly reduced, and the overall brightness of the Mini LED backlight chip is further reduced.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the Mini LED chip and the manufacturing method thereof can improve the light-emitting efficiency of the side face of the chip, further improve the overall brightness of the chip and increase the luminous angle of the chip.
In order to solve the technical problems, the invention adopts the following technical scheme:
a Mini LED chip manufacturing method comprises the following steps:
preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer at one end of the patterned dielectric film far away from the substrate;
carrying out cutting channel etching on the epitaxial layer;
etching the patterned dielectric film exposed from the side wall and the bottom of the cutting channel, and forming a right trapezoid lower side wall of the cutting channel at the position of the patterned dielectric film;
corroding the side wall of the cutting channel to form a rough side wall of the cutting channel;
and covering an insulating passivation layer and a reflecting layer above the prepared chip to obtain the Mini LED chip.
In order to solve the technical problems, the invention adopts another technical scheme that:
a Mini LED chip comprises a substrate, a patterned dielectric film, an epitaxial layer, a current expansion layer, a P-type ohmic contact metal layer, an N-type ohmic contact metal layer, an insulating passivation layer, a reflecting layer, a P-type welding metal electrode and an N-type welding metal electrode;
the patterned dielectric film is cone-shaped and is positioned right above the substrate;
the epitaxial layer is positioned at one end of the patterned dielectric film far away from the substrate;
the epitaxial layer comprises an exposed N-type gallium nitride region and an unexposed N-type gallium nitride region;
the epitaxial layer exposing the N-type gallium nitride region comprises a cutting channel, wherein the upper side wall of the cutting channel is in an inverted trapezoid shape at the position of the epitaxial layer, the lower side wall of the cutting channel is in a positive trapezoid shape at the position of the patterned dielectric film, and the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel;
the current expansion layer is positioned at one end of the epitaxial layer, which is not exposed out of the N-type gallium nitride region, and is far away from the substrate;
the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are respectively positioned on the surfaces of the current expansion layer and the N-type gallium nitride;
the insulating passivation layer and the reflecting layer are positioned on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed;
the P-type welding metal electrode and the N-type welding metal electrode are positioned above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer.
The invention has the beneficial effects that: preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer at one end of the patterned dielectric film far away from the substrate; after the epitaxial layer is subjected to dicing channel etching, the patterned dielectric film exposed from the side wall and the bottom of the dicing channel is etched, and the patterned dielectric film is conical, so that the lower side wall of the dicing channel with a positive trapezoid shape can be formed at the position of the patterned dielectric film; the side wall of the cutting channel is corroded, and a rough side wall surface can be formed, so that the efficiency of extracting light from the side surface of the chip is increased by adopting a side surface roughening mode, the overall brightness of the chip is improved, the occupation ratio of emergent light of the side surface is increased, and the luminous angle of the chip is increased; the insulating passivation layer and the reflecting layer are covered above the prepared chip, so that the requirement of a large light emitting angle of the Mini LED chip can be met while the side wall of the chip is protected.
Drawings
FIG. 1 is a flowchart of a Mini LED chip manufacturing method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a Mini LED chip according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a lithography mask for a Mini LED chip manufacturing method according to an embodiment of the invention;
fig. 4 is a schematic diagram of a structure of a Mini LED chip manufacturing method according to an embodiment of the present invention, which is not roughened by sidewall corrosion;
FIG. 5 is a schematic diagram of a structure of a reflection layer deposited after photolithography in a Mini LED chip manufacturing method according to an embodiment of the invention;
fig. 6 is a schematic structural diagram of a Mini LED chip manufacturing method without making P-type and N-type ohmic contact metal layers according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a Mini LED chip manufacturing method according to an embodiment of the present invention, in which P-type and N-type ohmic contact metal layers are not fabricated, and a reflective layer is first lithographically deposited;
description of the reference numerals:
1. a substrate; 2. patterning the dielectric film; 3. n-type gallium nitride; 4. a multi-layer quantum well; 5. p-type gallium nitride; 6. a current spreading layer; 7. an insulating passivation layer; 8. a reflective layer; 9. a P-type ohmic contact metal layer; 10. p-type welding metal electrodes; 11. an N-type ohmic contact metal layer; 12. an N-type welding metal electrode; 13. and cutting the channel.
Detailed Description
In order to describe the technical contents, the achieved objects and effects of the present invention in detail, the following description will be made with reference to the embodiments in conjunction with the accompanying drawings.
Referring to fig. 1, an embodiment of the present invention provides a method for manufacturing a Mini LED chip, including the steps of:
preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer at one end of the patterned dielectric film far away from the substrate;
carrying out cutting channel etching on the epitaxial layer;
etching the patterned dielectric film exposed from the side wall and the bottom of the cutting channel, and forming a right trapezoid lower side wall of the cutting channel at the position of the patterned dielectric film;
corroding the side wall of the cutting channel to form a rough side wall of the cutting channel;
and covering an insulating passivation layer and a reflecting layer above the prepared chip to obtain the Mini LED chip.
From the above description, the beneficial effects of the invention are as follows: preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer at one end of the patterned dielectric film far away from the substrate; after the epitaxial layer is subjected to dicing channel etching, the patterned dielectric film exposed from the side wall and the bottom of the dicing channel is etched, and the patterned dielectric film is conical, so that the lower side wall of the dicing channel with a positive trapezoid shape can be formed at the position of the patterned dielectric film; the side wall of the cutting channel is corroded, and a rough side wall surface can be formed, so that the efficiency of extracting light from the side surface of the chip is increased by adopting a side surface roughening mode, the overall brightness of the chip is improved, the occupation ratio of emergent light of the side surface is increased, and the luminous angle of the chip is increased; the insulating passivation layer and the reflecting layer are covered above the prepared chip, so that the requirement of a large light emitting angle of the Mini LED chip can be met while the side wall of the chip is protected.
Further, the preparing the cone-shaped patterned dielectric film on the substrate comprises:
and depositing a dielectric film on the substrate, and carrying out photoetching and etching on the dielectric film according to the photoetching mask pattern to obtain the cone-shaped patterned dielectric film.
As is apparent from the above description, the dielectric film on the substrate is subjected to photolithography and etching using the photolithography mask pattern, so as to obtain a tapered patterned dielectric film, which is convenient to obtain a side wall of a regular trapezoid in the subsequent etching of the patterned dielectric film due to the preparation of the tapered patterned dielectric film.
Further, performing dicing street etching on the epitaxial layer includes:
etching the epitaxial layer by using the photoresist or the dielectric layer as a mask, and forming an inverted trapezoid upper side wall of the cutting channel at the epitaxial layer;
forming a right trapezoid cutting path lower side wall at the position of the patterned dielectric film comprises the following steps:
the top surface of the lower side wall of the cutting channel is formed as the bottom surface of the upper side wall of the cutting channel.
As can be seen from the above description, the epitaxial layer is etched by cutting the epitaxial layer, so that the inverted trapezoid cutting channel side wall can be formed at the epitaxial layer position, and the shape of the whole cutting channel side wall is a folded line shape of an inverted trapezoid plus a regular trapezoid in combination with the regular trapezoid cutting channel side wall at the patterned dielectric film position, so that the reflective film deposited on the regular trapezoid cutting channel side wall can be reduced conveniently.
Further, growing an epitaxial layer at an end of the patterned dielectric film remote from the substrate comprises:
sequentially growing N-type gallium nitride, a multi-layer quantum well and P-type gallium nitride at one end of the patterned dielectric film far away from the substrate to obtain an epitaxial layer;
before the epitaxial layer is subjected to dicing channel etching, the method comprises the following steps:
and photoetching and etching the epitaxial layer to expose the surface of the N-type gallium nitride.
As can be seen from the above description, before performing dicing street etching, the epitaxial layer is subjected to photolithography and etching to expose the surface of the N-type gallium nitride, so that dicing street etching can be performed at the position where the N-type gallium nitride is exposed.
Further, etching the dicing street side wall to form a rough dicing street side wall includes:
etching the side wall of the cutting channel by using a coarsening etching solution at a preset temperature and a preset time, and forming a rough side wall of the cutting channel on the epitaxial layer part with the N-type gallium nitride;
the roughening etching solution contains KOH, naOH, H 3 PO 4 Or TMAH.
As can be seen from the above description, the exposed epitaxial surface after etching away the patterned dielectric film has a partially N-polar surface, so that the solution can easily etch it and form rough sidewalls; the roughening corrosion solution is KOH, naOH, H 3 PO 4 TMAH, etc., can be etched in accordance with the corresponding etching temperature and time.
Further, before covering the insulating passivation layer and the reflecting layer above the manufactured chip, the method includes:
covering a current expansion layer on the area of the chip which is not subjected to photoetching and etching on the epitaxial layer;
and respectively manufacturing a P-type ohmic contact metal layer and an N-type ohmic contact metal layer on the surfaces of the current expansion layer and the N-type gallium nitride.
Further, the covering the insulating passivation layer and the reflecting layer above the manufactured chip includes:
covering an insulating passivation layer and a reflecting layer above the prepared chip in sequence, and exposing the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
the method comprises the following steps of covering the insulating passivation layer and the reflecting layer on the prepared chip:
and respectively manufacturing a P-type welding metal electrode and an N-type welding metal electrode above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer.
As can be seen from the above description, the insulating passivation layer can protect the side wall of the chip, and the reflective layer can be plated just above the chip, so that light is easy to exit from the lower side wall of the dicing channel to the outside of the chip, and the light extraction efficiency of the side surface is increased, thereby increasing the light-emitting angle of the chip.
Further, the covering the insulating passivation layer and the reflecting layer above the manufactured chip further includes:
sequentially covering an insulating passivation layer and a reflecting layer above the chip without exposing the N-type gallium nitride, and exposing the P-type ohmic contact metal layer;
and covering an insulating passivation layer on the chip exposed out of the N-type gallium nitride, and exposing the N-type ohmic contact metal layer.
As is clear from the above description, the reflective layer covers only the region directly above the P-type gallium nitride. Therefore, the side wall of the cutting channel is not covered by the insulating total spectral reflection layer, and light emitted from the quantum well can easily exit to the outside of the chip when encountering the rough side wall of the cutting channel, so that the light extraction efficiency of the side wall of the cutting channel is greatly improved, and the light emitting angle of the chip is further increased.
Referring to fig. 2, another embodiment of the present invention provides a Mini LED chip, including a substrate, a patterned dielectric film, an epitaxial layer, a current spreading layer, a P-type ohmic contact metal layer, an N-type ohmic contact metal layer, an insulating passivation layer, a reflective layer, a P-type soldering metal electrode and an N-type soldering metal electrode;
the patterned dielectric film is cone-shaped and is positioned right above the substrate;
the epitaxial layer is positioned at one end of the patterned dielectric film far away from the substrate;
the epitaxial layer comprises an exposed N-type gallium nitride region and an unexposed N-type gallium nitride region;
the epitaxial layer exposing the N-type gallium nitride region comprises a cutting channel, wherein the upper side wall of the cutting channel is in an inverted trapezoid shape at the position of the epitaxial layer, the lower side wall of the cutting channel is in a positive trapezoid shape at the position of the patterned dielectric film, and the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel;
the current expansion layer is positioned at one end of the epitaxial layer, which is not exposed out of the N-type gallium nitride region, and is far away from the substrate;
the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are respectively positioned on the surfaces of the current expansion layer and the N-type gallium nitride;
the insulating passivation layer and the reflecting layer are positioned on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed;
the P-type welding metal electrode and the N-type welding metal electrode are positioned above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer.
As can be seen from the above description, preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer on the patterned dielectric film at the end far away from the substrate; after the epitaxial layer is subjected to dicing channel etching, the patterned dielectric film exposed from the side wall and the bottom of the dicing channel is etched, and the patterned dielectric film is conical, so that the lower side wall of the dicing channel with a positive trapezoid shape can be formed at the position of the patterned dielectric film; the side wall of the cutting channel is corroded, and a rough side wall surface can be formed, so that the efficiency of extracting light from the side surface of the chip is increased by adopting a side surface roughening mode, the overall brightness of the chip is improved, the occupation ratio of emergent light of the side surface is increased, and the luminous angle of the chip is increased; the insulating passivation layer and the reflecting layer are covered above the prepared chip, so that the requirement of a large light emitting angle of the Mini LED chip can be met while the side wall of the chip is protected.
Further, the insulating passivation layer and the reflecting layer are located on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed, and the method further comprises the following steps:
the insulating passivation layer is positioned on the surface of the chip and exposes the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
the reflecting layer is positioned on the surface of the chip where the N-type gallium nitride region is not exposed, and the P-type ohmic contact metal layer is exposed.
As is clear from the above description, the reflective layer covers only the region directly above the P-type gallium nitride. Therefore, the side wall of the cutting channel is not covered by the insulating total spectral reflection layer, and light emitted from the quantum well can easily exit to the outside of the chip when encountering the rough side wall of the cutting channel, so that the light extraction efficiency of the side wall of the cutting channel is greatly improved, and the light emitting angle of the chip is further increased.
The invention relates to a Mini LED chip and a manufacturing method thereof, which can increase the light-emitting efficiency of the side wall of the Mini LED chip, so that the light-emitting angle of the chip can be increased, and the brightness reduction amplitude of the chip is reduced, thereby being beneficial to the wide application of the large-angle Mini LED backlight chip in various backlight products, and the following description is provided by a specific implementation manner:
example 1
Referring to fig. 1 to 4 and 6, a method for manufacturing a Mini LED chip includes the steps of:
s1, preparing a conical patterned dielectric film 2 on a substrate, and growing an epitaxial layer at one end of the patterned dielectric film 2 far away from the substrate 1.
Wherein, the preparing the cone-shaped patterned dielectric film 2 on the substrate comprises:
and depositing a dielectric film on the substrate, and carrying out photoetching and etching on the dielectric film according to the photoetching mask pattern to obtain the cone-shaped patterned dielectric film 2.
Specifically, in this embodiment, a dielectric film is deposited on a substrate, where the dielectric film may be SiO 2 、Al 2 O 3 Or Si (Si) 3 N 4 Then, a patterned dielectric film 2 is formed on the dielectric film by photolithography and etching, and a schematic diagram of the used photolithography mask is shown in fig. 3.
Wherein growing an epitaxial layer at an end of the patterned dielectric film 2 away from the substrate 1 comprises:
and sequentially growing N-type gallium nitride 3, a multi-layer quantum well 4 and P-type gallium nitride 5 at one end of the patterned dielectric film far away from the substrate to obtain an epitaxial layer.
Specifically, in the present embodiment, an LED epitaxial layer is epitaxially grown on a substrate 1 having a patterned dielectric film 2, and the epitaxial layer mainly includes N-type gallium nitride 3, a multilayer quantum well 4, and P-type gallium nitride 5.
S2, carrying out cutting channel 13 etching on the epitaxial layer.
The method for etching the dicing channels of the epitaxial layer comprises the following steps:
and photoetching and etching the epitaxial layer to expose the surface of the N-type gallium nitride 3.
The step of etching the scribe line 13 on the epitaxial layer includes:
and etching the epitaxial layer by using the photoresist or the dielectric layer as a mask to form a cutting channel 13, and forming an inverted trapezoid cutting channel upper side wall at the epitaxial layer.
Specifically, referring to fig. 4, after the epitaxial wafer is subjected to a photolithography and etching process, the surface of the N-type gallium nitride 3 is exposed; and then etching the periphery of the chip by using the photoresist, the dielectric layer or the combination of the photoresist and the dielectric layer as a mask to form a cutting channel 13.
And S3, etching the patterned dielectric film 2 with the exposed side walls and the exposed bottom of the cutting channel, and forming a right trapezoid lower side wall of the cutting channel at the position of the patterned dielectric film 2.
Specifically, after the etching of the cutting channel 13 is completed, the exposed patterned medium 2 on the bottom and the side wall of the cutting channel 13 is removed by wet etching, the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel, and the overall shape of the side wall of the cutting channel is a folded line shape of an inverted trapezoid plus a trapezoid.
And S4, corroding the side wall of the cutting channel to form a rough side wall of the cutting channel.
Etching the side wall of the cutting channel by using a coarsening etching solution at a preset temperature and a preset time, and forming a rough side wall of the cutting channel on the epitaxial layer part with the N-type gallium nitride 3;
the roughening etching solution contains KOH, naOH, H 3 PO 4 Or TMAH.
Specifically, referring to fig. 2, epitaxial etching is performed on the sidewall of the scribe line at a certain temperature, so as to form a rough sidewall of the scribe line. Since the crystallinity of the epitaxial layer adjacent to the dielectric layer 2 is general, and part of the epitaxial surface is N-polar, the epitaxial layer is easier to be corroded by the solution and forms a rough side wall morphology, while in the prior art, since most of the side wall of the dicing channel above the patterned dielectric is Ga-polar, the roughness of the pattern formed by roughening the solution is lower, so that the coarsening degree of etching the flip chip is weaker.
The coarsening corrosion solution is KOH, naOH, H 3 PO 4 TMAH and the like are required to be corroded by matching with different temperatures and times, and the positive trapezoid rough shape of the lower part of the side wall is more beneficial to taking out light from the side surface of the chip.
And S5, covering the insulating passivation layer 7 and the reflecting layer 8 on the prepared chip to obtain the Mini LED chip.
Wherein, before covering the insulating passivation layer 7 and the reflecting layer 8 above the prepared chip, the method comprises the following steps:
covering a current expansion layer 6 on the area of the chip which is not subjected to photoetching and etching on the epitaxial layer;
and respectively manufacturing a P-type ohmic contact metal layer 9 and an N-type ohmic contact metal layer 11 on the surfaces of the current expansion layer and the N-type gallium nitride.
Wherein, covering the insulating passivation layer 7 and the reflecting layer 8 above the prepared chip comprises:
an insulating passivation layer 7 and a reflecting layer 8 are covered above the prepared chip in sequence, and the P-type ohmic contact metal layer 9 and the N-type ohmic contact metal layer 11 are exposed;
the method comprises the following steps of covering the insulating passivation 7 layer and the reflecting layer 8 on the prepared chip:
and respectively manufacturing a P-type welding metal electrode 10 and an N-type welding metal electrode 12 above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer.
Specifically, in this embodiment, the current expansion layer 6 is first coated, the P-type ohmic contact metal layer 9 and the N-type ohmic contact metal layer 11 are fabricated, and then the insulating passivation layer 7 is deposited, the pattern is formed, and the insulating total spectral reflection layer 8 is deposited, photo-etched and etched to form a pattern;
after covering the reflecting layer 8, a P-type welding metal electrode 10 and an N-type welding metal electrode 12 are also required to be manufactured; cutting the splinters to form core particles; chip testing, sorting and film pouring; flip-chip packaging is carried out on the PCB substrate in a tin paste or AuSn eutectic mode, so that light of the chip is emitted from the back surface of the sapphire substrate 1;
and combining the original process of plating a part of reflecting film on the back surface of the substrate, the light which is originally partially and directly emitted from the back surface of the sapphire can be reflected back into the chip and emitted from the side surface of the chip after being reflected again by the front surface reflecting layer, so that the side surface luminous duty ratio of the chip is further improved, and the requirement of a Mini LED chip on a large luminous angle is realized.
Therefore, referring to fig. 2 and 4, an insulating total spectral reflection layer 8 is also deposited on the scribe line of the conventional flip chip, but the light emitted from the multiple quantum well layer 4 is reflected back into the chip when encountering the scribe line sidewall, so that the side light emission is reduced and the light emission angle of the chip is reduced. In this embodiment, after the dicing street side wall corrosion roughening process is adopted, even if the dicing street side wall is covered by the total spectral reflection layer 8, since the lower part of the dicing street side wall is wholly right trapezoid, the total spectral reflection layer 8 covered on the dicing street side wall is very thin, the reflection efficiency is poor, and in addition, the surface roughness of the side wall of the portion is large, and the above three points all enable light to easily exit from the side wall of the right trapezoid to the outside of the chip, so that the side light extraction efficiency is improved, and the light emitting angle of the chip is increased.
In another alternative embodiment, referring to fig. 6, the P-type ohmic contact metal layer 9 and the N-type ohmic contact metal layer 11 are not formed, and ohmic contact is directly formed between the P-type bonding metal electrode 10 and the N-type bonding metal electrode 12 and the current spreading layer 6 or the N-type gallium nitride 3.
Example two
Referring to fig. 1, 3, 5 and 7, the difference between the present embodiment and the first embodiment is that the deposition position of the reflective film is different, specifically:
the covering of the insulating passivation layer and the reflecting layer above the prepared chip further comprises:
sequentially covering an insulating passivation layer and a reflecting layer above the chip without exposing the N-type gallium nitride, and exposing the P-type ohmic contact metal layer;
and covering an insulating passivation layer on the chip exposed out of the N-type gallium nitride, and exposing the N-type ohmic contact metal layer.
In an alternative embodiment, referring to fig. 5, the insulating total spectral reflection layer 8 is first patterned by photolithography, and then deposited, and then lift-off is used to pattern the insulating total spectral reflection layer 8 so that it covers only the region directly above the P-type gallium nitride 5. Therefore, the side wall of the cutting channel is not covered by the insulating total spectral reflection layer, and light emitted from the quantum well can easily exit to the outside of the chip when encountering the rough side wall of the cutting channel, so that the light extraction efficiency of the side wall of the cutting channel is greatly improved, and the light emitting angle of the chip is increased.
In another alternative embodiment, referring to fig. 7, the P-type ohmic contact metal layer 9 and the N-type ohmic contact metal layer 11 are not fabricated, and the insulating total spectral reflection layer 8 is first photo-etched and then deposited, so that the insulating total spectral reflection layer is not covered on the sidewall of the scribe line while ohmic contact is directly formed between the P-type bonding metal electrode 10 and the N-type bonding metal electrode 12 and the current spreading layer 6 or the N-type gallium nitride 3, thereby increasing the light emitting angle of the chip.
Example III
Referring to fig. 2 and fig. 5 to fig. 7, a Mini LED chip includes a substrate, a patterned dielectric film, an epitaxial layer, a current spreading layer, a P-type ohmic contact metal layer, an N-type ohmic contact metal layer, an insulating passivation layer, a reflective layer, a P-type soldering metal electrode and an N-type soldering metal electrode;
the patterned dielectric film is cone-shaped and is positioned right above the substrate;
the epitaxial layer is positioned at one end of the patterned dielectric film far away from the substrate;
the epitaxial layer comprises an exposed N-type gallium nitride region and an unexposed N-type gallium nitride region;
the epitaxial layer exposing the N-type gallium nitride region comprises a cutting channel, wherein the upper side wall of the cutting channel is in an inverted trapezoid shape at the position of the epitaxial layer, the lower side wall of the cutting channel is in a positive trapezoid shape at the position of the patterned dielectric film, and the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel;
the current expansion layer is positioned at one end of the epitaxial layer, which is not exposed out of the N-type gallium nitride region, and is far away from the substrate;
the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are respectively positioned on the surfaces of the current expansion layer and the N-type gallium nitride;
the insulating passivation layer and the reflecting layer are positioned on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed;
the P-type welding metal electrode and the N-type welding metal electrode are positioned above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer.
In an alternative embodiment, referring to fig. 5, the insulating total spectral reflection layer is first etched and then deposited so that the insulating total spectral reflection layer covers only the region directly above the P-type gallium nitride.
In another alternative embodiment, referring to fig. 6, the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are not formed, and ohmic contact is directly formed by the P-type bonding metal electrode and the N-type bonding metal electrode and the current spreading layer or the N-type gallium nitride.
In another alternative embodiment, referring to fig. 7, the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are not formed, and the insulating total spectral reflection layer is first etched and then deposited so that the insulating total spectral reflection layer covers only the region directly above the P-type gallium nitride.
In summary, according to the Mini LED chip and the manufacturing method thereof provided by the invention, a cone-shaped patterned dielectric film is prepared on a substrate, and an epitaxial layer is grown at one end of the patterned dielectric film far away from the substrate; carrying out dicing channel etching on the epitaxial layer, wherein after dicing channel etching is finished, part of patterned medium is exposed at the bottom of the sidewall of the dicing channel, and the sidewall of the dicing channel and the patterned medium film exposed at the bottom need to be etched; the exposed epitaxy is an N-polar surface, so that anisotropic corrosion is easy to carry out on the side wall of the cutting channel by using a solution, and a rough side wall surface can be formed, so that the efficiency of extracting light from the side surface of the chip is increased by adopting a side surface roughening mode, the overall brightness of the chip is improved, meanwhile, the occupation ratio of emergent light of the side surface is increased, and the effect of increasing the light emitting angle is realized; since most of the side walls of the cutting channel above the patterning medium are Ga-polar, the roughness of the patterns formed by coarsening the solution is lower, the coarsening degree is weaker, the side walls of the upper cutting channel are inverted trapezoids, and the top surfaces of the side walls of the lower cutting channel are the bottom surfaces of the side walls of the upper cutting channel. The overall cutting channel side wall shape formed in this way is a folded line shape of an inverted trapezoid plus a positive trapezoid, and the positive trapezoid rough shape of the side wall near the lower part is more beneficial to taking out light from the side surface of the chip, so that the overall brightness of the chip is improved, and meanwhile, the light emitting angle is increased. When the reflecting film is covered, the reflecting film can be covered on the upper part of the chip, or the reflecting layer can be covered on the upper part of the P-type gallium nitride epitaxial layer; only when the reflecting layer is covered above the P-type gallium nitride epitaxial layer, the light extraction efficiency of the side face of the chip is higher, the light emitting angle of the chip can be increased by one part, and the original process of plating a part of reflecting film on the back face of the substrate is combined, so that the light which is originally partially directly emitted from the back face of the sapphire is reflected back into the chip, is reflected again by the front reflecting layer and then is emitted from the side face of the chip, the light emitting occupation ratio of the side face of the chip is further improved, and the requirement of the Mini LED chip on a large light emitting angle is met.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent changes made by the specification and drawings of the present invention, or direct or indirect application in the relevant art, are included in the scope of the present invention.
Claims (6)
1. The Mini LED chip manufacturing method is characterized by comprising the following steps:
preparing a cone-shaped patterned dielectric film on a substrate, and growing an epitaxial layer on one end of the patterned dielectric film far away from the substrate: sequentially growing N-type gallium nitride, a multi-layer quantum well and P-type gallium nitride at one end of the patterned dielectric film far away from the substrate to obtain an epitaxial layer;
carrying out cutting channel etching on the epitaxial layer;
etching the patterned dielectric film exposed from the side wall and the bottom of the cutting channel, and forming a right trapezoid lower side wall of the cutting channel at the position of the patterned dielectric film;
corroding the side wall of the cutting channel to form a rough side wall of the cutting channel;
covering an insulating passivation layer and a reflecting layer above the chip with the rough cutting channel side wall to obtain a Mini LED chip;
the step of carrying out dicing street etching on the epitaxial layer comprises the following steps:
etching the epitaxial layer by using the photoresist or the dielectric layer as a mask, and forming an inverted trapezoid upper side wall of the cutting channel at the epitaxial layer;
forming a right trapezoid cutting path lower side wall at the position of the patterned dielectric film comprises the following steps:
the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel;
the covering the insulating passivation layer and the reflecting layer above the chip forming the rough cutting path side wall comprises the following steps:
sequentially covering an insulating passivation layer and a reflecting layer above the chip with the rough cutting channel side wall, and exposing the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
the method comprises the following steps of covering an insulating passivation layer and a reflecting layer above a chip with rough cutting channel side walls:
respectively manufacturing a P-type welding metal electrode and an N-type welding metal electrode above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
etching the dicing street side wall to form a rough dicing street side wall comprising:
etching the side wall of the cutting channel by using a coarsening etching solution at a preset temperature and for a preset time to form a rough side wall of the cutting channel on an epitaxial layer part with N-type gallium nitride, wherein the surface of the epitaxial layer part comprises an N-polarity surface;
the roughening etching solution contains KOH, naOH, H 3 PO 4 Or TMAH.
2. The method of manufacturing a Mini LED chip according to claim 1, wherein said preparing a cone-shaped patterned dielectric film on a substrate comprises:
and depositing a dielectric film on the substrate, and carrying out photoetching and etching on the dielectric film according to the photoetching mask pattern to obtain the cone-shaped patterned dielectric film.
3. The method for manufacturing a Mini LED chip according to claim 1, wherein before dicing street etching is performed on the epitaxial layer, comprising:
and photoetching and etching the epitaxial layer to expose the surface of the N-type gallium nitride.
4. A method of manufacturing a Mini LED chip according to claim 3, wherein said covering an insulating passivation layer and a reflective layer over the chip forming rough scribe line sidewalls comprises:
covering a current expansion layer on a region, which is not subjected to photoetching and etching, of the epitaxial layer on a chip with rough cutting channel side walls;
and respectively manufacturing a P-type ohmic contact metal layer and an N-type ohmic contact metal layer on the surfaces of the current expansion layer and the N-type gallium nitride.
5. The method of manufacturing a Mini LED chip according to claim 3, wherein said covering an insulating passivation layer and a reflective layer over the chip forming rough scribe line sidewalls further comprises:
sequentially covering an insulating passivation layer and a reflecting layer above the chip without exposing the N-type gallium nitride, and exposing the P-type ohmic contact metal layer;
and covering an insulating passivation layer on the chip exposed out of the N-type gallium nitride, and exposing the N-type ohmic contact metal layer.
6. The Mini LED chip is characterized by comprising a substrate, a patterned dielectric film, an epitaxial layer, a current expansion layer, a P-type ohmic contact metal layer, an N-type ohmic contact metal layer, an insulating passivation layer, a reflecting layer, a P-type welding metal electrode and an N-type welding metal electrode;
the patterned dielectric film is cone-shaped and is positioned right above the substrate;
the epitaxial layer is positioned at one end of the patterned dielectric film far away from the substrate;
the epitaxial layer comprises an exposed N-type gallium nitride region and an unexposed N-type gallium nitride region;
the epitaxial layer exposing the N-type gallium nitride region comprises a cutting channel, wherein the upper side wall of the cutting channel is in an inverted trapezoid shape at the position of the epitaxial layer, the lower side wall of the cutting channel is in a positive trapezoid shape at the position of the patterned dielectric film, and the top surface of the lower side wall of the cutting channel is the bottom surface of the upper side wall of the cutting channel;
the current expansion layer is positioned at one end of the epitaxial layer, which is not exposed out of the N-type gallium nitride region, and is far away from the substrate;
the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are respectively positioned on the surfaces of the current expansion layer and the N-type gallium nitride;
the insulating passivation layer and the reflecting layer are positioned on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed;
the P-type welding metal electrode and the N-type welding metal electrode are positioned above the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
the insulating passivation layer and the reflecting layer are positioned on the surface of the chip, and the P-type ohmic contact metal layer and the N-type ohmic contact metal layer are exposed, and the insulating passivation layer and the reflecting layer further comprise:
the insulating passivation layer is positioned on the surface of the chip and exposes the P-type ohmic contact metal layer and the N-type ohmic contact metal layer;
the reflecting layer is positioned on the surface of the chip where the N-type gallium nitride region is not exposed, and the P-type ohmic contact metal layer is exposed;
rough cutting channel side walls are formed on the epitaxial layer part with the N-type gallium nitride, and the surface of the epitaxial layer part comprises an N-polarity surface.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436630A (en) * | 2007-11-13 | 2009-05-20 | 普光科技（广州）有限公司 | Gallium nitride base LED chip and preparation method thereof |
| CN102867837A (en) * | 2012-09-13 | 2013-01-09 | 中国科学院半导体研究所 | Manufacture method of array type high-voltage LED device |
| CN106340571A (en) * | 2016-09-12 | 2017-01-18 | 华灿光电（浙江）有限公司 | Light emitting diode and manufacturing method thereof |
| CN109192833A (en) * | 2018-08-22 | 2019-01-11 | 大连德豪光电科技有限公司 | Light-emitting diode chip for backlight unit and preparation method thereof |
| CN208400865U (en) * | 2018-06-15 | 2019-01-18 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10069037B2 (en) * | 2015-04-20 | 2018-09-04 | Epistar Corporation | Light-emitting device and manufacturing method thereof |
-
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436630A (en) * | 2007-11-13 | 2009-05-20 | 普光科技（广州）有限公司 | Gallium nitride base LED chip and preparation method thereof |
| CN102867837A (en) * | 2012-09-13 | 2013-01-09 | 中国科学院半导体研究所 | Manufacture method of array type high-voltage LED device |
| CN106340571A (en) * | 2016-09-12 | 2017-01-18 | 华灿光电（浙江）有限公司 | Light emitting diode and manufacturing method thereof |
| CN208400865U (en) * | 2018-06-15 | 2019-01-18 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips |
| CN109192833A (en) * | 2018-08-22 | 2019-01-11 | 大连德豪光电科技有限公司 | Light-emitting diode chip for backlight unit and preparation method thereof |
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