CN113725360A - Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof - Google Patents
Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof Download PDFInfo
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- CN113725360A CN113725360A CN202111025360.3A CN202111025360A CN113725360A CN 113725360 A CN113725360 A CN 113725360A CN 202111025360 A CN202111025360 A CN 202111025360A CN 113725360 A CN113725360 A CN 113725360A
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- JAAVTMIIEARTKI-UHFFFAOYSA-N [S--].[S--].[Ta+4] Chemical compound [S--].[S--].[Ta+4] JAAVTMIIEARTKI-UHFFFAOYSA-N 0.000 title claims abstract description 42
- 230000008859 change Effects 0.000 title claims abstract description 14
- 238000002360 preparation method Methods 0.000 title claims description 8
- 238000010438 heat treatment Methods 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000000694 effects Effects 0.000 claims abstract description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 25
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 21
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 20
- 239000010931 gold Substances 0.000 claims description 20
- 229910052737 gold Inorganic materials 0.000 claims description 20
- 238000000151 deposition Methods 0.000 claims description 18
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 13
- 229910052719 titanium Inorganic materials 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 238000005566 electron beam evaporation Methods 0.000 claims description 9
- 230000000873 masking effect Effects 0.000 claims description 9
- 238000004528 spin coating Methods 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 2
- 239000010408 film Substances 0.000 claims 10
- 239000010409 thin film Substances 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract description 4
- 230000005669 field effect Effects 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/253—Multistable switching devices, e.g. memristors having three or more terminals, e.g. transistor-like devices
Abstract
The invention relates to a thermal field transistor based on phase change of tantalum disulfide charge density wave, which is characterized by comprising: the transistor comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covering the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is composed of heating wires; when current flows through the grid electrode, the heating wire can generate a local thermal field due to the joule heat effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, the channel resistivity is changed, and the regulation and control of the grid electrode on the channel resistivity are formed. The thermal field transistor has the characteristics of simple structure, compatibility with COMS technology, capability of realizing three-dimensional high-density integration and the like.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and relates to a preparation method of a thermal field transistor based on tantalum disulfide charge density wave phase change.
Background
A Field Effect Transistor (FET) is a semiconductor device that controls current at an output terminal by using an electric field Effect at an input terminal. Since 1960 s, field effect transistors have become irreplaceable as core elements of integrated chips in the fields of information storage and computing. For a traditional metal-oxide-semiconductor field effect transistor (MOS-FET), the core principle is that the electrostatic doping of a channel material is realized by controlling the injection and the removal of channel carriers through an external electric field (grid), so that the control of grid voltage on channel current is achieved, and the MOS-FET belongs to a voltage control type electronic element.
With the advent of the information age, the ever-increasing data processing demands have posed severe challenges to the performance and integration density of transistors. However, as the micro-nano processing size approaches the physical limit, the field effect transistor based on the electrostatic doping effect gradually exposes the short channel effect, the gate leakage is serious, the integration density is difficult to further improve, and the like.
Disclosure of Invention
Based on the technical problem, the invention provides a preparation method of a thermal field transistor based on tantalum disulfide charge density wave phase change. The thermal field transistor uses a two-dimensional material of tantalum disulfide (TaS) that supports charge density waves2) Is a medium, and specifically comprises: the transistor comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covering the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is composed of heating wires; when current flows through the grid electrode, the heating wire can generate a local thermal field due to the joule heat effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, the channel resistivity is changed, and the regulation and control of the grid electrode on the channel resistivity are formed.
Preferably, the material of the substrate is silicon.
Preferably, the dielectric layer material is silicon dioxide.
Preferably, the insulating layer material is silicon oxide.
Preferably, the metal materials of the source electrode and the drain electrode are titanium and gold, and the gold is above the titanium.
In order to prepare the thermal field transistor, the invention also provides a preparation method of the thermal field transistor based on the phase change of the tantalum disulfide charge density wave, which comprises the following specific steps:
firstly, growing a silicon oxide film with a preset thickness on a silicon substrate by a thermal oxidation method;
secondly, transferring a 1T-phase tantalum disulfide sheet with a preset thickness on the silicon oxide film in a mechanical stripping mode;
thirdly, depositing photoresist on the structure obtained in the second step by using a spin coating method, masking, exposing and developing to form a source drain electrode pattern of tantalum disulfide, then successively depositing titanium and gold films by using an electron beam evaporation method, and finally stripping the residual photoresist and the metal film above the photoresist to leave the metal source drain electrode of tantalum disulfide;
fourthly, depositing photoresist on the structure obtained in the third step by using a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, depositing a silicon oxide insulating layer with a preset thickness in an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the photoresist to leave the insulating window covering the tantalum disulfide channel;
and fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the photoresist to leave the heating wire and the electrode thereof.
Preferably, the preset thickness of the silicon oxide film is 300 nanometers; the preset thickness of the tantalum disulfide sheet is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
Preferably, in the third step, the fourth step and the fifth step of the preparation method, the remaining photoresist and the film layer above the photoresist are stripped by using a lift-off process.
The thermal field transistor provided by the invention is based on the completely new thermal field effect, has the advantages of simple structure and low manufacturing cost, is compatible with the CMOS (complementary metal oxide semiconductor) process processed by the existing integrated chip, can realize three-dimensional high-density integration, has stable performance, has response speed lower than microsecond level, has modulation frequency higher than MHz, and provides a new idea for the development of the integrated chip.
Drawings
Fig. 1 is a schematic diagram of a thermal field transistor.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The thermal field transistor based on the phase change of the tantalum disulfide charge density wave uses a metal type two-dimensional material tantalum disulfide (TaS) supporting the charge density wave2) Is a medium, as shown in fig. 1, and specifically includes: the transistor comprises a substrate 1, a dielectric layer 2 arranged on the substrate 1, a channel region 3 arranged on the dielectric layer 2, a source electrode 4 and a drain electrode 5 arranged on the channel region 3, an insulating layer 6 covering the upper surface and a grid electrode 7 arranged on the insulating layer 6; the channel region 3 is made of tantalum disulfide, and the grid 7 is composed of heating wires; when current flows through the grid 7, the heating wires can generate a local thermal field due to the joule heat effect of the current, so that the tantalum disulfide in the channel region 3 generates charge density wave phase change, the channel resistivity is changed, and the grid is formed to regulate and control the channel resistivity.
The tantalum disulfide is a layered material supporting multiple charge density wave phases, and when the temperature changes, the tantalum disulfide can be converted between the phases of different charge density waves, and the conductivity of the material can be changed. The method uses the tantalum disulfide as a channel material of the transistor, and prepares the in-situ heating wire near the tantalum disulfide. When current flows through the heating wire, a local thermal field is generated due to the joule heating effect of the current. When the temperature of the thermal field reaches the phase transition temperature of the tantalum disulfide, the tantalum disulfide is subjected to phase transition and changes along with the resistivity, so that the resistivity of the channel (the tantalum disulfide) is regulated and controlled by the heating wire (namely the grid).
The thermal field transistor is based on the local thermal field effect, and can realize response speed of a submicrosecond level and modulation frequency of MHz.
In one embodiment, the substrate 1 is made of silicon, the dielectric layer 2 is made of silicon dioxide, the insulating layer 6 is made of silicon oxide, and the source electrode 4 and the drain electrode 5 are made of gold and titanium, wherein the gold is located on the titanium.
In order to prepare the thermal field transistor, the invention also provides a preparation method of the thermal field transistor based on the phase change of the tantalum disulfide charge density wave, which comprises the following specific steps:
firstly, growing a silicon oxide film with a preset thickness on a silicon substrate by a thermal oxidation method;
secondly, transferring a 1T-phase tantalum disulfide sheet with a preset thickness on the silicon oxide film in a mechanical stripping mode;
thirdly, depositing photoresist on the structure obtained in the second step by using a spin coating method, masking, exposing and developing to form a source drain electrode pattern of tantalum disulfide, then successively depositing titanium and gold films by using an electron beam evaporation method, and finally stripping the residual photoresist and the metal film above the photoresist to leave the metal source drain electrode of tantalum disulfide;
fourthly, depositing photoresist on the structure obtained in the third step by using a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, depositing a silicon oxide insulating layer with a preset thickness in an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the photoresist to leave the insulating window covering the tantalum disulfide channel;
and fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the photoresist to leave the heating wire and the electrode thereof.
In one embodiment, the predetermined thickness of the silicon oxide film is 300 nm; the preset thickness of the tantalum disulfide sheet is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
In another embodiment, the third, fourth and fifth steps of stripping the remaining photoresist and the film thereon are all performed by lift-off process.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (8)
1. A thermal field transistor based on a tantalum disulfide charge density wave phase change, the thermal field transistor comprising: the transistor comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covering the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is composed of heating wires; when current flows through the grid electrode, the heating wire can generate a local thermal field due to the joule heat effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, the channel resistivity is changed, and the regulation and control of the grid electrode on the channel resistivity are formed.
2. The thermal field transistor of claim 1, wherein the material of the substrate is silicon.
3. The thermal field transistor of claim 1, wherein the dielectric layer material is silicon dioxide.
4. The thermal field transistor of claim 1, wherein the insulating layer material is silicon oxide.
5. The thermal field transistor of claim 1, wherein the source and drain metal materials are gold and titanium, wherein gold is 30 nm and titanium is 5 nm, and gold is located on top of titanium.
6. A preparation method of a thermal field transistor based on tantalum disulfide charge density wave phase change is characterized by comprising the following specific steps:
firstly, growing a silicon oxide film with a preset thickness on a silicon substrate by a thermal oxidation method;
secondly, transferring a 1T-phase tantalum disulfide sheet with a preset thickness on the silicon oxide film in a mechanical stripping mode;
thirdly, depositing photoresist on the structure obtained in the second step by using a spin coating method, masking, exposing and developing to form a source drain electrode pattern of tantalum disulfide, then successively depositing a titanium film and a gold film by using an electron beam evaporation method, and finally stripping the residual photoresist and a metal film above the photoresist to leave a metal source drain electrode of tantalum disulfide;
fourthly, depositing photoresist on the structure obtained in the third step by using a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, depositing a silicon oxide insulating layer with a preset thickness in an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the photoresist to leave the insulating window covering the tantalum disulfide channel;
and fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the photoresist to leave the heating wire and the electrode thereof.
7. The method of claim 6, wherein the predetermined thickness of the silicon oxide film is 300 nm; the preset thickness of the tantalum disulfide sheet is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
8. The method of claim 6, wherein in the third step, the fourth step and the fifth step, the remaining photoresist and the thin film layer thereon are stripped off by lift-off process.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111025360.3A CN113725360A (en) | 2021-09-02 | 2021-09-02 | Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof |
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| CN202111025360.3A CN113725360A (en) | 2021-09-02 | 2021-09-02 | Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof |
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