CN113721794B - Gate scanning touch scanning integrated circuit architecture, driving method thereof and display device - Google Patents
Gate scanning touch scanning integrated circuit architecture, driving method thereof and display device Download PDFInfo
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- CN113721794B CN113721794B CN202111051442.5A CN202111051442A CN113721794B CN 113721794 B CN113721794 B CN 113721794B CN 202111051442 A CN202111051442 A CN 202111051442A CN 113721794 B CN113721794 B CN 113721794B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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Abstract
The first cascade gate scanning circuit is configured to output a plurality of first scanning signals according to cascade sequence after receiving a first starting signal, and output a first touch starting signal after outputting a last stage of first scanning signals; the first touch module receives the first touch starting signal and then executes touch scanning; the second cascade gate scanning circuit is configured to output a plurality of second cascade scanning signals according to a cascade sequence after receiving the second starting signal, and output a second touch starting signal after outputting a second scanning signal of the last stage; the second touch module receives the second touch starting signal and then executes touch scanning; the first start signal and the second start signal are respectively input into the first cascade gate scanning circuit and the second cascade gate scanning circuit through different wires.
Description
[ field of technology ]
The invention relates to the technical field of display, in particular to a grid scanning touch scanning integrated circuit architecture, a driving method thereof and a display device.
[ background Art ]
Touch screens have found wide application in recent years. For example, it is applied to liquid crystal televisions, mobile phones, digital cameras, computer screens, notebook computer screens, etc., and is dominant in the field of flat panel display. Touch screens In the existing market mainly include an externally-hung Touch screen, in which a sensing line is directly manufactured between front and rear glass of a panel (In Cell Touch), and a Touch screen setting method In which a sensing line is manufactured between a color filter substrate and a polarizer (On Cell Touch).
The touch screen with sensing lines directly manufactured between the front glass and the rear glass of the panel has the characteristics of light weight and thinness, is favored by various manufacturers, but has limited development due to low yield, easy interference, large size and the like.
In the prior art, a touch screen directly manufacturing a sensing line between front and rear glass of a panel performs touch scanning in a last blank time period (blanking-time) in one frame, so each frame only has one touch scanning time, and has low refresh rate and insensitive touch. Although the time division multiplexing method can improve the scanning frequency of touch control, the gate driving circuit is required to stop working during touch control scanning, so that the high potential of the cascade node is kept for too long, the cascade is disabled, and the subsequent gate driving circuit cannot work normally.
Therefore, a gate scan circuit (GOA) is needed to improve the scan frequency of the touch screen without affecting the level-pass characteristics, so as to solve the problems of the prior art.
[ invention ]
In order to solve the above-mentioned problems, the present invention provides a gate scan touch scan integrated circuit architecture for improving the problem that the high potential retention time of the level pass node is too long, which results in failure of the level pass and subsequent failure of the gate driving circuit.
In order to achieve the above object, the present invention provides a gate scan touch scan integration circuit architecture configured to complete a plurality of touch scans within a gate scan of an image, the gate scan touch scan integration circuit architecture comprising:
the first cascade gate scanning circuit comprises a plurality of first gate scanning units in cascade connection, the first cascade gate scanning circuit is configured to output a plurality of first scanning signals according to a cascade connection sequence after receiving a first starting signal, and the first cascade gate scanning circuit is configured to output a first touch starting signal after outputting a last stage of the first scanning signals;
the first touch module is configured to receive the first touch starting signal and then execute touch scanning;
the second cascade gate scanning circuit is connected with the first cascade gate scanning circuit and comprises a plurality of cascade second gate scanning units, the second cascade gate scanning circuit is configured to output a plurality of second scanning signals according to a cascade sequence after receiving a second starting signal, and the second cascade gate scanning circuit is configured to output a second touch starting signal after outputting a second scanning signal of the last stage; and
the second touch module is configured to execute touch scanning after receiving the second touch starting signal;
the first start signal and the second start signal are respectively input into the first cascade gate scanning circuit and the second cascade gate scanning circuit through different wires.
In one embodiment of the present invention, the first cascade gate scan circuit is configured to receive a first constant voltage low potential, a second constant voltage low potential, and a plurality of clock signals, wherein the first gate scan unit of a first stage is configured to access the first start signal, the first constant voltage low potential, the second constant voltage low potential, a pull-down signal, and the clock signals, and is configured to output the first scan signal of a first stage.
In an embodiment of the invention, the first gate scanning unit of a last stage of the first cascade gate scanning circuit is configured to output the first scanning signal and the first touch start signal.
In one embodiment of the present invention, the second cascade gate scan circuit is configured to receive a first constant voltage low potential, a second constant voltage low potential, and a plurality of clock signals, wherein the second gate scan unit of a first stage is configured to access the second start signal, the first constant voltage low potential, the second constant voltage low potential, the pull-down signal, and the clock signals, and is configured to output the second scan signal of the first stage.
In an embodiment of the invention, the second gate scan unit of the last stage of the second cascade gate scan circuit is configured to output the second scan signal and the second touch start signal.
In an embodiment of the invention, when the first touch module is configured to perform touch scanning, a first pull-down signal is output to the first cascaded gate scanning circuit to maintain the first scanning signals of all the plurality of first gate scanning units at a low potential.
In an embodiment of the invention, the second touch module is configured to output a second pull-down signal to the second cascade gate scan circuit to maintain the second scan signals of all the plurality of second gate scan cells at a low level when performing the touch scan.
In order to achieve the above objective, the present invention further provides a driving method of a gate scan touch scan integrated circuit architecture, comprising:
the first cascade gate scanning circuit receives the first starting signal;
the first cascade gate scanning circuit outputs a plurality of first scanning signals according to a cascade sequence;
the first cascade gate scanning circuit outputs the first scanning signal of the last stage and then outputs the first touch starting signal;
the second cascade gate scanning circuit receives the second start signal;
the second cascade gate scanning circuit outputs a plurality of second scanning signals according to a cascade sequence; and
and after the second cascade gate scanning circuit outputs the second scanning signal of the last stage, outputting the second touch starting signal.
In an embodiment of the present invention, after the step of outputting the first touch start signal after the first cascade gate scanning circuit outputs the last stage of the first scanning signal, the method further includes the step of the first touch module executing touch scanning and outputting a first pull-down signal; after the step of outputting the second touch start signal after the first scanning signal of the last stage is output by the second cascade gate scanning circuit, the method further comprises the step of executing touch scanning by the second touch module and outputting a second pull-down signal.
In order to achieve the above object, the present invention further provides a display panel, comprising:
a display substrate;
pixels distributed in an array are arranged on the display substrate;
the touch electrodes are distributed in an array mode and are arranged on the display substrate;
the grid scanning touch scanning integrated circuit framework is arranged on the display substrate and connected with the pixels and the touch electrodes; and
the control module is configured to provide the first start signal, the second start signal, a first constant voltage low potential, a second constant voltage low potential and a plurality of clock signals.
The grid scanning touch scanning integrated circuit architecture is configured to complete a plurality of touch scans in grid scanning of one frame of image, a first cascade grid scanning circuit is configured to output a first scanning signal at the last stage, then a first touch starting signal is output to a first touch module to enable the first touch module to execute touch scanning, a second cascade grid scanning circuit is configured to output a second scanning signal at the last stage, then a second touch starting signal is output to a second touch module to enable the second touch module to execute touch scanning, so that touch scanning time is split, the times of touch scanning are doubled, and the refresh frequency of a touch panel is improved; and
the first starting signal for starting the first cascade gate scanning circuit and the second starting signal for starting the second cascade gate scanning circuit are input through different wiring lines, so that the grid scanning touch scanning integrated circuit structure can work normally after the touch scanning time is inserted, and the aim of avoiding the stage transmission failure caused by overlong high potential holding time of the stage transmission node is achieved.
[ description of the drawings ]
FIG. 1 is a block diagram of an embodiment of a gate scan touch scan integrated circuit architecture according to the present invention;
FIG. 2 is a block diagram of an embodiment of a gate scan touch scan integrated circuit architecture according to the present invention;
FIG. 3 is a schematic diagram illustrating a driving timing of an embodiment of a gate scan touch scan integrated circuit structure according to the present invention;
FIG. 4 is a block diagram of an embodiment of a gate scan touch scan integrated circuit architecture according to the present invention;
FIG. 5 is a block diagram of an embodiment of a gate scan touch scan integrated circuit architecture according to the present invention;
FIG. 6 is a flow chart illustrating an embodiment of a driving method of a grid-scan touch scan integrated circuit structure according to the present invention;
FIG. 7 is a block diagram of a display panel according to an embodiment of the invention.
[ detailed description ] of the invention
The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], etc., are only referring to the directions of the attached drawings. Accordingly, directional terminology is used to describe and understand the invention and is not limiting of the invention.
In the drawings, like structural elements are denoted by like reference numerals.
Referring to fig. 1, fig. 1 is a block diagram of an embodiment of a gate scan touch scan integrated circuit architecture according to the present invention, and the gate scan touch scan integrated circuit architecture 10 is configured to complete a plurality of touch scans within a frame.
The gate scanning touch scanning integrated circuit architecture 10 includes a first cascaded gate scanning circuit 100, including a plurality of cascaded first gate scanning units Goa to Goa n, wherein the first cascaded gate scanning circuit 100 is configured to output a plurality of first scanning signals G11 to G1n in a cascaded order after receiving a first start signal STV1, and the first cascaded gate scanning circuit 100 is configured to output a first touch start signal Tp1 after outputting a last stage of the first scanning signals G1 n; the first touch module 300 is configured to perform touch scanning after receiving the first touch start signal Tp1; the second cascade gate scan circuit 200 is connected to the first cascade gate scan circuit 100, and includes a plurality of cascade second gate scan units Goa to Goa n, the second cascade gate scan circuit 200 is configured to output a plurality of second scan signals G21 to G2n in cascade sequence after receiving the second start signal STV2, and the second cascade gate scan circuit 200 is configured to output the second touch start signal Tp2 after outputting the second scan signal G2n of the last stage; and a second touch module 400 configured to perform touch scanning after receiving the second touch start signal Tp 2.
It should be noted that, in the gate-scan touch-scan integrated circuit architecture 10 of the present invention, the first start signal STV1 and the second start signal STV2 are input into the first cascade gate scan circuit 100 and the second cascade gate scan circuit 200 through the first wire R1 and the second wire R2, respectively.
Since the timing of starting the first cascade gate scan circuit 100 and the second cascade gate scan circuit 200 in the gate scan touch scan integrated circuit architecture 10 is different, the timing of outputting the first start signal STV1 and the second start signal STV2 is different; the first start signal STV1 and the second start signal STV2 are output by using the first trace R1 and the second trace R2 respectively in a time-sharing manner, so that the problem that the first start signal STV1 or the second start signal STV2 cannot maintain the potential after touch scanning, which results in the stage transfer failure of the first cascade gate scanning circuit 100 and the second cascade gate scanning circuit 200 of the gate scanning circuit 10, does not occur.
Referring to fig. 2, fig. 2 is a block diagram illustrating an embodiment of a gate scan touch scan integrated circuit structure according to the present invention. Compared to the schematic diagram shown in fig. 1, fig. 2 discloses circuit configurations and a received signal configuration inside the first cascade gate scan circuit 100 and the second cascade gate scan circuit 200, wherein the first cascade gate scan circuit 100 is configured to receive a first constant voltage low potential VSSG, a second constant voltage low potential VSSQ and a plurality of clock signals CLK1 to CLK (N/2), the first gate scan unit of the first stage is configured to be connected to the first start signal STV1, the first constant voltage low potential VSSG, the second constant voltage low potential VSSQ, the pull-down signal and the clock signal CLK1, and is configured to output the first scan signal G1 of the first stage.
The first gate scanning unit Goa N of the last stage of the first cascade scanning circuit 100 is configured to output the first scanning signal G (N/2) of the last stage and the first touch start signal TP1, and the first touch module 300 performs the first touch scan after receiving the first touch start signal TP1, and specifically, the first touch scan may include more than one touch scan. At this time, the first touch scan performs a touch scan when the gate scan circuit 10 has not completely performed the gate scan of one frame image, so as to achieve the effect that the gate scan circuit 10 completes multiple touch scans in the gate scan of one frame image.
Further, the second cascade gate scan circuit 200 is configured to receive the first constant voltage low potential VSSG, the second constant voltage low potential VSSQ, and the plurality of clock signals CLK1 to CLK (N/2), wherein the second gate scan unit of the first stage is configured to be connected to the second start signal STV2, the first constant voltage low potential VSSG, the second constant voltage low potential VSSQ, the pull-down signal, and the clock signal CLK1, and is configured to output the second scan signal G (N/2) +1 of the first stage.
The second gate scanning unit of the last stage of the second cascade gate scanning circuit 200 is configured to output the second scanning signal G (N) of the last stage and the second touch start signal TP2, and the second touch module 400 performs the second touch scanning after receiving the second touch start signal TP2, and specifically, the second touch scanning may include more than one touch scanning. At this time, the second touch scan performs a touch scan when the gate scan circuit 10 has not completely performed the gate scan of one frame image, so that the gate scan circuit 10 completes multiple touch scans during the gate scan of one frame image.
Through the above-mentioned circuit configurations disclosed by the first cascade scanning circuit 100, the second cascade scanning circuit 200, the first touch module 300, and the second touch module 400, the gate scanning touch scanning integrated circuit architecture 10 can insert multiple touch scanning within the gate scanning time of one frame of image, so as to double the number of touch scanning times, and improve the technical effect of refreshing the touch panel. It should be noted that, as shown in fig. 2, the first start signal STV1 and the second start signal STV2 are respectively output through different circuits, so that the problem that the first start signal STV1 or the second start signal STV2 cannot maintain the potential after the touch scan to cause the stage transfer failure of the first cascade gate scan circuit 100 and the second cascade gate scan circuit 200 of the gate scan touch scan integrated circuit architecture 10 does not occur.
It should be noted that, after each of the first gate scan cells and the second gate scan cells of each of the first cascade scan circuit 100 and the second cascade scan circuit 200 completes, each of the output signals of each of the first gate scan cells and the second gate scan cells of each of the first cascade scan circuit 200 needs to be Reset, one of the implementation methods is to connect the output signal of the gate scan cell of the next clock stage to the Reset signal port Reset of the gate scan cell of the previous clock stage in the wiring stage, for example, the 5 th gate scan cell of fig. 2 outputs the signal G5 and resets the 1 st gate scan cell, and the Reset signal port Reset of the first gate scan cell of the last stage of the first cascade scan circuit 100 connects the output signal of the second gate scan cell of the first stage of the first cascade scan circuit 200 to perform the signal Reset, wherein the output signal of the first gate scan cell of the 4 th stage connects the Reset signal port Reset of the first gate scan cell of the previous stage. The output signal of the second gate scanning unit after the 4 th stage is connected to the Reset signal port Reset of the second gate scanning unit before the 4 th stage.
Referring to fig. 3, fig. 3 is a schematic diagram illustrating a driving timing of an embodiment of a gate scan touch scan integrated circuit structure according to the present invention. The potential change of each signal source is shown in a frame time, wherein the first start signal STV1 and the second start signal STV2 are output in a time-sharing manner and are provided by different signal lines, so that the possibility that the first start signal STV1 or the second start signal STV2 cannot maintain the potential in time after the touch scanning to cause the stage transmission failure of the first cascade gate scanning circuit 100 and the second cascade gate scanning circuit 200 of the gate scanning touch scanning integrated circuit architecture 10 does not occur.
Referring to fig. 2 and 3, it should be noted that the gate scan touch scan integrated circuit architecture 10 alternately works through the first cascade scan circuit 100 and the second cascade scan circuit 200, and in the second touch period, the first output high-potential signal LC 1 and the second output high-potential signal LC2 are inverted, so that the corresponding first cascade scan circuit 100 and the second cascade scan circuit 200 alternately work under different potentials, so as to increase the service life.
Referring to fig. 4 and 5, fig. 4 and 5 are schematic block diagrams of an embodiment of a gate scan touch scan integrated circuit structure according to the present invention. The difference between the embodiment of fig. 1 and fig. 2 is that, when the first touch module 300 is configured to perform touch scanning, the first pull-down signal Dwn1 is further outputted to the first cascaded gate scanning circuit 100 to maintain the first scanning signals of all the plurality of first gate scanning units at a low potential, so as to ensure that all the first gate scanning units of the first cascaded gate scanning circuit 100 are in a closed state when the touch sensing is performed; the second touch module 400 is configured to output a second pull-down signal Dwn2 to the second cascade gate scan circuit 200 to maintain the second scan signals of all the plurality of second gate scan cells at a low potential when performing touch scanning, so as to ensure that all the second gate scan cells of the second cascade gate scan circuit 200 are in a closed state when performing touch sensing.
The present invention also provides a driving method of a gate scan touch scan integrated circuit architecture, referring to fig. 6, fig. 6 is a flow chart of an embodiment of the driving method of a gate scan touch scan integrated circuit architecture of the present invention, which includes:
s1, a first cascade gate scanning circuit receives a first starting signal;
s2, the first cascade gate scanning circuit outputs a plurality of first scanning signals according to a cascade sequence;
s3, outputting a first touch starting signal after the first cascade gate scanning circuit outputs a first scanning signal of the last stage;
s4, a second cascade gate scanning circuit receives a second starting signal;
s5, the second cascade gate scanning circuit outputs a plurality of second scanning signals according to a cascade sequence; and
s6, outputting a second touch start signal after the second cascade gate scanning circuit outputs a second scanning signal of the last stage.
In addition, after the step of outputting the first scanning signal of the last stage and the first touch start signal by the first cascade gate scanning circuit, the first touch module executes touch scanning and outputs a first pull-down signal, so that the first scanning signals of all the plurality of first gate scanning units are maintained to be low potential, and all the first gate scanning units of the first cascade gate scanning circuit are in a closed state when touch sensing is ensured;
after the second cascade gate scanning circuit outputs the last stage of first scanning signal and the step of outputting the second touch starting signal, the method further comprises the steps that the second touch module executes touch scanning and outputs a second pull-down signal, the second scanning signals of all the plurality of second gate scanning units are maintained to be low potential, and when touch sensing is ensured, all the second gate scanning units of the second cascade gate scanning circuit are in a closed state.
Referring to fig. 7, fig. 7 is a block diagram of a display panel according to an embodiment of the invention. The display panel 1 includes a display substrate B1, pixels P11, P12, P13, P14, P21, P22, P23, P24, P31, P32, P41, P42 to PX disposed on the display substrate B1 and distributed in array, touch electrodes T11, T12, T13, T21, T22, T31 to Tx disposed on the display substrate B1 and distributed in array, a gate scan touch scan integrated circuit structure 10, a data driving circuit structure 30, and a control module 20 for providing a first start signal, a second start signal, a first constant voltage low potential, a second constant voltage low potential, and a plurality of clock signals to the gate scan touch scan integrated circuit structure 10 according to any of the above embodiments disposed on the display substrate B1 and connected to the pixels and the touch electrodes. The pixel and the touch electrode shown in fig. 7 are intended to describe that the pixel and the touch electrode are controlled by the first/second gate scanning unit and the first/second touch module in the gate scanning touch scanning integrated circuit architecture 10, respectively, and the number of the pixel and the touch electrode in the display panel 1 is not limited to the number shown in the figure.
Through the grid scanning touch scanning integrated circuit architecture, the driving method and the display device, a second touch starting signal is output to the second touch module to enable the second touch module to execute touch scanning, so that the touch scanning time is split, the times of touch scanning are doubled, and the refresh frequency of the touch panel is improved; and ensuring that the grid scanning circuit can work normally after the touch scanning time is inserted, and achieving the effect of avoiding the influence of the threshold voltage of the driving transistor on the pixel circuit due to the cascade failure caused by the fact that the high potential of the cascade node is kept for too long to leak electricity.
The foregoing is merely a preferred embodiment of the invention, and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the invention.
Claims (10)
1. A gate scan touch scan integration circuit architecture configured to complete a plurality of touch scans within a gate scan of an image, the gate scan touch scan integration circuit architecture comprising:
the first cascade gate scanning circuit comprises a plurality of first gate scanning units in cascade connection, the first cascade gate scanning circuit is configured to output a plurality of first scanning signals according to a cascade connection sequence after receiving a first starting signal, and the first cascade gate scanning circuit is configured to output a first touch starting signal after outputting a last stage of the first scanning signals;
the first touch module is configured to receive the first touch starting signal and then execute touch scanning;
the second cascade gate scanning circuit is connected with the first cascade gate scanning circuit and comprises a plurality of cascade second gate scanning units, the second cascade gate scanning circuit is configured to output a plurality of second scanning signals according to a cascade sequence after receiving a second starting signal, and the second cascade gate scanning circuit is configured to output a second touch starting signal after outputting a second scanning signal of the last stage; and
the second touch module is configured to execute touch scanning after receiving the second touch starting signal;
the first start signal and the second start signal are respectively input into the first cascade gate scanning circuit and the second cascade gate scanning circuit through different wires, and the time points of outputting the first start signal and the second start signal are different.
2. The gate-scan touch scan integrated circuit architecture of claim 1, wherein the first cascaded gate scan circuit is configured to receive a first constant voltage low potential, a second constant voltage low potential, and a plurality of clock signals, wherein the first gate scan cell of a first stage is configured to access the first start signal, the first constant voltage low potential, the second constant voltage low potential, a pull-down signal, and the clock signals, and is configured to output the first scan signal of a first stage.
3. The gate scan touch scan integrated circuit architecture of claim 2, wherein the first gate scan cell of a last stage of the first cascaded gate scan circuit is configured to output the first scan signal and the first touch enable signal.
4. The gate-scan touch scan integrated circuit architecture of claim 1, wherein the second cascaded gate-scan circuit is configured to receive a first constant voltage low potential, a second constant voltage low potential, and a plurality of clock signals, wherein the second gate-scan cell of a first stage is configured to access the second start signal, the first constant voltage low potential, the second constant voltage low potential, a pull-down signal, and the clock signals, and is configured to output the second scan signal of a first stage.
5. The gate scan touch scan integrated circuit architecture of claim 4, wherein the second gate scan cell of a last stage of the second cascaded gate scan circuit is configured to output the second scan signal and the second touch enable signal.
6. The gate scan touch scan integrated circuit architecture of claim 1, wherein the first touch module is configured to output a first pull-down signal to the first cascaded gate scan circuit to maintain the first scan signals of all of the plurality of first gate scan cells at a low level when performing a touch scan.
7. The gate scan touch scan integrated circuit architecture of claim 1, wherein the second touch module is configured to output a second pull-down signal to the second cascaded gate scan circuit to maintain the second scan signals of all of the plurality of the second gate scan cells at a low level when performing a touch scan.
8. A method for driving a gate-scan touch-scan integrated circuit structure according to any one of claims 1 to 7, comprising:
the first cascade gate scanning circuit receives the first starting signal;
the first cascade gate scanning circuit outputs a plurality of first scanning signals according to a cascade sequence;
the first cascade gate scanning circuit outputs the first scanning signal of the last stage and then outputs the first touch starting signal;
the second cascade gate scanning circuit receives the second start signal;
the second cascade gate scanning circuit outputs a plurality of second scanning signals according to a cascade sequence; and
and after the second cascade gate scanning circuit outputs the second scanning signal of the last stage, outputting the second touch starting signal.
9. The method of claim 8, wherein after the step of outputting the first touch start signal after the first scan signal is output from the last stage of the first cascade gate scan circuit, the first touch module performs touch scan and outputs a first pull-down signal; after the step of outputting the second touch start signal after the first scanning signal of the last stage is output by the second cascade gate scanning circuit, the method further comprises the step of executing touch scanning by the second touch module and outputting a second pull-down signal.
10. A display panel, comprising:
a display substrate;
pixels distributed in an array are arranged on the display substrate;
the touch electrodes are distributed in an array mode and are arranged on the display substrate;
the grid scanning touch scanning integrated circuit structure of claim 1, disposed on the display substrate and connected to the pixel and the touch electrode; and
the control module is configured to provide the first start signal, the second start signal, a first constant voltage low potential, a second constant voltage low potential and a plurality of clock signals.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015137706A1 (en) * | 2014-03-10 | 2015-09-17 | 엘지디스플레이 주식회사 | Display device and method for driving same |
| WO2015143813A1 (en) * | 2014-03-27 | 2015-10-01 | 京东方科技集团股份有限公司 | Gate driving circuit and driving method therefor and display device |
| CN105390102A (en) * | 2015-11-02 | 2016-03-09 | 武汉华星光电技术有限公司 | Gate driving circuit and display device using circuit |
| CN105702196A (en) * | 2016-04-29 | 2016-06-22 | 京东方科技集团股份有限公司 | Grid electrode driving circuit and driving method thereof and display device |
| WO2018188020A1 (en) * | 2017-04-13 | 2018-10-18 | Boe Technology Group Co., Ltd. | Shift register circuit and driving method thereof, gate driver on array circuit, and touch sensing display panel |
| WO2020118971A1 (en) * | 2018-12-15 | 2020-06-18 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
| WO2021007931A1 (en) * | 2019-07-18 | 2021-01-21 | 深圳市华星光电半导体显示技术有限公司 | Tft array substrate and display panel |
| US10977979B1 (en) * | 2020-06-09 | 2021-04-13 | Wuhan China Star Optoelectronics Technology Co., Ltd. | GOA circuit and display panel |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104505014B (en) * | 2014-12-31 | 2017-02-22 | 厦门天马微电子有限公司 | Drive circuit, array substrate and touch display device as well as drive method thereof |
-
2021
- 2021-09-08 CN CN202111051442.5A patent/CN113721794B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015137706A1 (en) * | 2014-03-10 | 2015-09-17 | 엘지디스플레이 주식회사 | Display device and method for driving same |
| WO2015143813A1 (en) * | 2014-03-27 | 2015-10-01 | 京东方科技集团股份有限公司 | Gate driving circuit and driving method therefor and display device |
| CN105390102A (en) * | 2015-11-02 | 2016-03-09 | 武汉华星光电技术有限公司 | Gate driving circuit and display device using circuit |
| CN105702196A (en) * | 2016-04-29 | 2016-06-22 | 京东方科技集团股份有限公司 | Grid electrode driving circuit and driving method thereof and display device |
| WO2018188020A1 (en) * | 2017-04-13 | 2018-10-18 | Boe Technology Group Co., Ltd. | Shift register circuit and driving method thereof, gate driver on array circuit, and touch sensing display panel |
| WO2020118971A1 (en) * | 2018-12-15 | 2020-06-18 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
| WO2021007931A1 (en) * | 2019-07-18 | 2021-01-21 | 深圳市华星光电半导体显示技术有限公司 | Tft array substrate and display panel |
| US10977979B1 (en) * | 2020-06-09 | 2021-04-13 | Wuhan China Star Optoelectronics Technology Co., Ltd. | GOA circuit and display panel |
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