CN113690870A - Electrostatic discharge circuit and signal transmission system - Google Patents
Electrostatic discharge circuit and signal transmission system Download PDFInfo
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Abstract
The invention discloses an electrostatic discharge circuit and a signal transmission system, wherein when positive electrostatic voltage exists, the electrostatic voltage is released to the ground end through a second switch module; when negative static voltage exists, the static voltage is released to the power supply end through the first switch module. Because the first switch circuit with smaller conduction critical voltage and the second switch circuit with larger breakdown voltage are used in the first switch module, and the third switch circuit with smaller conduction critical voltage and the fourth switch circuit with larger breakdown voltage are used in the second switch module, the two switch circuits can equalize the current, thereby ensuring the reaction time of electrostatic voltage release, simultaneously avoiding the breakdown of the first switch circuit or the second switch circuit, and ensuring the safety and reliability of the circuit. In addition, even if the first switch circuit or the third switch circuit is broken down, the second switch circuit or the fourth switch circuit can continue to release the electrostatic voltage, and the signal receiving device is further prevented from being damaged.
Description
Technical Field
The invention relates to the field of safety protection, in particular to an electrostatic discharge circuit and a signal transmission system.
Background
Static electricity may be generated during the production, assembly, testing, storage and handling of the device, and may be accumulated in a human body or the device, and in some cases, the static electricity may form a discharge path to discharge the accumulated static electricity. In this case, the electrostatic voltage generated during the electrostatic discharge may reach a very high voltage (usually several kilovolts) instantaneously, which may cause damage to the device or the instrument, for example, when the signal transmitting apparatus transmits a signal to the signal receiving apparatus, the electrostatic voltage is highly likely to be transmitted to the signal receiving apparatus through the signal transmission channel, and thus the signal receiving apparatus may be directly damaged due to the excessive electrostatic voltage. Therefore, it is necessary to design an electrostatic discharge circuit to discharge an electrostatic voltage so as to prevent damage to a device or an instrument.
Disclosure of Invention
The invention aims to provide an electrostatic discharge circuit and a signal transmission system, which can prevent a first switch circuit or a second switch circuit from being broken down while ensuring the response time of electrostatic voltage release, and ensure the safety and reliability of the circuit. In addition, even if the first switch circuit or the third switch circuit is broken down, the second switch circuit or the fourth switch circuit can continue to release the electrostatic voltage, and the signal receiving device is further prevented from being damaged.
In order to solve the above technical problem, the present invention provides an electrostatic discharge circuit, including a first switch module and a second switch module, where the first switch module includes a first switch circuit and a second switch circuit, and the second switch module includes a third switch circuit and a fourth switch circuit;
a first end of the first switch circuit is connected with an output end of a signal sending device, an input end of a signal receiving device, a first end of the second switch circuit, a first end of the third switch circuit and a first end of the fourth switch circuit respectively, a second end of the first switch circuit is connected with a second end of the second switch circuit and a power supply end respectively, and a second end of the third switch circuit is connected with a second end of the fourth switch circuit and a ground end respectively;
the first switch module is used for conducting negative static voltage at the output end of the signal sending device;
the second switch module is used for conducting forward static voltage at the output end of the signal sending device;
the breakdown voltage of the second switch circuit is greater than the breakdown voltage of the first switch circuit, and the breakdown voltage of the fourth switch circuit is greater than the breakdown voltage of the third switch circuit; the conduction critical voltage of the first switch circuit is less than the conduction critical voltage of the second switch circuit, and the conduction critical voltage of the third switch circuit is less than the conduction critical voltage of the fourth switch circuit.
Preferably, the first switch circuit includes a first diode, and the third switch circuit includes a second diode;
the anode of the first diode is the first end of the first switch circuit, the cathode of the first diode is the second end of the first switch circuit, the anode of the second diode is the first end of the third switch circuit, and the cathode of the second diode is the second end of the third switch circuit.
Preferably, the first diode and the second diode are schottky diodes.
Preferably, the second switch circuit comprises a first controllable switch and a first capacitor, and the fourth switch circuit comprises a second controllable switch and a second capacitor;
a first end of the first capacitor is connected with a first end of the first controllable switch and serves as a first end of the second switch circuit, a second end of the first capacitor is connected with a control end of the first controllable switch, and a second end of the first controllable switch serves as a second end of the second switch circuit; a first end of the second capacitor is connected with a first end of the second controllable switch and serves as a first end of the fourth switch circuit, a second end of the second capacitor is connected with a control end of the second controllable switch, and a second end of the second controllable switch serves as a second end of the fourth switch circuit;
the first controllable switch is used for conducting the first end and the second end of the first controllable switch when the output end of the signal sending device has positive static voltage;
the second controllable switch is used for conducting the first end and the second end of the second controllable switch when the output end of the signal sending device has negative static voltage.
Preferably, the first controllable switch is a P-channel metal oxide semiconductor PMOS transistor, and the second controllable switch is an N-channel metal oxide semiconductor NMOS transistor;
the grid electrode of the PMOS tube is the control end of the first controllable switch, the drain electrode of the PMOS tube is the first end of the first controllable switch, and the source electrode of the PMOS tube is the second end of the first controllable switch; the grid electrode of the NMOS tube is the control end of the second controllable switch, the drain electrode of the NMOS tube is the first end of the second controllable switch, and the source electrode of the NMOS tube is the second end of the second controllable switch.
Preferably, the second switch circuit further comprises a first resistor disposed between the gate and the source of the PMOS transistor.
Preferably, the fourth switching circuit further comprises a second resistor disposed between the gate and the source of the NMOS transistor.
Preferably, the device further comprises a third resistor and a fourth resistor;
the third resistor is arranged between the output end of the signal sending device and the first end of the first switch module, and the fourth resistor is arranged between the first end of the first switch module and the input end of the signal receiving device.
In order to solve the above technical problem, the present invention further provides a signal transmission system, including the above electrostatic discharge circuit, further including a signal transmitting device and a signal receiving device.
When positive static voltage exists, the static voltage is released to the ground end through the second switch module; when negative static voltage exists, the static voltage is released to the power supply end through the first switch module. Because the first switch circuit with smaller conduction critical voltage and the second switch circuit with larger breakdown voltage are used in the first switch module, and the third switch circuit with smaller conduction critical voltage and the fourth switch circuit with larger breakdown voltage are used in the second switch module, the two switch circuits can equalize the current, thereby ensuring the reaction time of electrostatic voltage release, simultaneously avoiding the breakdown of the first switch circuit or the second switch circuit, and ensuring the safety and reliability of the circuit. In addition, even if the first switch circuit or the third switch circuit is broken down, the second switch circuit or the fourth switch circuit can continue to release the electrostatic voltage, and the signal receiving device is further prevented from being damaged.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a circuit diagram of an electrostatic discharge circuit in the prior art;
FIG. 2 is a schematic current diagram illustrating a first prior art ESD circuit during discharging;
FIG. 3 is a schematic current diagram illustrating a second prior art ESD circuit during discharging;
FIG. 4 is a block diagram of an ESD circuit according to the present invention;
FIG. 5 is a diagram illustrating an exemplary implementation of an ESD circuit according to the present invention;
FIG. 6 is a schematic diagram illustrating a current flow when the forward electrostatic voltage is released according to the present invention;
FIG. 7 is a schematic diagram illustrating the current flow when the negative electrostatic voltage is discharged according to the present invention;
FIG. 8 is a schematic view of the V-I curve for Schottky diode or PN junction diode operation;
FIG. 9 is a schematic diagram of the V-I curve of the MOS transistor.
Detailed Description
The core of the invention is to provide an electrostatic discharge circuit and a signal transmission system, which can prevent a first switch circuit or a second switch circuit from being broken down while ensuring the reaction time of electrostatic voltage release, and ensure the safety and reliability of the circuit. In addition, even if the first switch circuit or the third switch circuit is broken down, the second switch circuit or the fourth switch circuit can continue to release the electrostatic voltage, and the signal receiving device is further prevented from being damaged.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Before describing the esd circuit of the present application, please refer to fig. 1, fig. 2 and fig. 3, in which fig. 1 is a schematic circuit diagram of an esd circuit in the prior art, fig. 2 is a schematic current diagram of a first esd circuit in the prior art during discharging, and fig. 3 is a schematic current diagram of a second esd circuit in the prior art during discharging. In the prior art, the esd circuit is usually designed by using a diode, which may be a PN junction diode or a schottky diode. When the electrostatic discharge circuit receives a forward electrostatic voltage (+ 2kV to +8 kV), the current flow of discharge is as shown in FIG. 2; when the electrostatic discharge circuit receives a negative electrostatic voltage (-2 kV to-8 kV), the current flow of discharge is as shown in FIG. 3.
However, in the prior art, when the PN junction diode is used as an electronic device of the esd circuit, since the on threshold voltage of the PN junction diode is high and the response time is long, the esd circuit cannot be timely discharged to achieve the protection effect, and there is a certain risk. When the schottky diode is used as an electronic device of the electrostatic discharge circuit, the schottky diode has a smaller conduction critical voltage and a shorter reaction time, so that the electrostatic voltage can be quickly released, but the reverse breakdown voltage of the schottky diode is smaller, and when the reverse voltage at two ends of the schottky diode is larger, the reverse breakdown voltage is easily reached, or when the reverse time at two ends of the schottky diode is longer, the passing reverse current is larger and the time is longer, so that the diode is easy to be thermally broken, and further the electrostatic discharge circuit and components can be damaged.
Referring to fig. 4, fig. 4 is a structural block diagram of an electrostatic discharge circuit according to the present invention, the electrostatic discharge circuit includes a first switch module 1 and a second switch module 2, the first switch module 1 includes a first switch circuit 11 and a second switch circuit 12, and the second switch module 2 includes a third switch circuit 21 and a fourth switch circuit 22;
a first end of the first switch circuit 11 is respectively connected with an output end of the signal sending device, an input end of the signal receiving device, a first end of the second switch circuit 12, a first end of the third switch circuit 21 and a first end of the fourth switch circuit 22, a second end of the first switch circuit 11 is respectively connected with a second end of the second switch circuit 12 and a power supply end, and a second end of the third switch circuit 21 is respectively connected with a second end of the fourth switch circuit 22 and a ground end;
the first switch module 1 is used for conducting negative static voltage at the output end of the signal sending device;
the second switch module 2 is used for conducting forward electrostatic voltage at the output end of the signal sending device;
the breakdown voltage of the second switch circuit 12 is larger than that of the first switch circuit 11, and the breakdown voltage of the fourth switch circuit 22 is larger than that of the third switch circuit 21; the on-threshold voltage of the first switch circuit 11 is smaller than the on-threshold voltage of the second switch circuit 12, and the on-threshold voltage of the third switch circuit 21 is smaller than the on-threshold voltage of the fourth switch circuit 22.
The application considers the risk of electrostatic voltage to the electronic device and considers the defect that the electrostatic discharge circuit in the prior art has long reaction time or is easy to generate thermal breakdown phenomenon.
Therefore, the design idea of the application is as follows: an electrostatic discharge circuit is provided to reduce the response time for discharging an electrostatic voltage as much as possible and to improve the breakdown voltage of the electrostatic discharge circuit.
Based on this, the electrostatic discharge circuit in this application includes the second switch module 2 that can discharge to positive direction electrostatic voltage, and the second switch module 2 that discharges to negative direction electrostatic voltage to realize the release to all electrostatic voltages, avoid electrostatic voltage to cause the damage to signal output device. In addition, the first switch module 1 in the present application includes a first switch circuit 11 having a smaller breakdown voltage and a smaller on-threshold voltage and a second switch circuit 12 having a larger breakdown voltage and a larger on-threshold voltage, and the second switch module 2 in the present application includes a third switch circuit 21 having a smaller breakdown voltage and a smaller on-threshold voltage and a fourth switch circuit 22 having a larger breakdown voltage and a larger on-threshold voltage.
Furthermore, when a negative electrostatic voltage exists at the output end of the signal sending device, the first switch circuit 11 with a smaller conduction critical voltage is firstly conducted, and then the electrostatic voltage can be released as fast as possible; when the duration of the negative-going electrostatic voltage is longer, at this time, the first switch circuit 11 has a risk of reaching the breakdown voltage, at this time, since the second switch circuit 12 can be shunted with the first switch circuit 11, at this time, the risk of the first switch circuit 11 reaching the breakdown voltage can be reduced, in addition, even if the first switch circuit 11 reaches the breakdown voltage, the first switch circuit 11 cannot be used, since the breakdown voltage of the second switch circuit 12 is greater than the breakdown voltage of the second switch circuit 12, at this time, the corresponding second switch circuit 12 can also be used normally, so that the release of the negative-going electrostatic voltage can still be realized.
Similarly, when the output end of the signal sending device has the forward static voltage, the third switch circuit 21 with smaller conducting critical voltage is firstly conducted, so that the static voltage can be released as fast as possible; when the forward electrostatic voltage duration is longer, the third switch circuit 21 has a risk of reaching the breakdown voltage, at this time, since the fourth switch circuit 22 can be shunted from the third switch circuit 21, at this time, the risk of the third switch circuit 21 reaching the breakdown voltage can be reduced, in addition, even if the third switch circuit 21 reaches the breakdown voltage, the third switch circuit 21 cannot be used, since the breakdown voltage of the fourth switch circuit 22 is greater than the breakdown voltage of the fourth switch circuit 22, at this time, the corresponding fourth switch circuit 22 can also be used normally, so that the release of the forward electrostatic voltage can still be continuously realized.
The specific implementation manners of the first switch circuit 11, the second switch circuit 12, the third switch circuit 21 and the fourth switch circuit 22 are not particularly limited herein, and the corresponding on-threshold voltage and breakdown voltage correspond to the hardware structure of the electronic device of the corresponding specific implementation manner, and the application is not particularly limited herein.
In addition, the electrostatic discharge circuit is disposed on the signal transmission channel between the signal transmitting device and the signal output device, and this arrangement is also only a preferred implementation way to prevent the device from being damaged by static electricity during the signal transmission process, and the electrostatic discharge circuit may also be disposed on the signal terminal or the power terminal of various devices, and the application is not limited thereto.
In conclusion, the electrostatic discharge circuit in the application guarantees the response time of electrostatic voltage release, and simultaneously guarantees the safety and the reliability of the circuit, and further avoids the signal receiving device from being damaged.
On the basis of the above-described embodiment:
referring to fig. 5, fig. 5 is a schematic diagram of an electrostatic discharge circuit according to an embodiment of the present invention.
As a preferred embodiment, the first switch circuit 11 includes a first diode D1, and the third switch circuit 21 includes a second diode D2;
an anode of the first diode D1 is a first terminal of the first switch circuit 11, a cathode of the first diode D1 is a second terminal of the first switch circuit 11, an anode of the second diode D2 is a first terminal of the third switch circuit 21, and a cathode of the second diode D2 is a second terminal of the third switch circuit 21.
The present embodiment is directed to providing a specific implementation manner of the first switch circuit 11 and the third switch circuit 21, when both the first switch circuit 11 and the third switch circuit 21 include a diode, specifically, when a negative-going electrostatic voltage is present at the output terminal of the signal transmitting apparatus, the first diode D1 is turned on in reverse direction, thereby discharging the negative-going electrostatic voltage to the power source terminal; likewise, when the forward electrostatic voltage is present at the output terminal of the signal transmitting device, the second diode D2 is reversely turned on, thereby discharging the forward electrostatic voltage to the ground terminal.
It can be seen that the function of the first switch circuit 11 or the second switch circuit 12 can be realized by a diode, and the realization mode of the diode is simple and the cost is low.
In a preferred embodiment, the first diode D1 and the second diode D2 are schottky diodes.
In addition, the first diode D1 and the second diode D2 may be schottky diodes. Specifically, the schottky diode has a lower conducting voltage drop, so that when an electrostatic voltage exists, the schottky diode can be conducted quickly, that is, the schottky diode has a shorter reaction time and can timely release the electrostatic voltage. In addition, the schottky diode is a diode which allows high-speed switching, and a general diode generates about 0.7V-1.7V when current flows, but the voltage drop generated by the schottky diode is only 0.15V-0.45V when current flows, so that the efficiency of the circuit can be improved.
It can be seen that the schottky diode can be used to realize the functions of the first switch circuit 11 and the second switch circuit 12, and can reduce the response time of releasing the electrostatic voltage, timely release the electrostatic voltage, and improve the efficiency of the circuit.
As a preferred embodiment, the second switch circuit 12 includes a first controllable switch Q1 and a first capacitor, and the fourth switch circuit 22 includes a second controllable switch Q2 and a second capacitor;
a first end of the first capacitor is connected with a first end of the first controllable switch Q1 and serves as a first end of the second switch circuit 12, a second end of the first capacitor is connected with a control end of the first controllable switch Q1, and a second end of the first controllable switch Q1 serves as a second end of the second switch circuit 12; a first end of the second capacitor is connected with a first end of the second controllable switch Q2 and serves as a first end of the fourth switch circuit 22, a second end of the second capacitor is connected with a control end of the second controllable switch Q2, and a second end of the second controllable switch Q2 serves as a second end of the fourth switch circuit 22;
the first controllable switch Q1 is used for conducting between the first end and the second end of the signal transmitting device when the output end of the signal transmitting device has positive static voltage;
the second controllable switch Q2 is used to make conduction between its first terminal and second terminal when the output terminal of the signal sending device has negative static voltage.
As a preferred embodiment, the first controllable switch Q1 is a PMOS (positive channel Metal Oxide Semiconductor) transistor, and the second controllable switch Q2 is an NMOS (negative channel Metal Oxide Semiconductor) transistor;
the grid electrode of the PMOS transistor is the control end of the first controllable switch Q1, the drain electrode of the PMOS transistor is the first end of the first controllable switch Q1, and the source electrode of the PMOS transistor is the second end of the first controllable switch Q1; the gate of the NMOS transistor is the control end of the second controllable switch Q2, the drain of the NMOS transistor is the first end of the second controllable switch Q2, and the source of the NMOS transistor is the second end of the second controllable switch Q2.
As shown in fig. 5, the present embodiment is intended to provide a specific implementation of the third switching circuit 21 and the fourth switching circuit 22. Specifically, when the third switch circuit 21 and the fourth switch circuit 22 include a capacitor and a controllable switch, the first capacitor and the second capacitor are used for conducting ac and isolating dc. Since the static electricity is a burst pulse wave (generally, a GHz high frequency signal), when there is a static voltage at the output terminal of the signal transmitting apparatus, the first capacitor or the second capacitor is regarded as a short circuit, so that a control voltage is generated at the control terminal of the first controllable switch Q1 or the second controllable switch Q2, and the first controllable switch Q1 and the second controllable switch Q2 are controlled to be turned on or off, so as to release the positive static voltage or the negative static voltage.
Specifically, when the first controllable switch Q1 is a PMOS transistor and the second controllable switch Q2 is an NMOS transistor, if a forward static voltage exists at the output end of the signal transmitting device, the forward static voltage generates a forward bias voltage between the gate and source electrodes of the PMOS transistor, when Vgs of the PMOS transistor is greater than 0, the PMOS transistor enters a cut-off region, at this time, the first controllable switch Q1 is in a non-conducting state, and at the same time, a forward bias voltage is generated between the gate and source electrodes of the NMOS transistor, and when Vg of the NMOS transistor is greater than 0, the NMOS transistor enters a saturation region, at this time, the second controllable switch Q2 is in a conducting state, so that the forward static voltage is released to the ground through the NMOS transistor and the second diode D2, thereby preventing the forward static voltage from directly entering the signal receiving device at the rear end, and avoiding breakdown of the signal receiving device. Specifically, referring to fig. 6, fig. 6 is a schematic view illustrating a current flow direction when the forward electrostatic voltage provided by the present invention is released, where an arrow direction is a current direction.
Similarly, if negative static voltage exists at the output end of the signal sending device, the negative static voltage generates reverse bias between the grid and the source of the PMOS, when Vgs of the PMOS tube is smaller than 0, the PMOS tube enters a saturation region, the first controllable switch Q1 is in a conducting state at the moment, meanwhile, the reverse bias is generated between the grid and the source of the NMOS tube, when Vg of the NMOS tube is smaller than 0, the NMOS tube enters a cut-off region, and at the moment, the second controllable switch Q2 is in a non-conducting state, so that the negative static voltage is released to a power supply end through the PMOS tube and the first diode D1, the negative static voltage is prevented from directly entering a signal receiving device at the rear end, and the signal receiving device is prevented from being broken down. Specifically, referring to fig. 7, fig. 7 is a schematic view illustrating a current flow direction when the negative electrostatic voltage is released, where an arrow direction is a current direction.
The impedance formula of the capacitor is as follows: xc = 1/2 pi fc, Xc is capacitance reactance value of capacitance, f is frequency of signal output by the signal transmission device, and C is capacitance value of capacitance. When f is a high-frequency signal having a frequency of GHz, it can be considered that f tends to ∞, Xc tends to 0, that is, the capacitance-equivalent impedance at high frequency is regarded as 0.
Referring to fig. 8, fig. 8 is a schematic view of a V-I curve of the schottky diode or PN junction diode. The maximum rated power consumption expression of the Schottky diode is as follows: pd = Id × Vd, where Pd is the power consumption of the diode, Id is the current passing through the diode, and Vd is the diode bias voltage. When the diode works in a breakdown region, Id = -Is (reverse saturation current), Vd = VBR(wherein, VBRBreakdown voltage of the diode), pd (max) = | is (max) | VBR。
Let | Ismax | = 100
A，VBRIf the voltage Is equal to 200, pd (max) = 3mW if the voltage Is equal to 30V and the expression Is substituted, the discharge current Is equal to 200
A, the power consumption generated in the diode during discharge was 6 mW. If the diode is operated in a state of 6mW for a long time, thermal breakdown is very likely to occur, which causes physical damage and loses the protection function.
Referring to fig. 9, fig. 9 is a schematic view of a V-I curve of the MOS transistor. V in the figureDS（sat）For the saturation voltage of the MOS tube, the maximum rated power consumption expression of the MOS tube is as follows: p = ID*VDS，ID=Kn*（VGS-VTH）2. At this time, IDIs MOS tube forward current, Kn is conductive parameter, VDSFor drain-source bias voltage, VGSFor gate-source bias, VTHThe threshold voltage is the voltage, therefore the MOS transistor needs to work in the saturation region in the application of the invention, so | VGS|≧VTH。
Suppose VDS = 5V，VGS = 5V，VTH = 1V，Kn= 2A
Therefore, substituting the expression: pmax = 32A × 5V = 160 w (max). Therefore, the maximum rated power consumption of the MOS tube is far larger than that of the PN junction diode or the Schottky diode, so that the MOS tube can bear larger voltage, current and rated power consumption when being used as an electrostatic discharge protection part in the technical scheme of the invention.
In summary, when the first switch circuit 11 and the third switch circuit 21 of the present application use schottky diodes and the second switch circuit 12 and the fourth switch circuit 22 use MOS transistors (specifically, the second switch circuit 12 uses PMOS transistors and the fourth switch circuit uses PMOS transistors), the reaction time of the electrostatic discharge circuit is the reaction time of the schottky diodes, and the breakdown voltage is the breakdown voltage of the MOS transistors, so that the reaction time of the electrostatic discharge circuit is ensured, the electrostatic discharge circuit is prevented from being broken down, and the reliability of the electrostatic discharge circuit is improved.
As a preferred embodiment, the second switch circuit 12 further includes a first resistor R1 disposed between the gate and the source of the PMOS transistor.
In a preferred embodiment, the fourth switch circuit 22 further includes a second resistor R2 disposed between the gate and the source of the NMOS transistor.
Specifically, a resistor is arranged between the grid electrode and the source electrode of the PMOS transistor or the NMOS transistor and is used for providing bias voltage for the corresponding MOS transistor so as to enable the MOS transistor to be reliably switched on or switched off.
In addition, the resistance value between the grid and the source of the MOS tube is very large, so long as a small amount of static electricity exists, very high voltage can be generated at two ends of the equivalent capacitor between the grid and the source, and if the small amount of static electricity is not discharged in time, the high voltage at the two ends can cause the MOS tube to generate misoperation and even break down the grid source; at this time, the resistance between the grid and the source can discharge the static electricity, thereby playing the role of protecting the MOS tube.
As a preferred embodiment, the device further comprises a third resistor R3 and a fourth resistor R4;
the third resistor R3 is disposed between the output terminal of the signal transmitting device and the first terminal of the first switch module 1, and the fourth resistor R4 is disposed between the first terminal of the first switch module 1 and the input terminal of the signal receiving device.
Specifically, the third resistor R3 and the fourth resistor R4 are damping resistors, and function as impedance matching to prevent the signal transmitted by the signal transmission device from being interfered by reflection.
A signal transmission system comprises the electrostatic discharge circuit, a signal sending device and a signal receiving device.
For the introduction of the signal transmission system, please refer to the above embodiments, which are not described herein again.
It is to be noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. An electrostatic discharge circuit, comprising a first switch module and a second switch module, wherein the first switch module comprises a first switch circuit and a second switch circuit, and the second switch module comprises a third switch circuit and a fourth switch circuit;
a first end of the first switch circuit is connected with an output end of a signal sending device, an input end of a signal receiving device, a first end of the second switch circuit, a first end of the third switch circuit and a first end of the fourth switch circuit respectively, a second end of the first switch circuit is connected with a second end of the second switch circuit and a power supply end respectively, and a second end of the third switch circuit is connected with a second end of the fourth switch circuit and a ground end respectively;
the first switch module is used for conducting negative static voltage at the output end of the signal sending device;
the second switch module is used for conducting forward static voltage at the output end of the signal sending device;
the breakdown voltage of the second switch circuit is greater than the breakdown voltage of the first switch circuit, and the breakdown voltage of the fourth switch circuit is greater than the breakdown voltage of the third switch circuit; the conduction critical voltage of the first switch circuit is less than the conduction critical voltage of the second switch circuit, and the conduction critical voltage of the third switch circuit is less than the conduction critical voltage of the fourth switch circuit.
2. The electrostatic discharge circuit of claim 1, wherein the first switch circuit comprises a first diode, and the third switch circuit comprises a second diode;
the anode of the first diode is the first end of the first switch circuit, the cathode of the first diode is the second end of the first switch circuit, the anode of the second diode is the first end of the third switch circuit, and the cathode of the second diode is the second end of the third switch circuit.
3. The electrostatic discharge circuit of claim 2, wherein the first diode and the second diode are schottky diodes.
4. The electrostatic discharge circuit of claim 2, wherein the second switching circuit comprises a first controllable switch and a first capacitor, and the fourth switching circuit comprises a second controllable switch and a second capacitor;
a first end of the first capacitor is connected with a first end of the first controllable switch and serves as a first end of the second switch circuit, a second end of the first capacitor is connected with a control end of the first controllable switch, and a second end of the first controllable switch serves as a second end of the second switch circuit; a first end of the second capacitor is connected with a first end of the second controllable switch and serves as a first end of the fourth switch circuit, a second end of the second capacitor is connected with a control end of the second controllable switch, and a second end of the second controllable switch serves as a second end of the fourth switch circuit;
the first controllable switch is used for conducting the first end and the second end of the first controllable switch when the output end of the signal sending device has positive static voltage;
the second controllable switch is used for conducting the first end and the second end of the second controllable switch when the output end of the signal sending device has negative static voltage.
5. The electrostatic discharge circuit of claim 4, wherein the first controllable switch is a P-channel metal oxide semiconductor (PMOS) transistor and the second controllable switch is an N-channel metal oxide semiconductor (NMOS) transistor;
the grid electrode of the PMOS tube is the control end of the first controllable switch, the drain electrode of the PMOS tube is the first end of the first controllable switch, and the source electrode of the PMOS tube is the second end of the first controllable switch; the grid electrode of the NMOS tube is the control end of the second controllable switch, the drain electrode of the NMOS tube is the first end of the second controllable switch, and the source electrode of the NMOS tube is the second end of the second controllable switch.
6. The ESD circuit of claim 5, wherein the second switch circuit further comprises a first resistor disposed between the gate and the source of the PMOS transistor.
7. The electrostatic discharge circuit of claim 5, wherein the fourth switching circuit further comprises a second resistor disposed between the gate and the source of the NMOS transistor.
8. The electrostatic discharge circuit of any of claims 1-7, further comprising a third resistor and a fourth resistor;
the third resistor is arranged between the output end of the signal sending device and the first end of the first switch module, and the fourth resistor is arranged between the first end of the first switch module and the input end of the signal receiving device.
9. A signal transmission system comprising the electrostatic discharge circuit according to any one of claims 1 to 8, and further comprising signal transmission means and signal reception means.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111251464.6A CN113690870A (en) | 2021-10-27 | 2021-10-27 | Electrostatic discharge circuit and signal transmission system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111251464.6A CN113690870A (en) | 2021-10-27 | 2021-10-27 | Electrostatic discharge circuit and signal transmission system |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1510749A (en) * | 2002-12-23 | 2004-07-07 | 矽统科技股份有限公司 | Electrostatic discharge protective circuit with self-trigger function |
| CN101039027A (en) * | 2007-05-10 | 2007-09-19 | 北京中星微电子有限公司 | Improved electrostatic discharge protecting circuit |
| CN102790048A (en) * | 2011-05-17 | 2012-11-21 | 旺宏电子股份有限公司 | Semiconductor structure of bipolar junction transistor embedded with Schottky diode |
-
2021
- 2021-10-27 CN CN202111251464.6A patent/CN113690870A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1510749A (en) * | 2002-12-23 | 2004-07-07 | 矽统科技股份有限公司 | Electrostatic discharge protective circuit with self-trigger function |
| CN101039027A (en) * | 2007-05-10 | 2007-09-19 | 北京中星微电子有限公司 | Improved electrostatic discharge protecting circuit |
| CN102790048A (en) * | 2011-05-17 | 2012-11-21 | 旺宏电子股份有限公司 | Semiconductor structure of bipolar junction transistor embedded with Schottky diode |
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