CN114400993A - Analog switch circuit with bidirectional overvoltage protection - Google Patents

Analog switch circuit with bidirectional overvoltage protection Download PDF

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Publication number
CN114400993A
CN114400993A CN202210055351.7A CN202210055351A CN114400993A CN 114400993 A CN114400993 A CN 114400993A CN 202210055351 A CN202210055351 A CN 202210055351A CN 114400993 A CN114400993 A CN 114400993A
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CN
China
Prior art keywords
mos transistor
circuit
switch circuit
inverter
switch
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CN202210055351.7A
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Chinese (zh)
Inventor
熊派派
徐青
刘骏豪
杭丽
罗焰娇
杨光美
朱坤峰
张广胜
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CETC 24 Research Institute
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CETC 24 Research Institute
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Priority to CN202210055351.7A priority Critical patent/CN114400993A/en
Publication of CN114400993A publication Critical patent/CN114400993A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/08104Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in field-effect transistor switches

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  • Protection Of Static Devices (AREA)
  • Electronic Switches (AREA)

Abstract

The invention belongs to the field of analog integrated circuits, and particularly relates to an analog switch circuit with bidirectional overvoltage protection, which comprises: the overvoltage current-limiting protection circuit comprises a switch control circuit, an overvoltage current-limiting protection circuit and a switch circuit; the switch control circuit is connected with the switch circuit and is used for controlling the switch circuit; the overvoltage current-limiting protection circuit is connected with the switch circuit and is used for protecting the switch circuit; the invention discloses an analog switch circuit with bidirectional overvoltage protection, which can effectively protect the analog switch circuit and improve the reliability of the circuit under the condition that an analog input port and an analog output port of the analog switch circuit are bidirectionally overvoltage.

Description

Analog switch circuit with bidirectional overvoltage protection
Technical Field
The invention belongs to the field of analog integrated circuits, and particularly relates to an analog switch circuit with bidirectional overvoltage protection.
Background
The conventional analog switch circuit is shown in fig. 1, wherein VDD represents a power connection source, GND represents a ground, a PMOS transistor P3 and an NMOS transistor N3 form a switch tube of the analog switch circuit, a port S and a port D serve as analog input and analog output ports of the switch circuit, and a port EN serves as a control signal port of the switch chip circuit. The EN control signal controls the switching transistor PMOS transistor P3 to be turned on and off after being inverted by the inverter composed of the PMOS transistor P1 and the NMOS transistor N1, and the EN control signal controls the switching transistor NMOS transistor N3 to be turned on and off after being inverted by the inverter composed of the PMOS transistor P2 and the NMOS transistor N2. When the control signal EN is at a high level, the analog switch is in a conducting state, and the space between the port S and the terminal D is in a low-resistance state; when the control signal EN is at a low level, the analog switch is in an off state, and a high-resistance state is formed between the port S and the terminal D.
The conventional analog switch circuit shown in fig. 1 has strict limitation requirements on the voltage values of the ports S and D in use, and must be controlled in the range of GND to VDD. If the voltage value of the port S or the port D exceeds VDD, because the substrate N well potential of the PMOS transistor P3 is VDD, a PN junction formed by a P + active region of the source end or the drain end of the PMOS transistor P3 and the substrate N well is conducted in the positive direction, and abnormal large current is formed and even a chip is burnt; similarly, if the voltage value of the port S or the port D is lower than GND, since the substrate P-well of the NMOS transistor N3 has a GND potential, a PN junction formed by the N + active region of the source or drain of the NMOS transistor N3 and the substrate P-well will be turned on in the forward direction, which may form an abnormal large current or even burn the chip.
Therefore, there is a need for an analog switch circuit that can effectively protect the circuit when the input port or the analog output port is over-voltage during the operation of the analog switch circuit.
Disclosure of Invention
In order to solve the problems in the prior art, the present invention provides an analog switch circuit with bidirectional overvoltage protection, which includes: the overvoltage current-limiting protection circuit comprises a switch control circuit, an overvoltage current-limiting protection circuit and a switch circuit; the switch control circuit is connected with the switch circuit and is used for controlling the switch circuit; the overvoltage current-limiting protection circuit is connected with the switch circuit and is used for protecting the switch circuit;
the overvoltage current-limiting protection circuit comprises a MOS transistor P4, a MOS transistor N4, a resistor R1 and a resistor R2; the source electrode of the MOS transistor P4 is connected with a voltage input end VDD, the drain electrode is connected with a resistor R1, and the grid electrode is connected with a control signal CN; the source electrode of the MOS transistor N4 is grounded, the drain electrode is connected with the resistor R2, and the grid electrode is connected with the control signal CP; the other ends of the resistor R1 and the resistor R2 are respectively connected to a switch circuit to form an overvoltage current-limiting protection circuit.
Preferably, the switch control circuit includes a first inverter and a second inverter; the output end of the first phase inverter is connected with the input end of the second phase inverter; and respectively connecting the output end of the first inverter and the output end of the second inverter to the inverse switch circuit to obtain the switch control circuit.
Further, the first inverter comprises a MOS transistor P1 and a MOS transistor N1, wherein the source electrode of the MOS transistor P1 is connected with a voltage input end VDD, the drain electrode is connected with the drain electrode of the MOS transistor N1, and the grid electrode is connected with the grid electrode of the MOS transistor N1; a grid electrode connected with a MOS tube P1 and a MOS tube N1 is used as a control signal input port EN of the first inverter, a drain electrode connected with a MOS tube P1 and a MOS tube N1 is used as an output end of the first inverter, and an output end of the first phase guide outputs a control signal CP; the second inverter comprises a MOS tube P2 and a MOS tube N2, the structure of the second inverter is the same as that of the first inverter, and the output end of the second director outputs a control signal CN.
Preferably, the switching circuit comprises a MOS transistor P3, a MOS transistor N3 and a MOS transistor N5; the source electrode of the MOS transistor P3 is connected with the source electrode of the MOS transistor N3, the drain electrode of the MOS transistor P3 is connected with the drain electrode of the MOS transistor N3, and the substrate is connected with the drain electrode of the MOS transistor N5; the substrate of the MOS transistor N3 is connected with the source electrode of the MOS transistor N5; the grid electrode of the MOS tube N5 is connected with a control signal CN; the source electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the input port S of the analog switch circuit, and the drain electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the output port D of the analog switch circuit.
Preferably, the connection of the switch control circuit and the switch circuit comprises that the output end of a first inverter of the switch control circuit is connected with the grid of a MOS tube P3 of the switch circuit, and the output end of a second inverter of the switch control circuit is connected with the grid of a MOS tube N3 of the switch circuit.
Preferably, the connecting the overvoltage current-limiting protection circuit with the switch circuit comprises: the resistor R1 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube P3 of the switch circuit, and the resistor R2 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube N3 of the switch circuit.
Preferably, when the input signal of the control signal input port EN of the first inverter is at a high level, EN passes through the inverter composed of P1 and N1, then outputs the signal CP at a low level, and then passes through the inverter composed of P2 and N2, then outputs the signal CN at a high level, at this time, P4 and N4 are in an off state, P3, N3 and N5 are in an on state, and the substrates of P3 and N3 are connected together through N5; when a signal is added to the analog signal port S, a forward biased diode is formed between the P + active area at the S end of the P3 tube and the substrate NWELL thereof to supply power to the substrates of the switching tubes P3 and N3, and the switch is in an on state;
when an input signal of a control signal input port EN of the first inverter is at a low level, EN passes through an inverter composed of P1 and N1, then outputs a signal CP at a high level, and then passes through an inverter composed of P2 and N2, then outputs a signal CN at a low level, at this time, P4 and N4 are in a conducting state, P3, N3 and N5 are in a cutting-off state, and at this time, a switch circuit is turned off.
The invention designs an analog switch circuit with bidirectional overvoltage protection of an analog input port and an analog output port, which can effectively protect the circuit under the condition of overvoltage of the input port or the analog output port in the using process of the analog switch circuit and improve the reliability of the circuit.
Drawings
FIG. 1 is a circuit diagram of a conventional analog switch;
FIG. 2 is an analog switching circuit with bi-directional over-voltage protection of the present invention;
fig. 3 is an equivalent circuit when the switching circuit of the present invention is turned off.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An analog switching circuit with bidirectional overvoltage protection, as shown in fig. 2, comprising: the overvoltage current-limiting protection circuit comprises a switch control circuit, an overvoltage current-limiting protection circuit and a switch circuit; the switch control circuit is connected with the switch circuit and is used for controlling the switch circuit; the overvoltage current-limiting protection circuit is connected with the switch circuit and used for protecting the switch circuit. The analog switch protection circuit can protect the analog switch circuit by current limiting under the condition of bidirectional overvoltage of the analog input port and the analog output port of the analog switch, so that the circuit is prevented from being irreversibly damaged, and the reliability of the circuit is improved.
The overvoltage current-limiting protection circuit comprises a MOS transistor P4, a MOS transistor N4, a resistor R1 and a resistor R2; the source electrode of the MOS transistor P4 is connected with a voltage input end VDD, the drain electrode is connected with a resistor R1, and the grid electrode is connected with a control signal CN; the source electrode of the MOS transistor N4 is grounded, the drain electrode is connected with the resistor R2, and the grid electrode is connected with the control signal CP; the other ends of the resistor R1 and the resistor R2 are respectively connected to a switch circuit to form an overvoltage current-limiting protection circuit.
The switch control circuit comprises a first phase inverter and a second phase inverter; the output end of the first phase inverter is connected with the input end of the second phase inverter; and respectively connecting the output end of the first inverter and the output end of the second inverter to the inverse switch circuit to obtain the switch control circuit.
The first inverter comprises a MOS tube P1 and a MOS tube N1, the source electrode of the MOS tube P1 is connected with a voltage input end VDD, the drain electrode is connected with the drain electrode of the MOS tube N1, and the grid electrode is connected with the grid electrode of the MOS tube N1; a grid electrode connected with a MOS tube P1 and a MOS tube N1 is used as a control signal input port EN of the first inverter, and a drain electrode connected with a MOS tube P1 and a MOS tube N1 is used as an output end of the first inverter; the output end of the first phase guide outputs a control signal CP; the second inverter comprises a MOS tube P2 and a MOS tube N2, and the structure of the second inverter is the same as that of the first inverter; the output end of the second director outputs a control signal CN.
The switching circuit comprises a MOS transistor P3, a MOS transistor N3 and a MOS transistor N5; the source electrode of the MOS transistor P3 is connected with the source electrode of the MOS transistor N3, the drain electrode of the MOS transistor P3 is connected with the drain electrode of the MOS transistor N3, and the substrate is connected with the drain electrode of the MOS transistor N5; the substrate of the MOS transistor N3 is connected with the source electrode of the MOS transistor N5; the grid electrode of the MOS tube N5 is connected with a control signal CN; the source electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the input port S of the analog switch circuit, and the drain electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the output port D of the analog switch circuit.
The switch control circuit is connected with the switch circuit, and comprises a first inverter output end of the switch control circuit connected with the grid electrode of the MOS tube P3 of the switch circuit, and a second inverter output end of the switch control circuit connected with the grid electrode of the MOS tube N3 of the switch circuit.
The overvoltage current-limiting protection circuit is connected with the switch circuit and comprises: the resistor R1 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube P3 of the switch circuit, and the resistor R2 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube N3 of the switch circuit.
When the switch tube control signal EN is at a high level, EN passes through an inverter composed of P1 and N1, then an output signal CP is at a low level, and then passes through an inverter composed of P2 and N2, then an output signal CN is at a high level, at this time, P4 and N4 are in an off state, P3, N3 and N5 are in an on state, and the substrates of P3 and N3 are connected together through N5, and if a signal is applied to the analog signal port S, a forward biased diode is formed between the P + active region at the S end of the P3 tube and the substrate NWELL thereof, so as to supply power to the substrates of the switch tubes P3 and N3, and the switch is in an on state.
When the switching tube control signal EN is at a low level, EN passes through the inverter composed of P1 and N1, then outputs the signal CP at a high level, and then passes through the inverter composed of P2 and N2, then outputs the signal CN at a low level, at this time, P4 and N4 are in a conducting state, P3, N3 and N5 are in a stopping state, at this time, the switching circuit is turned off, and an equivalent circuit diagram thereof is shown in fig. 3. In the equivalent circuit diagram when the switch circuit is turned off, the resistor R1 is connected in series between the substrate NWELL of the switch tube P3 and VDD, and the resistor R2 is connected in series between the substrate PWELL of the switch tube N3 and GND. The source and drain P + active regions of the switch tube P3 are connected with diodes D1 and D2 formed by a substrate NWELL through R1 and VDD, and the source and drain N + active region of the switch tube N3 is connected with diodes D3 and D4 formed by a substrate PWELL through R2 and GND. When the signal voltage ranges of the ports S and D are in the range of GND-VDD, the diodes D1, D2, D3 and D4 are all in reverse directions, and the situation of a large current path does not occur in the ports S and D. However, since the port S and the port D both have inductance, abnormal signals having voltages exceeding GND to VDD may be generated at the port S and the port D during the switching off process. Taking the voltage at the port S exceeding VDD as an example, the switch P3 will be turned on, and a current path exists between the port S and the port D. Meanwhile, the diodes D1 and D2 are in forward conduction, current flows from the port S and the port D to VDD through the diodes D1 and D2 and then through R1, and the main function of R1 is to limit the current flowing through the diodes D1 and D2, and protect the diodes D1 and D2 from being damaged. When the voltage between the ports S and GND is higher than the breakdown voltage of the diodes D3 and D4 in the reverse bias state of the diodes D3 and D4, the breakdown current flows from the ports S and D to the GND voltage through the R2, and another current path is provided, so that the damage of the high voltage to the MOS tubes P3 and N3 is reduced. Similarly, a similar phenomenon occurs when the voltage at port S is lower than GND voltage.
In summary, the present invention discloses an analog switch circuit with bidirectional overvoltage protection, which can effectively protect the analog switch circuit and improve the reliability of the circuit under the condition of bidirectional overvoltage at the analog input port and the analog output port of the analog switch circuit.
The above-mentioned embodiments, which further illustrate the objects, technical solutions and advantages of the present invention, should be understood that the above-mentioned embodiments are only preferred embodiments of the present invention, and should not be construed as limiting the present invention, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (7)

1. An analog switching circuit with bi-directional overvoltage protection, comprising: the overvoltage current-limiting protection circuit comprises a switch control circuit, an overvoltage current-limiting protection circuit and a switch circuit; the switch control circuit is connected with the switch circuit and is used for controlling the switch circuit; the overvoltage current-limiting protection circuit is connected with the switch circuit and is used for protecting the switch circuit;
the overvoltage current-limiting protection circuit comprises a MOS transistor P4, a MOS transistor N4, a resistor R1 and a resistor R2; the source electrode of the MOS transistor P4 is connected with a voltage input end VDD, the drain electrode is connected with a resistor R1, and the grid electrode is connected with a control signal CN; the source electrode of the MOS transistor N4 is grounded, the drain electrode is connected with the resistor R2, and the grid electrode is connected with the control signal CP; the other ends of the resistor R1 and the resistor R2 are respectively connected to a switch circuit to form an overvoltage current-limiting protection circuit.
2. An analog switch circuit with bidirectional overvoltage protection as recited in claim 1 wherein the switch control circuit comprises a first inverter and a second inverter; the output end of the first phase inverter is connected with the input end of the second phase inverter; and respectively connecting the output end of the first inverter and the output end of the second inverter to the inverse switch circuit to obtain the switch control circuit.
3. The analog switch circuit with bidirectional overvoltage protection as claimed in claim 2, wherein the first inverter comprises a MOS transistor P1 and a MOS transistor N1, the source of the MOS transistor P1 is connected to the voltage input VDD, the drain is connected to the drain of the MOS transistor N1, and the gate is connected to the gate of the MOS transistor N1; a grid electrode connected with a MOS tube P1 and a MOS tube N1 is used as a control signal input port EN of the first inverter, and a drain electrode connected with a MOS tube P1 and a MOS tube N1 is used as an output end of the first inverter; the output end of the first phase guide outputs a control signal CP; the second inverter comprises a MOS tube P2 and a MOS tube N2, and the structure of the second inverter is the same as that of the first inverter; the output end of the second director outputs a control signal CN.
4. The analog switch circuit with bidirectional overvoltage protection as claimed in claim 1, wherein the switch circuit comprises a MOS transistor P3, a MOS transistor N3, and a MOS transistor N5; the source electrode of the MOS transistor P3 is connected with the source electrode of the MOS transistor N3, the drain electrode of the MOS transistor P3 is connected with the drain electrode of the MOS transistor N3, and the substrate is connected with the drain electrode of the MOS transistor N5; the substrate of the MOS transistor N3 is connected with the source electrode of the MOS transistor N5; the grid electrode of the MOS tube N5 is connected with a control signal CN; the source electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the input port S of the analog switch circuit, and the drain electrode of the MOS transistor P3 connected with the MOS transistor N3 is used as the output port D of the analog switch circuit.
5. An analog switch circuit with bidirectional overvoltage protection as claimed in claim 1, wherein the switch control circuit being connected to the switch circuit includes a first inverter output of the switch control circuit being connected to the gate of MOS transistor P3 of the switch circuit and a second inverter output of the switch control circuit being connected to the gate of MOS transistor N3 of the switch circuit.
6. An analog switch circuit with bidirectional overvoltage protection as claimed in claim 1 wherein the overvoltage current limiting protection circuit connected to the switch circuit comprises: the resistor R1 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube P3 of the switch circuit, and the resistor R2 of the overvoltage current-limiting protection circuit is connected with the substrate of the MOS tube N3 of the switch circuit.
7. The analog switch circuit with bidirectional overvoltage protection as claimed in any one of claims 1 to 6, wherein when an input signal of a control signal input port EN of the first inverter is high, EN passes through an inverter composed of P1 and N1, then an output signal CP is low, and then passes through an inverter composed of P2 and N2, then an output signal CN is high, at this time, P4 and N4 are in an off state, P3, N3 and N5 are in an on state, and substrates of P3 and N3 are connected together through N5; when a signal is added to the analog signal port S, a forward biased diode is formed between the P + active area at the S end of the P3 tube and the substrate NWELL thereof to supply power to the substrates of the switching tubes P3 and N3, and the switch is in an on state;
when an input signal of a control signal input port EN of the first inverter is at a low level, EN passes through an inverter composed of P1 and N1, then outputs a signal CP at a high level, and then passes through an inverter composed of P2 and N2, then outputs a signal CN at a low level, at this time, P4 and N4 are in a conducting state, P3, N3 and N5 are in a cutting-off state, and at this time, a switch circuit is turned off.
CN202210055351.7A 2022-01-18 2022-01-18 Analog switch circuit with bidirectional overvoltage protection Pending CN114400993A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115001463A (en) * 2022-05-27 2022-09-02 南京金阵微电子技术有限公司 PMOS (P-channel metal oxide semiconductor) switching circuit, chip and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5880621A (en) * 1996-07-31 1999-03-09 Nec Corporation Analog switch circuit
CN210517788U (en) * 2019-11-08 2020-05-12 西安硅宇微电子有限公司 Overvoltage protection circuit
CN113810031A (en) * 2021-09-14 2021-12-17 中国兵器工业集团第二一四研究所苏州研发中心 Analog switch circuit with overvoltage protection

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5880621A (en) * 1996-07-31 1999-03-09 Nec Corporation Analog switch circuit
CN210517788U (en) * 2019-11-08 2020-05-12 西安硅宇微电子有限公司 Overvoltage protection circuit
CN113810031A (en) * 2021-09-14 2021-12-17 中国兵器工业集团第二一四研究所苏州研发中心 Analog switch circuit with overvoltage protection

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115001463A (en) * 2022-05-27 2022-09-02 南京金阵微电子技术有限公司 PMOS (P-channel metal oxide semiconductor) switching circuit, chip and electronic equipment

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Application publication date: 20220426