CN113675811A

CN113675811A - CPU plug-in and relay protection device based on SOC chip

Info

Publication number: CN113675811A
Application number: CN202010405164.8A
Authority: CN
Inventors: 陆金凤; 唐志军; 赵青春; 林国栋; 李智诚; 晁武杰; 余越; 孟江雯; 詹荣荣
Original assignee: China Electric Power Research Institute Co Ltd CEPRI; NR Electric Co Ltd; Electric Power Research Institute of State Grid Fujian Electric Power Co Ltd
Current assignee: China Electric Power Research Institute Co Ltd CEPRI; NR Electric Co Ltd; Electric Power Research Institute of State Grid Fujian Electric Power Co Ltd
Priority date: 2020-05-14
Filing date: 2020-05-14
Publication date: 2021-11-19

Abstract

The invention discloses a relay protection device CPU plug-in based on SOC chips, two SOC chips; 1 management CPU core and 1 FPGA are integrated in the first SOC chip; 1 protection CPU core, 1 starting CPU core and 1 FPGA are integrated in the second SOC chip; and data interaction is carried out between the two SOC FPGAs through a data transmission channel. The invention also discloses a relay protection device using the CPU plug-in, which reduces the number of plug-ins of the relay protection device, saves the cost of the relay protection device, and improves the reliability and the real-time performance of data transmission between CPU cores.

Description

CPU plug-in and relay protection device based on SOC chip

Technical Field

The invention belongs to the field of relay protection of a power system, and relates to a CPU plug-in unit based on an SOC chip and a relay protection device.

Background

The relay protection device is used as a core device of a power grid, and the automatic control of the relay protection device plays a key role in safe and stable operation of the power grid. However, at present, various relay protection device core chips in China generally depend on foreign imports.

Current relay protection devices generally adopt a dual-CPU plug-in architecture. One CPU plug-in realizes the functions of management, human-computer interface, communication, wave recording and the like of the whole device. And the other CPU plug-in unit completes the functions of analog quantity data acquisition, protection logic calculation, trip exit and the like. The two CPU plug-ins mutually transmit data through a backboard bus. In the existing structure, the number of plug-ins is large, the cost of the relay protection device is high, and the reliability and the real-time performance of data transmission are also to be improved.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a relay protection device CPU plug-in unit based on an SOC chip and the relay protection device.

In order to achieve the above purpose, the solution of the invention is:

in a first aspect, the present invention provides a CPU card based on an SOC chip, for use in a relay protection device, comprising: two SOC chips;

1 management CPU core and 1 FPGA are integrated in the first SOC chip;

1 protection CPU core, 1 starting CPU core and 1 FPGA are integrated in the second SOC chip; and data interaction is carried out between the two SOC FPGAs through a data transmission channel.

In the preferred scheme, the management CPU core is responsible for sequential event recording, wave recording, printing, time synchronization, man-machine interface and communication with a monitoring system.

In a preferred scheme, the start CPU core is responsible for fault detection, and sends a start signal when a fault is detected.

In a preferred scheme, the protection CPU core is responsible for protection logic calculation, and sends a trip signal when an action condition is reached.

In a preferred scheme, the FPGA is used as an interface chip for data interaction, storage and management between two SOC pieces and between different relay protection plug-ins.

In a second aspect, the invention also provides a relay protection device based on the SOC chip, which comprises the CPU plug-in based on the SOC chip, a protection ADC sampling module, a start ADC sampling module, an external access module and a redundant outlet relay;

the protection ADC sampling module and the starting ADC sampling module are mutually independent;

the starting CPU core is connected with the starting ADC sampling module and the external opening module, is used for collecting analog quantity and digital quantity opening and carrying out fault detection according to the analog quantity and digital quantity opening and closing module, and sends a starting signal to trigger the starting relay to act and open the positive power supply of the outlet relay when a fault is detected;

the protection CPU core is connected with the protection ADC sampling module and the external opening module and used for collecting the analog quantity and the digital quantity, protection logic calculation is carried out according to the acquisition, and when the action condition is met, a tripping signal is sent out to drive the outlet relay to act.

The invention has the beneficial effects that: the invention provides a CPU plug-in unit based on an SOC chip and a relay protection device. The invention integrates the original double CPU plug-ins of the relay protection device into one CPU plug-in, reduces the number of the plug-ins of the relay protection device and saves the cost of the relay protection device. In addition, all CPU cores of the relay protection device are integrated in a plug-in unit, and data are directly transmitted point to point, so that the reliability and the real-time performance of data transmission are improved.

Drawings

Fig. 1 is a schematic diagram of a CPU card of a relay protection device based on an SOC chip.

Detailed Description

The technical scheme of the invention is explained in detail in the following with the accompanying drawings.

An SOC (System On Chip System On Chip) is a highly integrated Chip of an information System core, and a System key Component Processor (CPU) and a field programmable logic device (FPGA) are integrated On a Chip. At most two CPU cores and one FPGA can be integrated in one SOC chip. Therefore, the CPU plug-in unit of the relay protection device based on the SOC integrates the original double CPU plug-ins of the relay protection device into one CPU plug-in unit, reduces the number of the plug-in units of the relay protection device and saves the cost of the relay protection device.

Example 1:

referring to fig. 1, a CPU card of an SOC-chip-based relay protection device according to the present application includes two SOC chips. 1 management CPU core and 1 FPGA are integrated in the first SOC chip; 1 protection CPU core, 1 starting CPU core and 1 FPGA are integrated in the second SOC chip; and data interaction is carried out between the two SOC FPGAs through a data transmission channel.

Specifically, the management CPU core is responsible for sequential event recording, wave recording, printing, time synchronization, human-computer interface and communication with the monitoring system. The startup CPU core is responsible for fault detection, and sends out a startup signal when a fault is detected. And the CPU protection core is responsible for protecting logic calculation and sending a trip signal when an action condition is reached. The FPGA serves as an interface chip and is used for data interaction, storage and management between two SOC pieces and between different relay protection plug-ins.

Example 2:

an embodiment of the relay protection device based on the SOC chip is shown in fig. 1, and includes the above CPU card based on the SOC chip, a protection ADC sampling module, a start ADC sampling module, an external access module, and a redundant outlet relay. The protection ADC sampling module and the start ADC sampling module are independent.

And starting the CPU core, connecting the starting ADC sampling module and the external opening module, collecting the analog quantity and the digital quantity, detecting the fault according to the acquisition, and sending a starting signal to trigger the starting relay to act and open the positive power supply of the outlet relay when the fault is detected.

And the protection CPU core is connected with the protection ADC sampling module and the external opening module and is used for acquiring the analog quantity and the digital quantity, performing protection logic calculation according to the acquisition, and sending a trip signal to drive the outlet relay to act when an action condition is met.

The technical scheme has the following characteristics that a.the CPU plug-in comprises 2 SOC chips, 1 management CPU core and 1 FPGA are integrated in the 1 st SOC chip, and 1 protection CPU core, 1 starting CPU core and 1 FPGA are integrated in the 2 nd SOC chip; the CPU plug-in receives 2 paths of independent ADC analog quantity; c, the CPU plug-in receives the digital quantity and opens; and d, outputting a redundant outlet by the CPU plug-in. The invention reduces the number of plug-ins of the relay protection device, saves the cost of the relay protection device, and improves the reliability and the real-time performance of data transmission between CPU cores.

The above embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the protection scope of the present invention.

Claims

1. A CPU plug-in unit based on SOC chip is used in relay protection device, its characterized in that includes: two SOC chips;

1 management CPU core and 1 FPGA are integrated in the first SOC chip;

2. The SOC chip-based CPU card of claim 1, wherein: the management CPU core is responsible for sequential event recording, wave recording, printing, time synchronization, man-machine interface and communication with the monitoring system.

3. The SOC chip-based CPU card of claim 1, wherein: the starting CPU core is responsible for fault detection, and sends out a starting signal when a fault is detected.

4. The SOC chip-based CPU card of claim 1, wherein: and the protection CPU core is responsible for protection logic calculation, and sends a trip signal when the action condition is reached.

5. The SOC chip-based CPU card of claim 1, wherein: the FPGA serves as an interface chip and is used for data interaction, storage and management between two SOC pieces and between different plug-in units for relay protection.

6. An SOC chip based relay protection device, which is characterized by comprising the SOC chip based CPU plug-in unit, the protection ADC sampling module, the start ADC sampling module, the external opening module and the redundancy outlet relay according to any one of claims 1 to 5;