CN113674680B - PWM (pulse-Width modulation) driving circuit and driving method based on pixel sharing - Google Patents

Abstract

The invention discloses a PWM driving circuit and driving method based on pixel sharing, which includes a plurality of light-emitting units arranged in an array, corresponding to each column of light-emitting units, and also includes a signal processing module for providing PWM driving signals. The light-emitting unit is signal-connected to the signal processing module; corresponding to each row of light-emitting units, a first signal transmitter for providing switching signals is also included, and any light-emitting unit in each row is signal-connected to the first signal transmitter. Based on the principle of pixel sharing, the present invention shares one signal processing module with multiple light-emitting units, significantly reduces the average number of transistors in each driving circuit, greatly reduces integration difficulty and manufacturing cost, and realizes pixel driving with low transistor density.

Description

A PWM driving circuit and driving method based on pixel sharing

technical field

The present invention relates to Micro LED PWM driving, specifically a PWM driving circuit and a driving method based on pixel sharing.

Background technique

For the pixel array, the traditional driving method is to realize the generation of the driving signal through the peripheral circuit, and directly add the signal to the light-emitting unit array through wordline and bitline to realize the driving of the light-emitting unit. Different from the traditional driving circuit, the pixel driving circuit realizes the processing of the peripheral signal through the driving circuit integrated with each pixel light-emitting unit (such as LED), so as to realize the driving of the light-emitting unit. Since the signal processing module is very close to the light emitting unit, the quality of the driving signal obtained in this way is higher.

The current pixel drive circuit requires a signal processing module for each light-emitting unit, which leads to a big disadvantage: for high-density pixel arrays, the drive circuit requires a large degree of integration, and the number of transistors is huge, which directly leads to manufacturing costs. Higher, higher requirements on process stability and quality.

Contents of the invention

Object of the invention: The object of the present invention is to provide a PWM pixel driving circuit with low transistor density based on pixel sharing; the second object of the present invention is to provide a driving operation method for the above-mentioned PWM pixel driving circuit.

Technical solution: A PWM driving circuit based on pixel sharing of the present invention includes several light-emitting units arranged in an array, corresponding to each column of light-emitting units, and also includes a signal processing module for providing PWM driving signals, any one of which emits light in each column The unit is signal-connected to the signal processing module; corresponding to each row of light-emitting units, a first signal transmitter for providing switching signals is also included, and any light-emitting unit in each row is signal-connected to the first signal transmitter.

Further, the light-emitting unit includes a gate transistor for controlling pixel switches, a drive transistor for providing current pulse signals, and a micro LED for displaying light, the gate of the gate transistor is connected to the first signal transmitter connected, the source of the gate transistor is connected to the gate of the driving transistor, the source of the driving transistor is connected to the positive pole of the microLED, and the negative pole of the microLED is grounded.

Further, the signal processing module includes a comparator for outputting a constant voltage and a current mirror for adjusting a constant current, and the current mirror is signal-connected to the comparator.

Further, the comparator includes a differential input stage, a level conversion stage and an amplification stage;

The differential input stage includes a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, and a fourth NMOS transistor M4; the gates of the first NMOS transistor M1 and the second NMOS transistor M2 and the gate transistor connection; the drains of the first NMOS transistor M1 and the second NMOS transistor M2 are respectively connected to the sources of the third NMOS transistor M3 and the fourth NMOS transistor M4; the third NMOS transistor M3 and the fourth NMOS transistor M4 The gate is connected to its own drain, and the drains of the third NMOS transistor M3 and the fourth NMOS transistor M4 are connected to the driving power supply;

The level conversion stage includes a fifth NMOS transistor M5, the gate of the fifth NMOS transistor M5 is connected to the source of the fourth NMOS transistor M4; the drain of the fifth NMOS transistor M5 is connected to a driving power supply;

The amplification stage includes a sixth NMOS transistor M6 and a seventh NMOS transistor M7, the gate of the seventh NMOS transistor M7 is connected to the source of the fifth NMOS transistor M5, and the drain of the seventh NMOS transistor M7 is respectively connected to The source of the sixth NMOS transistor M6 is connected to the driving transistor; the gate of the sixth NMOS transistor M6 is connected to its own drain, and the drain of the sixth NMOS transistor M6 is connected to the driving power supply.

Further, the current mirror includes a current source I _B , an eighth NMOS transistor M8, a ninth NMOS transistor M9, and a tenth NMOS transistor M10; the drain of the eighth NMOS transistor M8 is connected to the first NMOS transistor M1 and the second NMOS transistor M1. The source of the NMOS transistor is connected, the drain of the ninth NMOS transistor M9 is connected to the source of the fifth NMOS transistor M5, the drain of the tenth NMOS transistor M10 is connected to one end of the current source _IB , and the current source I The other end of _B is connected to the drive power supply; the gate of the ninth NMOS transistor M9 and the gate of the eighth NMOS transistor M8 are respectively connected to the gate of the tenth NMOS transistor M10, and the gate of the tenth NMOS transistor M10 is connected to itself The drains of the eighth NMOS transistor M8, the ninth NMOS transistor M9 and the tenth NMOS transistor M10 are grounded.

Further, the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, the fourth NMOS transistor M4, the fifth NMOS transistor M5, the sixth NMOS transistor M6, the seventh NMOS transistor M7, and the eighth NMOS transistor M8 , the ninth NMOS transistor M9 and the tenth NMOS transistor M10 all use thin film transistors.

Further, corresponding to each column of light-emitting units, a second signal transmitter for providing time-division multiplexed signals is also included, and the output terminal of the second signal transmitter is connected to the gate and gate of the first NMOS transistor M1 of the signal processing module respectively. The gate of the second NMOS transistor M2 is connected.

The present invention also protects a driving method of a PWM driving circuit based on pixel sharing, which includes the following steps:

Step 1, providing a PWM pixel circuit based on an NMOS transistor as described in any one of claims 1-7;

Step 2, within one operating cycle, the first signal transmitter distributes the signal to the light-emitting units located in the same row;

Step 3, the gate transistor of the light emitting unit is activated, and the second signal transmitter of each column distributes the signal to the corresponding signal processing module;

Step 4: The signal processing module converts the received signal into a PWM voltage signal, and the signal flows through the activated gate transistor and then enters the drive transistor, which generates a PWM current signal and controls the micro LED to emit light;

Step 5. The first signal transmitter distributes the signal to the light-emitting units located in another row, and repeats steps 3 to 4 to drive the pixels of the micro LEDs arranged in an array.

Further, the specific process of step 4 is: the differential input stage of the signal processing module performs calculation on the received signal and outputs it to the level conversion stage, and the level conversion stage converts the DC level of the signal, and matches the output to the amplifier The amplifier stage amplifies the circuit voltage and outputs the voltage pulse signal in the form of a square wave.

Further, the signals received by the signal processing module include level signals and triangular wave signals. The level signals and triangular wave signals are respectively transmitted to the differential input stage through the first NMOS transistor M1 and the second NMOS transistor M2. Two signal transmitters are provided.

The working principle of the present invention is: for micro LEDs arranged in an array, the light-emitting units of each column share a signal processing module to realize pixel drive with low transistor density; for each column, time division multiplexing is provided through the second signal transmitter The signal is sent to the signal processing module, and the corresponding light-emitting unit is controlled to work; for each row, the switch signal is provided through the first signal transmitter to realize the independent turn-on and turn-off of the light-emitting units in different rows, so as to achieve the same effect as the existing The pixel driving circuit has almost the same driving effect.

Beneficial effects: Compared with the prior art, the present invention has the following remarkable features: the present invention is based on the principle of pixel sharing, and multiple light-emitting units share one signal processing module, and the average number of transistors in each driving circuit is significantly reduced, greatly reducing the The difficulty of integration and the cost of preparation realize pixel drive with low transistor density; the use of PWM signal output has a strong driving ability for Micro LED, the driving area and resolution are not limited, and the brightness uniformity of Micro LED is strong, reducing the number of micro LEDs. Light color drift and other issues.

Description of drawings

Fig. 1 is a schematic diagram of a PWM pixel circuit of the present invention;

2 is a schematic circuit diagram of a light emitting unit of the present invention;

Fig. 3 is the circuit diagram of signal processing module of the present invention;

FIG. 4 is a schematic diagram of a 2×2 PWM pixel array in an embodiment;

FIG. 5 is a schematic diagram of a conventional 2×2 PWM pixel array.

Detailed ways

The present invention will be further described below in conjunction with the embodiments and accompanying drawings.

Referring to a PWM driving circuit based on pixel sharing shown in FIG. 1 , it includes light-emitting units 1 arranged in a rectangular array; corresponding to each column of light-emitting units 1, it also includes a signal processing module 2 and a signal connected to the signal processing module 2 The second signal transmitter 4, any light-emitting unit 1 in each column is signal-connected to the signal processing module 2; corresponding to each row of light-emitting units 1, it also includes a first signal transmitter 3, any light-emitting unit 1 in each row is connected to the first Signal transmitter 1 signal connection.

Wherein, the signal processing module 2 is a module shared by columns, the second signal transmitter 4 provides signals for the signal processing module 2, and the signal processing module 2 can provide driving signals for all light-emitting units 1 of the same column; and for each row, Each light-emitting unit 1 coexists, and the first signal transmitter 1 provides an on or off signal. Each row is provided with a first signal transmitter 1 to independently control the switch of each row of light-emitting units 1 .

Referring to FIG. 2 , the light emitting unit 1 includes a gate transistor 11 for controlling pixel switches, a drive transistor 12 for providing current pulse signals, and a micro LED 13 for displaying light. Both the gate transistor 11 and the drive transistor 12 adopt conventional Thin film transistor structure, the source of the gate transistor 11 is connected to the gate of the driving transistor 12, the source of the driving transistor 12 is connected to the positive pole of the micro LED 13, and the negative pole of the micro LED 13 is grounded.

Referring to Figure 3, the signal processing module includes a comparator for outputting a constant voltage and a current mirror for adjusting a constant current, the current mirror is connected to the comparator signal, and the PWM transmission can be realized through the setting of the comparator and the current mirror; wherein, the differential The input stage includes a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, and a fourth NMOS transistor M4; the gates of the first NMOS transistor M1 and the second NMOS transistor M2 are connected to the gate transistor; the first NMOS The drains of the transistor M1 and the second NMOS transistor M2 are respectively connected to the sources of the third NMOS transistor M3 and the fourth NMOS transistor M4; the gates of the third NMOS transistor M3 and the fourth NMOS transistor M4 are connected to their own drains, The drains of the third NMOS transistor M3 and the fourth NMOS transistor M4 are connected to the driving power; the level conversion stage includes a fifth NMOS transistor M5, and the gate of the fifth NMOS transistor M5 is connected to the source of the fourth NMOS transistor M4; The drain of the fifth NMOS transistor M5 is connected to the driving power supply; the amplification stage includes a sixth NMOS transistor M6 and a seventh NMOS transistor M7, the gate of the seventh NMOS transistor M7 is connected to the source of the fifth NMOS transistor M5, and the seventh NMOS transistor M5 The drain of M7 is respectively connected to the source of the sixth NMOS transistor M6 and the driving transistor; the gate of the sixth NMOS transistor M6 is connected to its own drain, and the drain of the sixth NMOS transistor M6 is connected to the driving power supply. In the specific design process, the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, the fourth NMOS transistor M4, the fifth NMOS transistor M5, the sixth NMOS transistor M6, and the seventh NMOS transistor M7 adopt thin film transistors; The channels of the first NMOS transistor M1, the second NMOS transistor M2, and the seventh NMOS transistor M7 have the same channel aspect ratio; the channels of the third NMOS transistor M3, the fourth NMOS transistor M4, the fifth NMOS transistor M5, and the sixth NMOS transistor M6 The length-to-width ratios are the same. The size design of the thin film transistor channel is related to differential mode gain and common mode rejection ratio, and is mainly used to control the channel width-to-length ratio of differential drive transistors M1, M2 and differential load transistors M3, M4.

The current mirror includes a current source _IB , an eighth NMOS transistor M8, a ninth NMOS transistor M9, and a tenth NMOS transistor M10; the drain of the eighth NMOS transistor M8 is connected to the sources of the first NMOS transistor M1 and the second NMOS transistor, The drain of the ninth NMOS transistor M9 is connected to the source of the fifth NMOS transistor M5, the drain of the tenth NMOS transistor M10 is connected to one end of the current source _IB , and the other end of the current source _IB is connected to the driving power supply; the ninth The gate of the NMOS transistor M9 and the gate of the eighth NMOS transistor M8 are respectively connected to the gate of the tenth NMOS transistor M10, and the gate of the tenth NMOS transistor M10 is connected to its own drain; the eighth NMOS transistor M8, the ninth The sources of the NMOS transistor M9 and the tenth NMOS transistor M10 are grounded. The output current of the current source I _B is 3.5 μA. Under the action of the driving power supply, the output current of the current source I _B first passes through the tenth NMOS transistor M10. At this time, the tenth NMOS transistor M10, the eighth NMOS transistor M8, and the ninth NMOS transistor M10 The transistor M9 is in a saturated state, and the gates of the three NMOS transistors are connected, that is, V _gs10 =V _gs8 =V _gs9 , and the transistor saturation region current formula I _ds =0.5μ _n C _ox (W/L) (V _gs- V _th ) ² , where μ _n is the mobility of carriers, C _ox is the capacitance of the gate oxide layer per unit area, and V _th is the threshold voltage. By controlling the W/L size of each NMOS transistor, it can be used as a differential input stage, level translation stage provides a stable current input. The eighth NMOS transistor M8 , the ninth NMOS transistor M9 and the tenth NMOS transistor M10 all use thin film transistors.

In the present invention, the output end of the second signal transmitter 4 is connected to the gate of the first NMOS transistor M1 and the gate of the second NMOS transistor M2, and the main function of the second signal transmitter 4 is to provide time-division multiplexing signals. In one processing cycle, the average processing time allocated to each row is the same, and the time is used as the parameter of signal division, so that the signals of each row do not overlap each other on the time axis, so as to achieve the purpose of multiplex transmission control. Wherein, the second signal transmitter 4 provides a level signal and a triangular wave signal respectively, the level signal is input through the first NMOS transistor M1, and the triangular wave signal is input through the second NMOS transistor M2; the main function of the first signal transmitter 3 is to control each The switch of the gate transistor 11 of a row, the first signal emitter 3 is also the start point of starting each row.

The driving process of the PWM driving circuit based on pixel sharing is:

In the initial stage, within one operation cycle, the first signal transmitter 3 distributes the signal to the light emitting units 1 located in the same row; then the gate transistor 11 of the light emitting unit is activated, and the second signal transmitter 4 of each column distributes the signal For the corresponding signal processing module 2; the comparator, the current mirror and the driving transistor are connected to the driving power supply, and the current source _IB is respectively passed through the eighth NMOS transistor M8, the ninth NMOS transistor M9 and the tenth NMOS transistor M10 as a differential input stage, a power supply The level conversion stage and the amplification stage provide a constant current; the second signal transmitter 4 transmits the level signal and the triangular wave signal to the differential input stage through the first NMOS transistor M1 and the second NMOS transistor M2 respectively;

，其中

为第一级的电压放大增益；该级输出信号传入电平转换级；在第电平转换级中，信号的直流电平进行转换，此时构成一个共漏极放大器，即M5处于饱和区，M5栅极输入信号的变化会影响M5的输出电导，实现控制输出直流电平的目的，使其能与放大级的直流放大电平相匹配，该级的输出

，其中

为该级的放大增益，

，该级输出信号传入放大级；放大级为电路提供主要增益，该级的结构为反相器，反相器输入输出曲线的斜率越大，该反相器的增益越大，该级的输出即为比较器的输出

，其中

为该级的电压增益；由于第一级的输入为大信号，信号经电路放大后，必然很快达到饱和，故电路的总体输出为方波信号，即VIN₂>VIN₁时输出为高电平

，否则为低电平VSS。In the running stage, when the level signal and triangular wave signal are transmitted to the differential stage, since the two inverters of the differential pair are connected to the same equivalent current source, the disturbance of the input signal at one end will affect the current distributed to the other end. In order to control the working condition of the other end, when the triangular wave signal increases, the operating current of the inverter at the right end increases, and correspondingly, the current shared by the inverter at the left end decreases, which is reflected in the increase of the overall output voltage OUT1, that is, the differential stage Do an operation on these two signals, the output of the stage

,in

is the voltage amplification gain of the first stage; the output signal of this stage is passed into the level conversion stage; in the first level conversion stage, the DC level of the signal is converted, and a common drain amplifier is formed at this time, that is, M5 is in the saturation region, The change of the input signal of M5 grid will affect the output conductance of M5, and realize the purpose of controlling the output DC level, so that it can match the DC amplification level of the amplifier stage, and the output of this stage

,in

is the amplification gain of this stage,

, the output signal of this stage is transmitted to the amplifier stage; the amplifier stage provides the main gain for the circuit, and the structure of this stage is an inverter. The larger the slope of the input and output curve of the inverter, the greater the gain of the inverter, and the greater the gain of this stage output is the output of the comparator

,in

is the voltage gain of this stage; since the input of the first stage is a large signal, the signal must reach saturation soon after being amplified by the circuit, so the overall output of the circuit is a square wave signal, that is, when VIN ₂ >VIN ₁ , the output is a high voltage flat

, otherwise low VSS.

In the light-emitting phase, the signal processing module 2 outputs a PWM voltage signal, which flows through the activated gate transistor 11 and enters the drive transistor 12 to drive the transistor 12 to generate a PWM current signal and control the micro LED 13 to emit light; when the processing time of this line is completed, The first signal transmitter 3 controls the shutdown signal, and the first signal transmitter 3 in another row activates and activates the gate transistor 11 and repeats the above-mentioned various stages, so as to complete the light emission of another row, so as to reciprocate the micro LED arranged in the array pixel driver.

Due to the use of PWM signal output, a higher driving frequency can be achieved, thereby ensuring the uniformity of the brightness of each row of microLEDs.

Referring to FIG. 4 , taking a 2×2 PWM pixel array as an example, IN1, Tri, and IN2 are all provided with signals by the second signal transmitter 4, and Vsw1 and Vsw2 are signals provided by the first signal transmitter 3. During the entire sharing process, The patterns of all signals did not change. The signal of the second signal transmitter 4 is a time-division multiplexing signal; in a running cycle, the first 1/2 cycle provides signals for the first row, and the latter 1/2 cycle provides signals for the second row; the first signal transmitter 3 The signal is a switching signal; in one operating cycle, Vsw1 is high in the first 1/2 cycle, Vsw2 is low, and the first line is turned on; in the second 1/2 cycle, Vsw1 is low, Vsw2 is high, and the second line is turned on.

working process:

In the first 1/2 period, the second signal transmitter 4 gives the level signal and triangular wave signal of the first row, Vsw1 is high, Vsw2 is low, the gate transistor of the first row is turned on, the second row is turned off, and the pixel unit of the first row Activated. After the signal is processed by the signal processing module 2, it is converted into a PWM voltage signal. The signal flows through the turned-on gate transistor of the first row and is applied to the gate of the driving transistor to control the driving transistor to generate a PWM current signal to control the first row of micro LEDs. Lighting, the brightness of each micro LED is controlled by the specific voltage of IN1 and IN2; the same is true for the last 1/2 cycle, the second signal transmitter 4 gives the level signal and triangular wave signal of the second line, Vsw1 is low, Vsw2 high; control the second row of micro LEDs to emit light in the same way.

The number of transistors actually used in this embodiment is 28. Referring to FIG. 5, the number of transistors actually used in the traditional drive circuit is 52. The number of transistors in this embodiment is far smaller than that of the traditional drive circuit. Larger, the number of transistors used in the pixel sharing method of the present invention will be lower.

Claims (7)

1. A PWM drive circuit based on pixel sharing, comprising several light-emitting units (1) arranged in an array, characterized in that: corresponding to each row of light-emitting units (1), also includes a signal processing module for providing PWM drive signals ( 2), any light-emitting unit (1) in each column is signal-connected to the signal processing module (2); corresponding to each row of light-emitting units (1), it also includes a first signal transmitter (3) for providing switching signals, each Any light-emitting unit (1) in a row is signal-connected to the first signal transmitter (3); The signal processing module includes a comparator for outputting a constant voltage and a current mirror for adjusting a constant current, and the current mirror is connected to the comparator signal; The comparator includes a differential input stage, a level conversion stage and an amplification stage; The differential input stage includes a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, and a fourth NMOS transistor M4; the gates of the first NMOS transistor M1 and the second NMOS transistor M2 and the gate transistor connection; the drains of the first NMOS transistor M1 and the second NMOS transistor M2 are respectively connected to the sources of the third NMOS transistor M3 and the fourth NMOS transistor M4; the third NMOS transistor M3 and the fourth NMOS transistor M4 The gate is connected to its own drain, and the drains of the third NMOS transistor M3 and the fourth NMOS transistor M4 are connected to the driving power supply; The level conversion stage includes a fifth NMOS transistor M5, the gate of the fifth NMOS transistor M5 is connected to the source of the fourth NMOS transistor M4; the drain of the fifth NMOS transistor M5 is connected to a driving power supply; The amplification stage includes a sixth NMOS transistor M6 and a seventh NMOS transistor M7, the gate of the seventh NMOS transistor M7 is connected to the source of the fifth NMOS transistor M5, and the drain of the seventh NMOS transistor M7 is respectively connected to The source of the sixth NMOS transistor M6 is connected to the driving transistor; the gate of the sixth NMOS transistor M6 is connected to its own drain, and the drain of the sixth NMOS transistor M6 is connected to the driving power supply; Corresponding to each row of light-emitting units (1), it also includes a second signal transmitter (4) for providing time-division multiplexing signals, and the output terminals of the second signal transmitter (4) are respectively connected to the signal processing module (2) The gate of the first NMOS transistor M1 is connected to the gate of the second NMOS transistor M2. 2. The PWM driving circuit based on pixel sharing according to claim 1, characterized in that: the light-emitting unit (1) includes a gate transistor (11) for controlling the pixel switch, a driver for providing a current pulse signal A transistor (12) and a micro LED (13) for displaying light, the gate of the gate transistor (11) is connected to the first signal transmitter (3), and the source electrode of the gate transistor (11) is connected to the drive transistor The gate of (12) is connected, the source of the driving transistor (12) is connected to the positive pole of the micro LED (13), and the negative pole of the micro LED (13) is grounded. 3. The PWM drive circuit based on pixel sharing according to claim 1, wherein the current mirror comprises a current source _IB , an eighth NMOS transistor M8, a ninth NMOS transistor M9, and a tenth NMOS transistor M10; The drain of the eighth NMOS transistor M8 is connected to the sources of the first NMOS transistor M1 and the second NMOS transistor, the drain of the ninth NMOS transistor M9 is connected to the source of the fifth NMOS transistor M5, and the tenth NMOS transistor M5 is connected to the source. The drain of the NMOS transistor M10 is connected to one end of the current source I _B , and the other end of the current source I _B is connected to the drive power supply; the grid of the ninth NMOS transistor M9 and the grid of the eighth NMOS transistor M8 are respectively connected to the tenth NMOS transistor M8. The gate of the NMOS transistor M10 is connected, the gate of the tenth NMOS transistor M10 is connected to its own drain; the sources of the eighth NMOS transistor M8 , the ninth NMOS transistor M9 and the tenth NMOS transistor M10 are grounded. 4. The PWM drive circuit based on pixel sharing according to claim 3, characterized in that: the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, the fourth NMOS transistor M4, and the fifth NMOS transistor M5 , the sixth NMOS transistor M6 , the seventh NMOS transistor M7 , the eighth NMOS transistor M8 , the ninth NMOS transistor M9 and the tenth NMOS transistor M10 all use thin film transistors. 5. A driving method based on a pixel-sharing PWM drive circuit, characterized in that, comprising the following steps: Step 1, providing a PWM drive circuit based on pixel sharing as described in any one of claims 1-4; Step 2, within one operating cycle, the first signal transmitter (3) distributes signals to the light emitting units (1) in the same row; Step 3, the gate transistor (11) of the light emitting unit is activated, and the second signal transmitter (4) of each column distributes the signal to the corresponding signal processing module (2); Step 4, the signal processing module (2) converts the received signal into a PWM voltage signal, the signal flows through the activated gate transistor (11) and then enters the drive transistor (12), and the drive transistor (12) generates a PWM current signal and controls micro LED (13) emits light; Step 5. The first signal transmitter (3) distributes the signal to the light-emitting unit (1) located in another row, and repeats steps 3 to 4 to drive the pixels of the micro LEDs arranged in an array. 6. The driving method of the PWM driving circuit based on pixel sharing according to claim 5, characterized in that, the specific process of step 4 is: the differential input stage of the signal processing module (2) performs calculations on the received signal and Output to the level conversion stage, the level conversion stage converts the DC level of the signal, and matches the output to the amplification stage, the amplification stage amplifies the circuit voltage, and outputs the voltage pulse signal in the form of a square wave. 7. The driving method of the PWM drive circuit based on pixel sharing according to claim 6, wherein the signal received by the signal processing module (2) includes a level signal and a triangular wave signal, and the level signal and the triangular wave signal pass through the first An NMOS transistor M1 and a second NMOS transistor M2 are transmitted to the differential input stage, and the level signal and the triangular wave signal are provided by the second signal transmitter (4).

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