CN113672433B - Computer device and shutdown and restarting method thereof - Google Patents
Computer device and shutdown and restarting method thereof Download PDFInfo
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- CN113672433B CN113672433B CN202010412642.8A CN202010412642A CN113672433B CN 113672433 B CN113672433 B CN 113672433B CN 202010412642 A CN202010412642 A CN 202010412642A CN 113672433 B CN113672433 B CN 113672433B
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 238000010248 power generation Methods 0.000 claims abstract description 44
- 230000002159 abnormal effect Effects 0.000 claims abstract description 37
- 238000012544 monitoring process Methods 0.000 claims description 24
- 230000006870 function Effects 0.000 claims description 5
- 238000001514 detection method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1438—Restarting or rejuvenating
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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Abstract
The method includes that a logic circuit generates a first enabling signal at a first level to a power generation circuit to generate a working power and a standby power for the processing circuit to operate, the processing circuit generates an abnormal signal when the operating temperature is higher than a default temperature, or generates the abnormal signal when the pressing signal generated when a corresponding power key is pressed is longer than a default level, when the logic circuit receives the abnormal signal and the pressing signal is longer than the default time, the logic circuit generates the first enabling signal at a second level, and the power generation circuit stops generating the working power and the standby power according to the first enabling signal at the second level.
Description
[ Field of technology ]
The present invention relates to a computer device, and more particularly to a computer device with emergency shutdown and restart functions.
[ Background Art ]
Computers are commonly used in people's life, and can handle a plurality of operations instead of manpower, however, the computers still have limitations in use, for example, the computer is in use and insufficient available memory capacity caused by too much software or program, and when the computer is down, a user of the computer generally continuously presses a power key of the computer, so that the computer is expected to be shut down by long-pressing the power key to solve the problem of down.
However, because versions of the single chip of the system collocated with the computer are different, the single chip of the system collocated with the specific version of the main board of the computer cannot be shut down according to the fact that a user presses a power key for a long time, namely, the power key is pressed for a long time to trigger the computer to perform shutdown operation, for such a computer, once the computer is down, if the computer needs to be repaired, the user can only directly unplug a power line of the computer after the computer is down to force the computer to directly enter a complete shutdown state under the condition of incompletely executing a normal shutdown program because no commercial power is received, then reinsert the power line to provide the commercial power for the computer again to restart the computer, and the power line of the unplugged computer is used to force the computer to be shut down.
[ Invention ]
The invention provides a computer device and a shutdown and restarting method thereof, which can avoid the problem that the processing circuit does not return to the default setting parameters after entering a monitoring mode, so that the computer device still executes a startup program with the wrong setting parameters after restarting, thereby causing the shutdown of the computer device again.
In order to solve the technical problems, the computer device with the emergency shutdown and restarting functions comprises a power key, a processing circuit, a power generation circuit and a logic circuit. The processing circuit is coupled to the power key, the processing circuit has an operation temperature, and the processing circuit generates an abnormal signal when the operation temperature is greater than a default temperature, or generates an abnormal signal when a pressing signal generated when the corresponding source key is pressed is at a default level for a time length greater than a preset time length. The power generation circuit is coupled to the processing circuit and is used for generating a working power supply and a standby power supply for the processing circuit to operate according to a first enabling signal at a first level, and generating no working power supply and no standby power supply according to the first enabling signal at a second level. The logic circuit is coupled to the processing circuit and the power generation circuit, and is configured to generate a first enable signal at a first level in a working mode of the computer device, detect the abnormal signal, and determine whether a time length of the pressing signal at a default level is greater than a default time length, and when the logic circuit detects the abnormal signal and the time length of the pressing signal at the default level is greater than the default time length, the logic circuit generates the first enable signal at a second level to control the power generation circuit to stop generating the voltage signal, so as to turn off the processing circuit, and switch the computer device from the working mode to a monitoring mode.
The invention provides a shutdown and restart method of a computer device, which comprises a logic circuit generating a first enabling signal at a first level to a power generating circuit to generate a working power and a standby power for a processing circuit to operate, wherein the processing circuit generates an abnormal signal when an operating temperature is greater than a default temperature or generates an abnormal signal when a pressing signal generated when a corresponding power key is pressed is greater than a default time, the logic circuit judges whether the abnormal signal is received, the logic circuit judges whether the pressing signal is greater than the default time, when the logic circuit receives the abnormal signal and the pressing signal is greater than the default time, the logic circuit generates the first enabling signal at a second level, and the power generating circuit stops generating the working power and the standby power according to the first enabling signal at the second level to switch the computer device to a monitoring mode.
Compared with the prior art, by means of the shutdown and restart method of the computer device, when the processing circuit or other components of the computer device cannot normally execute shutdown operation according to the long-time power key pressing of the user to enter the monitoring mode, the logic circuit can urgently shut down the processing circuit to the shutdown state by means of urgent processing operation so as to force the computer device to shutdown to the monitoring mode, so that the problem that the processing circuit cannot be switched to the shutdown state by long-time power key pressing under the condition that the computer device is down by the user and the computer device cannot be normally restarted to perform startup program to reset the processing circuit is solved, and wrong setting parameters possibly causing the computer device down in the processing circuit are corrected. The logic circuit can control the processing circuit to reset the starting program in the restarting operation after the computer device is turned off and enters the monitoring mode, so that the problem that the computer device is down again because the processing circuit does not return to the default setting parameters after entering the monitoring mode and the computer device still executes the starting program with the wrong setting parameters after restarting is avoided.
[ Description of the drawings ]
Fig. 1 is an external view of a computer device according to an embodiment of the invention.
FIG. 2 is a block diagram of a computer device according to an embodiment of the invention.
FIG. 3 is a flowchart illustrating an embodiment of a method for generating an exception signal in a processing unit according to the present invention.
FIG. 4 is a flowchart of a shutdown and restart method of a computer device according to an embodiment of the invention.
FIG. 5 is a block diagram of an embodiment of the computer device of FIG. 1.
[ Detailed description ] of the invention
Referring to fig. 1 to 3, the computer device 1 includes a logic circuit 11, a processing circuit 12, a power button 13, and a power generation circuit 14. As shown in fig. 1, the power key 13 may be provided in a casing of the computer apparatus 1; as shown in fig. 2, the processing circuit 12 and the logic circuit 11 are coupled to the power key 13, the logic circuit 11 is coupled to the processing circuit 12 and the power generating circuit 14, and the power generating circuit 14 is coupled to the processing circuit 12.
In an embodiment, the processing circuit 12 may be implemented as a System on a Chip (SoC), the processing circuit 12 has a high temperature detecting unit for detecting an operation temperature, the high temperature detecting unit compares the operation temperature with a default temperature to determine whether the operation temperature of the processing circuit 12 is greater than the default temperature (step S07), when the operation temperature is greater than the default temperature, the processing circuit 12 switches the operation state (the processing circuit 12 is switched from a normal operation mode to a low power consumption mode, such as a down mode, a sleep mode, a standby operation mode, etc., when the processing circuit 12 is operated in the standby operation mode, the processing circuit 12 receives and determines whether a duration corresponding to a preset level of the pressing signal S1 generated when the power key 13 is pressed is less than the preset duration, and when the processing circuit 12 determines that the pressing signal S1 generated when the power key 13 is pressed is less than the preset level, the processing circuit 12 switches the operation mode, wherein when the processing circuit 12 is operated in the low power consumption mode and the processing circuit 12 is operated in the abnormal operation mode, such that the processing circuit 12 is operated in the abnormal operation mode.
For example, the default temperature may be 90 degrees, and the high temperature detecting unit detects and compares the operation temperature with the default temperature of 90 degrees to determine whether the operation temperature is greater than 90 degrees. When the high temperature detecting unit determines that the operation temperature is greater than 90 degrees, the trigger processing circuit 12 generates the abnormal signal S2. The high temperature detection unit may be implemented in a manner built in the processing circuit 12, or may be implemented in a manner externally hung on the processing circuit 12, where the high temperature detection unit is electrically connected to the processing circuit 12, and the high temperature detection unit may be disposed adjacent to the processing circuit 12 to detect an operating temperature of the processing circuit 12. In one embodiment, the high temperature detecting unit, such as a thermistor, detects the processor temperature and triggers the processing circuit 12 to generate the abnormal signal S2 when the detected operating temperature is higher than the default temperature.
Moreover, since the power key 13 may be pressed by the user of the computer device 1, the processing circuit 12 determines whether the duration of the pressing signal S1 generated when the power key 13 is pressed is greater than a predetermined duration (step S08), so as to determine whether the user presses the power key 13 for a long time. When the processing circuit 12 determines that the duration of the pressing signal S1 at the default level is greater than the default duration, the processing circuit 12 generates an abnormal signal S2 indicating that the user of the computer device 1 presses the power key 13 for a long time. For example, the pressing signal S1 is at a low level and the pressing signal S1 is at a high level and the pressing signal S1 is not pressed, the predetermined time period may be 4 seconds, and the processing circuit 12 may determine whether the duration of the pressing signal S1 at the low level is greater than 4 seconds, so as to determine whether the user of the computer device 1 presses the power key 13 for a long time. Then, as shown in fig. 3, when the processing circuit 12 determines that the operating temperature of the processing circuit 12 of the computer device 1 is abnormal by the high temperature detection unit (yes in step S07) or the processing circuit 12 determines that the duration of the pressing signal S1 at the predetermined level is longer than the predetermined duration (yes in step S08), the processing circuit 12 is triggered to generate the abnormal signal S2 (step S09).
The power generation circuit 14 receives an external power generated by at least one of a power supply (power supply) and a selectively matched adapter (adapter), and generates a working power and a standby power for the processing circuit 12 according to a first enable signal S31 at a first level, or does not generate the working power and the standby power to turn off the processing circuit according to a first enable signal S31 at a second level, so that the computer device is switched from the working mode to the monitoring mode, and the level of a second enable signal S32 selectively switches the external power to at least one of a working power P1, a standby power P2 and a monitoring power required by the computer device 1 in one of the working mode, the standby mode and the monitoring mode, and generates a first voltage signal and a second voltage signal for the processing circuit 12 and the logic circuit 11 to monitor the power generation state of the power generation circuit 14. When the computer device 1 is operating in the operation mode, the second enabling signal S32 and the first enabling signal S31 are at the first level, so that the power generating circuit 14 generates the first voltage signal and the second voltage signal for the computer device 1 to operate in the operation mode, the standby power P2 and the monitoring power, and for the processing circuit 12 and the logic circuit 11 to monitor the power generation state; when the computer device 1 is in the standby mode, the second enable signal S32 is at the second level and the first enable signal S31 is at the first level, so that the power generation circuit 14 generates the standby power P2, the monitor power and the second voltage signal for the logic circuit 11 to monitor the power generation status and does not generate the working power P1 and the first voltage signal; when the first enable signal S31 is at the second level, the power generation circuit 14 generates the monitor power and does not generate the operating power P1, the standby power P2, the first voltage signal and the second voltage signal, so that the computer device 1 operates in the monitor mode.
In one embodiment, the power generating circuit 14 includes a first power generating unit and a second power generating unit, the second power generating unit converts the external power according to the first enable signal S31 with the first level to generate the standby power P2 and the second voltage signal, and the first power generating unit converts the standby power P2 generated by the second power generating unit according to the second enable signal S32 with the first level to generate the working power P1 and the first voltage signal, so when the first enable signal S31 is at the second level, the power generating circuit 14 generates the monitor power and does not generate the standby power P2, and the first power generating unit cannot convert and generate the working power P1 because the standby power P2 is not received.
Based on the above, referring to fig. 2 and 4, when the computer device 1 is in the operation mode, the logic circuit 11 generates the first enable signal S31 at the first level to the power generation circuit 14 (step S01), the processing circuit 12 generates the second enable signal S32 at the first level to the power generation circuit 14, the power generation circuit 14 generates the operating power P1, the standby power P2, the monitor power and the first and second voltage signals for the processing circuit 12 and the logic circuit 11 to monitor the power generation state according to the received second enable signal S32 and the first enable signal S31 at the first level, and the logic circuit 11 further determines whether the abnormal signal S2 from the processing circuit 12 is received (step S03), and the logic circuit 11 further determines whether the time duration of the pressing signal S1 at the default level is greater than the predetermined time duration (step S04). In fig. 4, the logic circuit 11 sequentially executes the steps S03 and S04, but the invention is not limited thereto, and the logic circuit 11 may execute the steps S03 and S04 simultaneously or execute the step S04 before executing the step S03.
When the logic circuit 11 detects the abnormal signal S2 (yes in step S03), it indicates that the operating temperature of the processing circuit 12 is possibly abnormal, or the processing circuit 12 determines that the duration of the pressing of the power key 13 is greater than the default duration and the processing circuit 12 is switched to operate in the low power consumption mode; at this time, the logic circuit 11 further selects whether to generate the first enable signal S31 at the second level according to the determination result of whether the time length of the pressing signal S1 at the default level is greater than the predetermined time length. When the logic circuit 11 detects the abnormal signal S2 and determines that the time length of the pressing signal S1 at the default level is greater than the preset time length (yes in step S04), the power key 13 is pressed by the user to cause the processing circuit 12 to switch to operate in the low power consumption mode and generate the abnormal signal S2, and at this time, the logic circuit 11 performs an emergency processing operation, i.e. the logic circuit 11 generates the first enabling signal S31 at the second level to the power generating circuit 14 (step S05), so that the power generating circuit 14 only generates the monitor power and stops generating the working power P1 and the standby power P2 and the first voltage signal and the second voltage signal according to the first enabling signal S31 at the second level, so that the processing circuit 12 cannot operate in the low power consumption mode and is switched to be in the off state because the standby power P2 is not received, and the computer device 1 is switched from the working mode to a monitor mode.
Therefore, when the processing circuit 12 does not support the function of normally executing the shutdown operation of the computer device 1 to enter the monitor mode directly according to the long-time pressing of the power key 13 by the user, the logic circuit 11 may be matched to ensure that the processing circuit 12 is operated in the low power consumption mode after the switching operation of the processing circuit 12 is ensured by sharing the emergency processing operation after the detection of the high temperature, and the power generation circuit 14 can still be controlled to generate no working power P1 and no standby power P2 by the long-time pressing of the power key 13 by the user so as to force the computer device 1 to switch to enter the monitor mode due to the fact that the working power P1 and the standby power P2 are not received.
In one embodiment, when the computer device 1 is operating in the monitor mode, the power generating circuit 14 provides the monitor power to the computer device 1 for the logic circuit 11 to detect and determine whether to receive the pressing signal S1 at the predetermined level (step S10), if the logic circuit 11 receives the pressing signal S1 at the default level when the computer device 1 is operating in the monitor mode (yes), the logic circuit 11 generates and transmits the first enabling signal S31 to the power generating circuit 14 to make the power generating circuit 14 generate the standby power P2 again, and the processing circuit 12 also initializes due to receiving the standby power P2 again, and generates the second enabling signal S32 to the power generating circuit 14 again to make the power generating circuit 14 provide the operating power P1 again (i.e. the computer device 1 switches to operate in the operating mode) and makes the processing circuit 12 switch to operate in the operating mode.
In one embodiment, the first level and the second level may be a high level (i.e., logic "1") and a low level (i.e., logic "0"), respectively, and the logic circuit 11 sends the first enable signal S31 with the low level and the first enable signal S31 with the high level in step S01 and step S05, respectively; the abnormal signal S2 may have a low level, and when the processing circuit 12 determines that the operating temperature is not greater than the default temperature and the processing circuit 12 does not receive the pressing signal S1 at the default level for a time period greater than the predetermined time period in the Gao Wenzhen measurement unit, the processing circuit 12 generates the normal signal without generating the abnormal signal S2, wherein the normal signal has a high level, and the logic circuit 11 determines whether the abnormal signal S2 having the low level is received in step S03.
In one embodiment, when the logic circuit 11 detects the abnormal signal S2 but does not determine that the time duration of the pressing signal S1 at the default level is longer than the preset time duration (no in step S04), it indicates that the operating temperature of the processing circuit 12 is abnormal and is switched to the low power consumption mode but the user does not press the power key 13 for a long time; at this time, the logic circuit 11 continues to generate the first enable signal S31 at the first level (step S01), so that the power generation circuit 14 continues to generate the operating power P1 and the standby power P2 (step S02), that is, when the logic circuit 11 does not determine that the duration of the pressing signal S1 at the default level is greater than the default duration, the logic circuit 11 does not control the power generation circuit 14 to stop generating the standby power P2, and thus the computer device 1 does not switch to the monitor mode due to not receiving the standby power P2.
In one embodiment, as shown in fig. 2, the processing circuit 12 includes a cpu 121 and a platform path controller 122, when the computer device 1 is in the operation mode, the platform path controller 122 generates a second enable signal S32 with a first level to control the power generation circuit 14 to generate the operation power P1 for the computer device 1 to operate in the operation mode, and when the platform path controller 122 generates a second enable signal S32 with a second level to control the power generation circuit 14 not to generate the operation power P1, the computer device 1 is operated in the standby mode; when the logic circuit 11 generates the first enable signal S31 at the first level, the power generation circuit 14 generates the standby power P2 for the computer device 1 to operate in one of the operating mode and the standby mode, and when the logic circuit 11 generates the first enable signal S31 at the second level, the power generation circuit 14 is controlled to stop generating the standby power P2 and the operating power P1 according to the first enable signal S31 at the second level (step S06), so that the platform path controller 122 and the cpu 121 enter the off state because the standby power P2 and the operating power P1 are not received, and the computer device 1 is also switched from the operating mode to the monitoring mode.
Furthermore, before the platform path controller 122 enters the off state, that is, before the logic circuit 11 does not generate the first enable signal S31 with the second level to control the power generation circuit 14 to stop generating the standby power P2, when the logic circuit 11 detects the abnormal signal S2 and the pressing signal S1 is at the default level for a time period longer than the predetermined time period, referring to fig. 2 and 5, the logic circuit 11 further generates a shutdown signal S6 to the platform path controller 122, and the logic circuit 11 outputs the shutdown signal S6 through the output terminal 112, wherein the output terminal 112 is different from the output terminal 111 outputting the first enable signal S31, so that the platform path controller 122 performs a corresponding shutdown operation according to the shutdown signal S6, for example, the platform path controller 122 generates the second enable signal S32 with the second level to control the power generation circuit 14 to stop generating the working power P1. However, since the CPU 121 and the platform path controller 122 cannot normally switch to the off state and control the computer device 1 to restart and reinitialize to solve the problem of downtime of the computer device 1 when the computer device 1 is down, the computer device 1 is switched to the monitoring mode by controlling the power generation circuit 14 to stop generating the working power P1 and the standby power P2 according to the logic circuit 11. Since the CPU 121 or the processing circuit 12 thereof cannot smoothly enter the off state and cannot be initialized again when the computer device 1 is down, since the CPU 121 or the processing circuit 12 thereof does not support the function of normally executing the shutdown operation of the computer device 1 according to the long-time pressing of the power key 13 by the user, and further cannot repair the shutdown problem of the computer device 1 under the condition that the power line is not required to be plugged in by the user, the logic circuit 11 judges that the time length of the pressing signal S1 is at the default level is longer than the preset time length, that the emergency processing operation after the detection is performed to control the computer device 1 to enter the monitoring mode, namely, the CPU 12 comprises the CPU 121 and the control device is reset to be in the monitoring mode when the whole of the computer device 1 is in the default state and the logic circuit 11 is not required to restart the computer device 1, the computer device 1 can be initialized only by the logic circuit 11 is reset when the CPU 1 is in the default state and the power line is required to be restarted, the CPU 1 is only reset by the logic circuit 1 is required to be initialized, and the CPU 1 is reset to be initialized, and the controller 1 is only in the default state and the control device 1 is in the default state 1 is required to be in the state 1, and the state 1 is in the default state 1 is in the state required to be in the state reset state 1 mode and the state 1 and the state required to be in the state reset mode and the processing circuit 1 is in the state reset mode and the processing device is in the standby mode. And further to solve the downtime problem of the computer device 1.
Thus, when the platform path controller 122 of the computer device 1 cannot bring the processing circuit 12 of the computer device 1 into the off state according to the long-pressed power key 13, the logic circuit 11 can control the power generation circuit 14 to stop generating the standby power P2 and the working power P1 for the processing circuit 12 (including the cpu 121 and the platform path controller 122) to operate by executing the emergency processing operation, so as to force the computer device 1 to switch to the monitoring mode. In addition, since the platform path controller 122 and the cpu 121 are both in the off state, the computer device 1 is in the low-power monitoring mode, and compared with the soft-off mode (S5/G2) defined by the advanced configuration and the power interface (Advanced Configuration and Power Interface; ACPI), the power consumption of the computer device 1 in the low-power monitoring mode is smaller than the power consumption of the computer device 1 in the soft-off mode, that is, the power consumption of the computer device 1 in the soft-off mode is reduced by the mechanism of controlling the shutdown of the computer device 1 by the logic circuit 11, and the computer device 1 in the down cannot be completely shut down by the soft-off processing circuit 12, so that the computer device 1 in the down cannot be restarted without the need of plugging the power line by the user.
In an embodiment, when the computer device 1 is in the monitor mode, the cpu 121 and the platform path controller 122 are also in the off state because the operating power P1 and the standby power P2 are not received, and the logic circuit 11 operating by the monitor power can still operate normally when the computer device 1 is in the monitor mode, and the logic circuit 11 determines that the pressing signal S1 is at the default level in the monitor mode (step S10) to determine whether the user of the computer device 1 wants to restart the computer device 1 by pressing the power key 13. When the logic circuit 11 determines that the pressing signal S1 with the default level is input (yes in step S10), the logic circuit 11 indicates that the user of the computer device 1 presses the power key 13, at this time, the logic circuit 11 generates a first enable signal S31 with the first level (step S11) to control the power generation circuit 14 to generate the standby power P2, so that the platform path controller 122 receives the standby power P2 again to initialize and generate a second enable signal S32 with the first level again to control the power generation circuit 14 to generate a working power P1 for the central processing unit 121 and the platform path controller 122 to operate, and the logic circuit 11 also sends a reset signal S5 to the processing circuit 12 via the output end 113 (step S12), so that the processing circuit 12 performs a reset operation, the central processing unit 121 and the platform path controller 122 can restore the set parameters of the respective registers or the temporarily stored data to the default values according to the reset signal S5, in detail, the platform path controller 122 receives the standby power P2 again and the reset signal S5 to reset the temporarily stored set parameters or the temporarily stored data to generate the second enable the first reset parameters to enter the default power source 1 to be the first power source 1, and then the computer device can start the working mode to generate the working power P1 after the reset signal S1 is reset and the reset parameters are received; after the reset operation is completed, the cpu 121 and the platform path controller 122 start to execute the power-on operation of the computer device 1, so as to avoid the problem that the cpu 121 and the platform path controller 122 do not return to the default setting after the power-off is closed, and thus the computer device 1 is down again due to the fact that the default setting is not returned in the restarting process.
In one embodiment, the working power P1 generated by the power generation circuit 14 corresponds to a main power (hereinafter referred to as the working power P1 for convenience of description) on the motherboard of the computer device 1 for the cpu 121 and the platform path controller 122 to operate, and the working power P1 is generated by converting the standby power P2 (standby power) generated by the power generation circuit 14, the power generation circuit 14 stops generating the standby power P2 when receiving the first enable signal S31 at the second level, so that the associated stopping power generation circuit 14 generates the working power P1, and then causes the cpu 121 and the platform path controller 122 to enter the off state to cause the computer device 1 to be turned off and enter the monitor mode; furthermore, when the computer device 1 is in the monitor mode, the logic circuit 11 operates according to the monitor power provided on the motherboard of the computer device 1, and since the monitor power of the computer device 1 is only used by a few related circuits (including the logic circuit 11, the related circuits connecting the logic circuit 11 and the power key 13, and the related circuits generating the power key 13 according to the trigger to generate the pressing signal S1) related to the detection and judgment that the pressing signal S1 is at the default level, the power consumption of the monitor power of the computer device 1 is smaller than the power consumption of the standby power P2.
In an embodiment, the logic circuit 11 may be implemented as a Microcontroller (MCU).
In summary, according to an embodiment of the present disclosure, when a processing circuit or other components of a computer device cannot normally execute a shutdown operation to enter a monitor mode according to a long-time power key press by a user, a logic circuit can urgently shut down the processing circuit to a shutdown state by means of an urgent processing operation to force the computer device to shutdown to the monitor mode, so as to solve the problem that the processing circuit cannot be switched to the shutdown state by a long-time power key press by the user in case of shutdown of the computer device, and the computer device cannot be normally restarted to perform a startup procedure to reset the processing circuit, so as to correct a setting parameter of the processing circuit, which may cause an error of shutdown of the computer device. The logic circuit can control the processing circuit to reset the starting program in the restarting operation after the computer device is turned off and enters the monitoring mode, so that the problem that the computer device is down again because the processing circuit does not return to the default setting parameters after entering the monitoring mode and the computer device still executes the starting program with the wrong setting parameters after restarting is avoided.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, but rather by the appended claims.
Claims (8)
1. A computer device with emergency shutdown and restart functions, comprising:
A power key;
The processing circuit is coupled with the power key, has an operation temperature and is used for generating an abnormal signal when the operation temperature is higher than a default temperature or generating the abnormal signal when a pressing signal generated when the corresponding power key is pressed is in a default level for a time length longer than a preset time length;
A power generation circuit, coupled to the processing circuit, for generating a working power and a standby power for the processing circuit according to a first enable signal 1 at a first level, and not generating the working power and the standby power according to a first enable signal 2 at a second level; and
A logic circuit coupled to the processing circuit and the power generation circuit for generating the first enable signal 1 at the first level in an operation mode of the computer device, detecting the abnormal signal, determining whether the time length of the pressing signal at the default level is greater than the preset time length, when the logic circuit detects the abnormal signal and the time length of the pressing signal at the default level is greater than the preset time length, the logic circuit generates the first enable signal 2 at the second level to control the power generation circuit to stop generating the operation power and the standby power, so as to turn off the processing circuit, and switch the computer device from the operation mode to a monitor mode,
The processing circuit comprises a central processing unit and a platform path controller, wherein the power generation circuit generates the standby power for the platform path controller to operate according to the first enabling signal 1 at the first level, so that the platform path controller generates a second enabling signal according to the standby power, and the power generation circuit generates the working power for the central processing unit and the platform path controller to operate in the working mode according to the second enabling signal, when the logic circuit generates the first enabling signal 2 at the second level, the power generation circuit stops generating the standby power, and the platform path controller is turned off to stop generating the second enabling signal to turn off the central processing unit, so that the computer device is switched to the monitoring mode.
2. The computer device of claim 1, wherein the logic circuit operates in the monitor mode according to a monitor power provided by a motherboard of the computer device, the logic circuit determining whether another pressing signal generated when the corresponding power key is pressed is at the default level in the monitor mode.
3. The computer device of claim 2, wherein when the pressing signal is at the default level, the logic circuit generates the first enable signal 1 at the first level to activate the platform path controller and the cpu to switch the computer device from the monitor mode to the operation mode.
4. The computer device of claim 3, wherein the logic circuit generates a reset signal to the cpu and the platform path controller after generating the first enable signal 1 at the first level, such that the cpu and the platform path controller perform a reset operation according to the reset signal, and the cpu and the platform path controller start to perform a power-on operation of the computer device after the reset operation is performed, and the computer device enters the operation mode.
5. A method for powering off and restarting a computer device, comprising:
A logic circuit generates a first enable signal 1 at a first level to a power generation circuit in an operation mode to generate a working power and a standby power for a processing circuit to operate;
the processing circuit generates an abnormal signal when an operation temperature is greater than a default temperature, or generates the abnormal signal when a pressing signal generated when a corresponding power key is pressed is in a default level for a period of time greater than a preset period of time;
the logic circuit judges whether the abnormal signal is received or not;
The logic circuit judges whether the time length of the pressing signal at the default level is longer than the preset time length;
when the logic circuit receives the abnormal signal and the time length of the pressing signal at the default level is greater than the preset time length, the logic circuit generates the first enabling signal 2 at a second level; and
The power generation circuit stops generating the working power and the standby power according to the first enabling signal 2 at the second level to turn off the processing circuit, so that the computer device is switched from the working mode to a monitoring mode,
Wherein the step of generating the working power and the standby power for the processing circuit comprises:
The power generation circuit generates the standby power for a platform path controller of the processing circuit to operate according to the first enable signal 1 at the first level;
The platform path controller generates a second enabling signal according to the standby power operation; and
The power supply generating circuit generates the working power supply according to the second enabling signal for the platform path controller and a central processing unit of the processing circuit to operate in the working mode;
in the step of stopping generating the working power and the standby power by the power generating circuit according to the first enable signal 2 at the second level, the power generating circuit stops generating the standby power to turn off the platform path controller according to the first enable signal 2 at the second level, so that the cpu does not receive the working power and turns off.
6. The method for shutting down and restarting a computer device of claim 5 further comprising:
The logic circuit is operated according to a monitoring power supply provided by a main board of the computer device in the monitoring mode to judge whether another pressing signal generated when the corresponding power key is pressed is at the default level.
7. The method for shutting down and restarting a computer device of claim 6 further comprising:
When the pressing signal is at the default level, the logic circuit generates the first enable signal 1 at the first level to activate the platform path controller and the CPU, so that the computer device is switched from the monitor mode to the working mode.
8. The method for shutting down and restarting a computer device of claim 7 further comprising: after the logic circuit generates the first enable signal 1 at the first level, the logic circuit generates a reset signal to the cpu and the platform path controller;
the CPU and the platform path controller execute a reset operation according to the reset signal; and
The CPU and the platform path controller execute a start-up operation of the computer device after executing the reset operation.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1717663A1 (en) * | 2005-04-25 | 2006-11-02 | Shuttle Inc. | Power-managing key apparatus and method for the same |
| JP2013250616A (en) * | 2012-05-30 | 2013-12-12 | Lenovo Singapore Pte Ltd | Method for stopping electric power for auxiliary storage device and computer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2006323605A (en) * | 2005-05-18 | 2006-11-30 | Shuttle Inc | Control unit and method of computer power supply management matching key |
| CN102749979A (en) * | 2011-04-20 | 2012-10-24 | 鸿富锦精密工业（深圳）有限公司 | Computer shutdown system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1717663A1 (en) * | 2005-04-25 | 2006-11-02 | Shuttle Inc. | Power-managing key apparatus and method for the same |
| JP2013250616A (en) * | 2012-05-30 | 2013-12-12 | Lenovo Singapore Pte Ltd | Method for stopping electric power for auxiliary storage device and computer |
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