CN113671360A - I2C interface device testing method and device and I2C interface device - Google Patents

I2C interface device testing method and device and I2C interface device Download PDF

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CN113671360A
CN113671360A CN202010401397.0A CN202010401397A CN113671360A CN 113671360 A CN113671360 A CN 113671360A CN 202010401397 A CN202010401397 A CN 202010401397A CN 113671360 A CN113671360 A CN 113671360A
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interface device
test
signal
multiplexer
functional module
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CN113671360B (en
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张波
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SG Micro Beijing Co Ltd
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SG Micro Beijing Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318314Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31722Addressing or selecting of test units, e.g. transmission protocols for selecting test units
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318371Methodologies therefor, e.g. algorithms, procedures

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  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The invention discloses a method and a device for testing an I2C interface device and an I2C interface device, wherein the method comprises the following steps: causing the I2C interface device to generate a test enable signal; shielding signals output by the I2C interface device to the at least one functional module based on the test enable signal; shielding a signal output to the I2C interface device by the at least one functional module based on the test enable signal, and enabling the I2C interface device to generate a test signal according to at least one preset bit test logic value; and testing the I2C interface device based on the test signal. According to the method, the device and the system, the test of the I2C interface device can be rapidly carried out without the action of other functional modules, and the test coverage rate is improved.

Description

I2C interface device testing method and device and I2C interface device
Technical Field
The invention relates to the technical field of testing, in particular to a method and a device for testing an I2C interface device and an I2C interface device.
Background
The I2C (Inter-Integrated Circuit) communication protocol has the advantages of supporting the expansion of a plurality of peripheral devices and short transmission distance with fewer interfaces, and is widely applied to various chip designs requiring communication. At present, the FT test (finished product test) of the I2C interface device of the I2C communication product mainly comprises two methods: one is to directly read the register through the I2C instruction after the I2C instruction is written into the register, so as to determine whether the register can be successfully accessed. The other method is realized by adopting a method of inserting a scan chain.
In the two schemes, the first scheme is that the I2C interface device is not subjected to any testability processing, and the register to be tested is directly accessed through an I2C instruction to judge whether the register can be normal or not, but the method is only suitable for a read-write register, cannot be used for a read-only register or a write-only register, and cannot ensure the test coverage. And for a special register with a requirement on data change time, the FT test time is greatly influenced by adopting the method. The second method is to add scan test logic to the I2C interface device through the existing tool to make the module have scan test function, but this method needs to add three additional pads of scan enable, scan data output and scan mode on the basis of the existing two I2C communication pads (test pads) of clock signal and data signal. And requires a test bench or interface that supports the SCAN function exclusively.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
Disclosure of Invention
In order to solve the technical problems, the invention provides a method and a device for testing an I2C interface device and an I2C interface device, which can quickly test the I2C interface device without the action of other functional modules, thereby improving the test coverage rate.
According to the invention, the I2C interface device testing method is provided, the I2C interface device is connected with at least one functional module to jointly complete a specific communication function, and the method comprises the following steps: causing the I2C interface device to generate a test enable signal; shielding signals output by the I2C interface device to the at least one functional module based on the test enable signal; shielding a signal output to the I2C interface device by the at least one functional module based on the test enable signal, and enabling the I2C interface device to generate a test signal according to at least one preset bit test logic value; and testing the I2C interface device based on the test signal.
Preferably, the shielding of the signal output by the I2C interface device to the at least one functional module based on the test enable signal comprises: providing at least one first multiplexer between said I2C interface device and said at least one functional module; and controlling the at least one first multiplexer to disconnect a signal transmission channel between the output end of the I2C interface device and the input end of the at least one functional module based on the test enabling signal.
Preferably, the shielding of the signal output by the at least one functional module to the I2C interface device based on the test enable signal comprises: providing at least one second multiplexer between said I2C interface device and said at least one functional module; and controlling the at least one second multiplexer to disconnect a signal transmission channel between the input end of the I2C interface device and the output end of the at least one functional module based on the test enabling signal.
Preferably, causing the I2C interface device to generate a test enable signal includes: writing first specific data to a first set of register addresses not used in said I2C interface device; and sequentially writing second specific data to a second group of unused register addresses in the I2C interface device, and controlling the I2C interface device to generate the test enable signal.
Preferably, writing first specific data to a first set of register addresses not used in the I2C interface device is continuous with writing second specific data to a second set of register addresses not used in the I2C interface device.
Preferably, the testing the I2C interface device based on the test signal includes: based on the test enable signal, controlling the at least one first multiplexer to provide a fixed signal to the at least one functional module and controlling the at least one second multiplexer to provide the test signal to the I2C interface device.
Preferably, the fixed signal is the same as a default value at the output of the I2C interface device.
Preferably, the causing the I2C interface device to generate the test signal according to the preset at least one bit test logic value includes: correspondingly writing the preset at least one-bit test logic value into at least one-bit test register in the I2C interface device by an I2C instruction under the condition that the I2C interface device is in a test mode, and generating the test signal comprising at least one-bit test logic signal, wherein the number of bits of the test logic value in the preset at least one-bit test logic value is the same as the number of the test registers in the at least one-bit test register in the I2C interface device and the number of the test logic signal in the at least one-bit test logic signal.
The invention provides an I2C interface device, which comprises: at least one first input terminal for receiving an input signal; at least one first output terminal for providing an output signal; a second output terminal for providing a test enable signal; at least one third output terminal for providing a test signal, said test signal comprising at least one bit of a test logic signal.
According to the invention, the I2C interface device testing device is provided, the I2C interface device is connected with at least one functional module to jointly complete a specific communication function, and the device comprises: an I2C interface device as described above, for performing testing based on the test enable signal and the test signal; at least one first multiplexer, a first input of each first multiplexer being connected to a first output of the I2C interface device, a second input of each first multiplexer receiving a fixed signal, an output of each first multiplexer being connected to an input of the at least one functional module, a select of each first multiplexer receiving the test enable signal, the at least one first multiplexer being configured to mask signals output by the I2C interface device to the at least one functional module when the test enable signal is asserted; at least one second multiplexer, a first input of each second multiplexer being connected to an output of the at least one functional module, a second input of each second multiplexer receiving a one-bit test logic signal of the test signal, an output of each second multiplexer being connected to a first input of the I2C interface device, a select of each second multiplexer receiving the test enable signal, the at least one second multiplexer being configured to mask signals output by the at least one functional module to the I2C interface device and provide the test signal to the I2C interface device when the test enable signal is asserted.
Preferably, the fixed signal is the same as a default value at the output of the I2C interface device.
The invention has the beneficial effects that: the invention discloses a method and a device for testing an I2C interface device and an I2C interface device.A test enabling signal is provided by the I2C interface device, the I2C interface device is in a test mode through the test enabling signal, a test signal can be generated according to a preset test logic value, and then the test of the I2C interface device is carried out according to the test signal; and the signals output to other functional modules by the I2C interface device are shielded during testing, the signals output to the I2C interface device by other functional modules are also shielded, the continuous and quick register read-write operation of the I2C interface device during testing is ensured not to influence other functional modules, the input signals of the I2C interface device, namely the test signals, can quickly traverse various combinations in the I2C interface device, other functional module actions are not needed in the whole testing process, the test of the I2C interface device can be quickly carried out, the test coverage rate is improved, the test time is shortened, and the test efficiency is improved. Meanwhile, the test pads required during testing are few, and the communication frequency of the I2C interface device is not limited by a special register.
The multiplexer is used for shielding signals output by the I2C interface device to other functional modules and signals output by other functional modules to the I2C interface device in a test mode, and the circuit is simple in structure and low in cost.
By adopting the multiplexer, the signals can be shielded, and other signals can be used for replacing the shielded signals to be provided to the I2C interface device or at least one functional module, so that the modules or devices can work normally while the test integrity is ensured.
The risk of entering test mode due to malfunction is reduced by enabling the test enable signal by sequentially writing specific data into the two sets of register addresses that are not used in the I2C interface module.
The risk of wrongly writing the test mode is further reduced by continuously finishing writing the specific data into the two groups of register addresses twice in sequence without inserting other operations in the middle.
The test register is used for controlling and generating the test signal, so that the influence of other functional modules on the test of the I2C interface device can be reduced, and the influence that too many signals need to be input and other functional modules cannot provide during the test is also reduced. And the test signal is only generated in response when the test enable signal is valid, thereby reducing unnecessary use of the register address in the normal mode and reducing useless loss.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
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The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
FIG. 1 is a flow chart illustrating a method for testing an I2C interface device according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for enabling a test enable signal according to an embodiment of the present invention;
fig. 3 shows a block diagram of an I2C interface device testing apparatus according to an embodiment of the present invention.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
On the premise of ensuring that the function of the I2C interface device is correct and not occupying extra pad, the invention provides a test method of the I2C interface device. The method is used for improving the test coverage rate, enabling the communication frequency of the I2C interface device not to be limited by a special register during testing, and influencing the finished product test time of the I2C interface device as little as possible.
Typically, the I2C interface device is connected to at least one other functional module to collectively perform a particular communication function. In addition to the signals connected to the pad and the power-on reset signal, the signals between the I2C interface device and the at least one other functional block are divided into two types, i.e., the output signal from the I2C interface device to the other functional block and the output signal from the other functional block to the I2C interface device. The method processes the two types of signals respectively. The present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1 shows a flowchart of a method for testing an I2C interface device according to an embodiment of the present invention, and fig. 2 shows a flowchart of a method for enabling a test enable signal according to an embodiment of the present invention.
In this embodiment, the I2C interface device is connected to at least one functional module to collectively perform a particular communication function. As shown in fig. 1, the I2C interface device testing method includes the following steps:
in step S1, the I2C interface device is caused to generate a test enable signal.
In this embodiment, the I2C interface device is provided with a test enable signal output port for providing a test enable signal.
It is understood that the test enable signal output by the I2C interface device is the mode selection signal of the I2C interface device, and when the test enable signal is inactive, the I2C interface device operates in the normal mode, and when the test enable signal is active, the I2C interface device operates in the test mode.
Herein, the test for the I2C interface device is mainly performed, and thus the test enable signal may be set to an active state by default.
Further, the method for enabling the I2C interface device to generate the test enable signal comprises the following steps: writing first specific data to a first set of register addresses that are not used in the I2C interface device; and sequentially writing second specific data to a second group of unused register addresses in the I2C interface device, and controlling the I2C interface device to generate a test enable signal (the generated enable signal is in an effective state). For example: if the register addresses 0x1e and 0x1f of an I2C interface device are not used, the specific DATA1 may be written into the register at the register address 0x1e, and then the specific DATA2 may be written into the register at the register address 0x1f, at this time, the test enable signal may be controlled to switch to the valid state. In this way, the risk of entering the test mode due to a malfunction is reduced.
Further, the writing of the first specific data to the first group of unused register addresses in the I2C interface device and the writing of the second specific data to the second group of unused register addresses in the I2C interface device are performed consecutively, and no other operation can be inserted therebetween, as shown in fig. 2, fig. 2 explains "consecutive performing" in this embodiment in the form of a judgment flowchart, and includes: judging whether to write first specific data to a first group of register addresses which are not used in the I2C interface device (step S41); it is determined whether second specific data is written to a second group of register addresses, which are not used in the I2C interface device, in order (step S42). Only when the two determination conditions are satisfied at the same time, the test enable signal is determined to be valid (step S43a), and the I2C interface device enters the test mode; otherwise, it is determined that the test enable signal is not asserted (step S43b), and the I2C interface device is in the normal mode. In this way the risk of erroneous writing of the test pattern is further reduced.
In step S2, a signal output to the at least one functional module by the I2C interface device is masked based on the test enable signal.
Further, in this embodiment, shielding the signal output by the I2C interface device to the at least one functional module based on the test enable signal further includes: at least one first multiplexer is arranged between the I2C interface device and at least one functional module; and controlling the at least one first multiplexer to disconnect a signal transmission channel between the output end of the I2C interface device and the input end of the at least one functional module based on the test enabling signal.
Referring to fig. 3 in particular, fig. 3 shows a block diagram of a device testing apparatus for an I2C interface according to an embodiment of the present invention. As shown in fig. 3, with an I2C interface device having one input (corresponding to a first input hereinafter) and one output (corresponding to a first output hereinafter), and only one functional module is connected to the I2C interface device as an example, the I2C interface device 1 receives an input signal provided by the functional module 2 through the first input terminal IN1_1, and the I2C interface device 1 provides an output signal to the functional module 2 through the first output terminal OUT1_2 (it is understood that the functional module providing the input signal to the I2C interface device 1 and the functional module receiving the output signal output by the I2C interface device 1 may be the same functional module or different functional modules, when the number of the input terminals and/or the output terminals of the I2C interface device is plural, the number of the functional modules connected thereto may be one or plural.
Further, a first multiplexer 4 is disposed between the first output terminal OUT1_2 of the I2C interface device 1 and the input terminal IN2_1 of the functional module 2, the first input terminal I2_0 of the first multiplexer 4 is connected to the first output terminal OUT1_2 of the I2C interface device 1, the second input terminal I2_1 of the first multiplexer 4 receives the fixed signal b0/b1, the output terminal Y2_1 of the first multiplexer 4 is connected to the input terminal IN2_1 of the functional module 2, and the selection terminal S2 of the first multiplexer 4 receives the TEST enable signal TEST _ EN.
Specifically, when the I2C interface device is tested, the I2C interface device generates the TEST enable signal TEST _ EN to be in an active state. Based on the TEST enable signal TEST _ EN IN an active state, the first multiplexer 4 disconnects the signal transmission path between the first output terminal OUT1_2 of the I2C interface device 1 and the input terminal IN2_1 of the functional module 2, and provides the fixed signal b0/b1 received at the second input terminal I2_1 thereof to the functional module 2.
Preferably, to ensure that the functional module 2 can still work normally in the test mode, the fixed signal b0/b1 received by the second input terminal I2_1 of the first multiplexer 4 depends on the default value of the first output terminal OUT1_2 of the I2C interface device 1, and when the default value of the first output terminal OUT1_2 of the I2C interface device 1 is 1 (high level), the fixed signal b0/b1 is 1 (high level); when the default value of the first output terminal OUT1_2 of the I2C interface device 1 is 0 (low level), the fixed signal b0/b1 is 0 (low level). That is, the fixed signal b0/b1 is the same as the default value of the first output terminal OUT1_2 of the I2C interface device 1. By the method, continuous and quick register read-write operation is guaranteed not to affect other functional modules when the I2C interface device is tested, and test feasibility is improved.
It will be appreciated that the I2C interface device may also have two or more first outputs, with a first multiplexer connected before each first output of the I2C interface device, to ensure that a fixed signal is provided to other functional modules in the test mode. And the fixed signal received by each first multiplexer should be the same as the default value received by the first multiplexer at the first output of the I2C interface device.
In step S3, the signal output by the at least one functional module to the I2C interface device is masked based on the test enable signal, and the I2C interface device generates the test signal according to the preset at least one bit test logic value.
Further, in this embodiment, shielding, based on the test enable signal, a signal output by the at least one functional module to the I2C interface device further includes: at least one second multiplexer is arranged between the I2C interface device and at least one functional module; and controlling at least one second multiplexer to disconnect the signal transmission channel between the input end of the I2C interface device and the output end of the at least one functional module based on the test enabling signal.
IN the present embodiment, referring to fig. 3, also taking as an example an I2C interface device having one input terminal (corresponding to a first input terminal hereinafter) and one output terminal (corresponding to a first output terminal hereinafter) and only one functional block connected to the I2C interface device, a second multiplexer 3 is provided between the first input terminal IN1_1 of the I2C interface device 1 and the output terminal OUT2_2 of the functional block 2, the first input terminal I1_0 of the second multiplexer 3 is connected to the output terminal OUT2_2 of the functional block 2, the second input terminal I1_1 of the second multiplexer 3 receives a TEST signal TESTO1, the output terminal Y1_1 of the second multiplexer 3 is connected to the first input terminal IN1_1 of the I2C interface device 1, and the select terminal S1 of the second multiplexer 3 receives a TEST enable signal TEST _ EN.
Specifically, when the I2C interface device is tested, the I2C interface device generates the TEST enable signal TEST _ EN to be in an active state. Based on the TEST enable signal TEST _ EN IN an active state, the second multiplexer 3 disconnects the signal transmission path between the first input terminal IN1_1 of the I2C interface device 1 and the output terminal OUT2_2 of the functional module 2, and supplies the TEST signal TESTO1 received at the second input terminal I1_1 thereof to the first input terminal IN1_1 of the I2C interface device 1. By the mode, the input signal, namely the test signal, of the I2C interface device can rapidly traverse various combinations in the I2C interface device, the scanning test time is shortened, and the test efficiency is improved.
It will be appreciated that the I2C interface device may also have two or more first inputs, with a second multiplexer connected before each first input of the I2C interface device, to ensure that the test signal TESTO1 is provided intact to the I2C interface device during the test mode.
In this embodiment, the I2C interface device may be controlled to generate the test signal TESTO1 by writing an I2C command into the test register. Specifically, the enabling the I2C interface device to generate the test signal according to the preset at least one bit test logic value includes: under the condition that the I2C interface device is in a test mode, at least one preset test logic value is correspondingly written into at least one test register in the I2C interface device through an I2C instruction, and then a test signal TESTO1 comprising at least one test logic signal bit is generated.
Preferably, in this embodiment, the number of bits of the preset at least one test logic value is the same as the number of test registers of the at least one test register in the I2C interface device, the number of test logic signals of the at least one test logic signal, the number of input signals of the I2C interface device, and the number of second multiplexers connected between the I2C interface device and the at least one functional module. And the bit number of the test logic value in the preset at least one test logic value is in one-to-one correspondence with any two of the number of the test registers of the at least one test register in the I2C interface device and the number of the test logic signals in the at least one test logic signal.
For example: an I2C interface device has 7 input signals and a normal functional register address includes segments 0x00-0x0f, then the I2C interface device requires 7-bit test registers (assuming that the 7-bit test registers can occupy 0x10 of the register address). In the I2C interface device TEST mode (i.e., the TEST enable signal TEST _ EN is asserted), the predetermined 7-bit TEST logic values are written into the 7-bit TEST registers at the register addresses 0x10 by the I2C command, so as to generate the TEST signal TESTO1 including the 7-bit TEST logic signals. Each bit of the test logic signal TESTO1 corresponds to a test register (usually, each 8-bit test register is a group corresponding to a group of register addresses not used in the I2C interface device, and less than 8 bits also correspond to a group of register addresses). In this way, unnecessary use of the register address in the normal mode can be reduced, and wasteful consumption can be reduced, by only responding to the write operation to the target register address when the TEST enable signal TEST _ EN is active.
In this embodiment, the test register is used to control the generation of the test signal, so that the influence of other functional modules on the test of the I2C interface device can be reduced, and the influence that too many signals need to be input during the test and other functional modules cannot provide signals can also be reduced.
In step S4, the I2C interface device is tested based on the test signal.
In this embodiment, referring to the above description, in the case where the signal output from the I2C interface device to the at least one functional module is shielded, and the signal output from the at least one functional module to the I2C interface device is shielded, the I2C interface device generates a test signal according to a preset at least one bit test logic value, and inputs the test signal to the input terminal of the I2C interface device, and the I2C interface device operates according to the test signal to perform a test. The whole test process can quickly test the I2C interface device without the action of other functional modules, thereby improving the test coverage rate, shortening the test time and improving the test efficiency. Meanwhile, the test pads required during testing are few, and the communication frequency of the I2C interface device is not limited by a special register.
Fig. 3 is a schematic structural diagram of an I2C interface device testing apparatus according to an embodiment of the present invention.
As shown in fig. 3, in this embodiment, the I2C interface device testing apparatus includes: I2C interface device 1 for scan testing based on TEST enable signal TEST _ EN and TEST signal TESTO 1. In which the I2C interface device 1 is connected to at least one other functional module 2 (only one functional module 2 is shown in fig. 3, but it will be understood that the same principle applies when there are a plurality of functional modules 2, and thus the functional modules in fig. 3 are broadly referred to herein as at least one of the same or different functional modules) to collectively perform a particular communication function.
Further, the I2C interface device 1 includes at least one first input terminal (e.g., IN1_1) for receiving an input signal; at least one first output terminal (e.g., OUT1_2) for providing an output signal; a second output terminal for providing a TEST enable signal TEST _ EN; at least one third output terminal for providing test signal TESTO 1. Therein, test signal TESTO1 includes at least one bit of a test logic signal.
At least one first multiplexer 4, the first input terminal I2_0 of each first multiplexer 4 being connected to a first output terminal of the I2C interface device OUT1_2, the second input terminal I2_1 of each first multiplexer 4 receiving the fixed signal b0/b1, the output terminal Y2_1 of each first multiplexer 4 being connected to an input terminal IN2_1 of the at least one functional module 2, the selection terminal S2 of each first multiplexer 4 receiving the TEST enable signal TEST _ EN, the at least one first multiplexer 4 being configured to mask the signal output by the I2C interface device 1 to the at least one functional module 2 when the TEST enable signal TEST _ EN is asserted. The fixed signal b0/b1 is the same as the default value of the first output terminal OUT1_2 of the I2C interface device 1.
At least one second multiplexer 3, a first input terminal I1_0 of each second multiplexer 3 being connected to an output terminal OUT2_2 of the at least one functional module 2, a second input terminal I1_1 of each second multiplexer 3 receiving a TEST logic signal of the TEST signal TESTO1, an output terminal Y1_1 of each second multiplexer 3 being connected to a first input terminal IN1_1 of the I2C interface device 1, a select terminal S1 of each second multiplexer 3 receiving a TEST enable signal TEST _ EN, the at least one second multiplexer 3 being configured to mask a signal output by the at least one functional module 2 to the I2C interface device 1 when the TEST enable signal TEST _ EN is asserted, and to provide a TEST signal TESTO1 to the at least one first input terminal of the I2C interface device 1.
In summary, the present invention discloses a method and an apparatus for testing an I2C interface device, and an I2C interface device, wherein the I2C interface device provides a test enable signal, and the test enable signal enables the I2C interface device to generate a test signal according to a preset test logic value in a test mode, so as to test the I2C interface device according to the test signal; and the signals output to other functional modules by the I2C interface device are shielded during testing, the signals output to the I2C interface device by other functional modules are also shielded, the continuous and quick register read-write operation of the I2C interface device during testing is ensured not to influence other functional modules, the input signals of the I2C interface device, namely the test signals, can quickly traverse various combinations in the I2C interface device, other functional module actions are not needed in the whole testing process, the test of the I2C interface device can be quickly carried out, the test coverage rate is improved, the test time is shortened, and the test efficiency is improved. Meanwhile, the test pads required during testing are few, and the communication frequency of the I2C interface device is not limited by a special register.
It should be noted that, in this document, the contained terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.

Claims (10)

1. A method for testing an I2C interface device, the I2C interface device being connected to at least one functional module to collectively perform a specific communication function, the method comprising:
causing the I2C interface device to generate a test enable signal;
shielding signals output by the I2C interface device to the at least one functional module based on the test enable signal;
shielding a signal output to the I2C interface device by the at least one functional module based on the test enable signal, and enabling the I2C interface device to generate a test signal according to at least one preset bit test logic value;
and testing the I2C interface device based on the test signal.
2. The I2C interface device testing method of claim 1, wherein masking signals output by the I2C interface device to the at least one functional module based on the test enable signal comprises:
providing at least one first multiplexer between said I2C interface device and said at least one functional module;
and controlling the at least one first multiplexer to disconnect a signal transmission channel between the output end of the I2C interface device and the input end of the at least one functional module based on the test enabling signal.
3. The I2C interface device testing method of any one of claims 1 and 2, wherein masking signals output by the at least one functional module to the I2C interface device based on the test enable signal comprises:
providing at least one second multiplexer between said I2C interface device and said at least one functional module;
and controlling the at least one second multiplexer to disconnect a signal transmission channel between the input end of the I2C interface device and the output end of the at least one functional module based on the test enabling signal.
4. The I2C interface device test method of claim 1, wherein causing the I2C interface device to generate a test enable signal comprises:
writing first specific data to a first set of register addresses not used in said I2C interface device; and
sequentially writing second specific data to a second group of register addresses unused in the I2C interface device, controlling the I2C interface device to generate the test enable signal.
5. The I2C interface device testing method of claim 4, wherein writing first specific data to a first set of unused register addresses in the I2C interface device and writing second specific data to a second set of unused register addresses in the I2C interface device are performed consecutively.
6. The I2C interface device testing method of claim 3, wherein testing the I2C interface device based on the test signal comprises:
controlling the at least one first multiplexer to provide a fixed signal to the at least one functional module based on the test enable signal, an
Controlling the at least one second multiplexer to provide the test signal to the I2C interface device.
7. The I2C interface device testing method of claim 6, wherein the fixed signal is the same as a default value at the output of the I2C interface device.
8. The method as claimed in claim 3, wherein enabling the I2C interface device to generate the test signal according to the at least one predetermined bit test logic value comprises:
correspondingly writing the preset at least one-bit test logic value into at least one-bit test register in the I2C interface device through an I2C instruction under the condition that the I2C interface device is in a test mode, controlling the I2C interface device to generate the test signal comprising at least one-bit test logic signal,
the number of bits of the test logic value in the preset at least one test logic value is the same as the number of test registers in the at least one test register in the I2C interface device and the number of test logic signals in the at least one test logic signal.
9. An I2C interface device, wherein the I2C interface device comprises:
at least one first input terminal for receiving an input signal;
at least one first output terminal for providing an output signal;
a second output terminal for providing a test enable signal;
at least one third output terminal for providing a test signal, said test signal comprising at least one bit of a test logic signal.
10. An I2C interface device testing apparatus, the I2C interface device being connected to at least one functional module to collectively perform a particular communication function, the apparatus comprising:
the I2C interface device of claim 9, to perform a test based on a test enable signal and a test signal;
at least one first multiplexer, a first input of each first multiplexer being connected to a first output of the I2C interface device, a second input of each first multiplexer receiving a fixed signal, an output of each first multiplexer being connected to an input of the at least one functional module, a select of each first multiplexer receiving the test enable signal, the at least one first multiplexer being configured to mask signals output by the I2C interface device to the at least one functional module when the test enable signal is asserted;
at least one second multiplexer, a first input of each second multiplexer being connected to an output of the at least one functional module, a second input of each second multiplexer receiving a one-bit test logic signal of the test signal, an output of each second multiplexer being connected to a first input of the I2C interface device, a select of each second multiplexer receiving the test enable signal, the at least one second multiplexer being configured to mask signals output by the at least one functional module to the I2C interface device and provide the test signal to the I2C interface device when the test enable signal is asserted.
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