CN113659880A - Dual-processor brushless direct current motor driving system and method for minimally invasive surgery - Google Patents
Dual-processor brushless direct current motor driving system and method for minimally invasive surgery Download PDFInfo
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- CN113659880A CN113659880A CN202110769793.3A CN202110769793A CN113659880A CN 113659880 A CN113659880 A CN 113659880A CN 202110769793 A CN202110769793 A CN 202110769793A CN 113659880 A CN113659880 A CN 113659880A
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- processor
- brushless
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- minimally invasive
- invasive surgery
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/08—Arrangements for controlling the speed or torque of a single motor
- H02P6/085—Arrangements for controlling the speed or torque of a single motor in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/14—Electronic commutators
Abstract
The present disclosure discloses a dual-processor brushless DC motor driving system and method for minimally invasive surgery, comprising a first processor, a second processor and a high-speed bus; the first processor configured to: collecting digital Hall signals fed back by a plurality of brushless direct current motors; the second processor configured to: outputting a PWM control signal to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and finishing the drive phase change and PWM control of the brushless direct current motor; the high-speed bus configured to: sending the Hall signal acquired by the first processor to the second processor; the two processors are respectively responsible for signal acquisition, signal processing and control, and the second processor outputs a PWM control signal, so that system resources are greatly expanded on the premise of ensuring the real-time control, and the flexibility and the expandability of the system are ensured.
Description
Technical Field
The disclosure belongs to the technical field of motor driving, and particularly relates to a dual-processor brushless direct current motor driving system and method for minimally invasive surgery.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
Current minimally invasive surgical control systems often involve multiple motor drives and signal acquisition tasks for various sensors; when only one processor is adopted to control a plurality of motors, the situation that the on-chip resources are limited and the requirements of a complex system cannot be met is often faced; in the prior art, there is also a scheme that two processors are used for controlling the driving of a plurality of motors, but the two processors are interactive and are used for acquiring the rotor position of the brushless direct current motor and respectively outputting digital PWM signals for controlling the rotation speed of the brushless direct current motor according to the detected rotor rotation position, so as to cooperatively detect the rotor position of the motor by using two methods, ensure that the phase change of the brushless motor is normal, improve the decision basis of the processors and the detection precision of the rotor position, and when any detection unit fails, the operation of the brushless motor is not interfered, which substantially belongs to the driving of a single-MCU brushless direct current motor, and still cannot meet the requirements of a complex system.
Disclosure of Invention
In order to solve the problems, the present disclosure provides a dual-processor brushless dc motor driving system and method for minimally invasive surgery, wherein two processors are respectively responsible for signal acquisition and signal processing and control, and the second processor outputs PWM control signals, so that on the premise of ensuring control real-time performance, system resources are greatly expanded, and flexibility and expandability of the system are ensured.
In order to achieve the above object, a first object of the present disclosure provides a dual-processor brushless dc motor driving system for minimally invasive surgery, which adopts the following technical solutions:
a dual-processor brushless DC motor driving system for minimally invasive surgery comprises a first processor, a second processor and a high-speed bus;
the first processor configured to: collecting digital Hall signals fed back by a plurality of brushless direct current motors;
the second processor configured to: outputting a PWM control signal to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and finishing the drive phase change and PWM control of the brushless direct current motor;
the high-speed bus configured to: and sending the Hall signal acquired by the first processor to the second processor.
Further, the first processor and the second processor are respectively one of an MCU, a DSP, an ARM or an FPGA.
Further, the first processor collects digital hall signals, analog hall signals fed back by the brushless direct current motor, photoelectric encoder signals or motor position signals transmitted through a specific protocol.
Further, the Hall signal acquired by the first processor is sent to the second processor by adopting the high-speed bus, the high-speed serial bus or the high-speed parallel bus.
Further, the second processor uses the high-speed bus to receive the interrupt mode to process the data sent by the first processor in real time.
In order to achieve the above object, a second object of the present disclosure provides a dual-processor brushless dc motor driving method for minimally invasive surgery, which adopts the following technical solutions:
a dual processor brushless DC motor driving method for minimally invasive surgery includes;
collecting digital Hall signals fed back by a plurality of brushless direct current motors by adopting a first processor;
sending the Hall signal acquired by the first processor to a second processor by adopting a high-speed bus;
and the second processor outputs PWM control signals to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and completes the drive phase change and PWM control of the brushless direct current motor.
Further, the first processor and the second processor are respectively one of an MCU, a DSP, an ARM or an FPGA.
Further, the first processor collects digital hall signals, analog hall signals fed back by the brushless direct current motor, photoelectric encoder signals or motor position signals transmitted through a specific protocol.
Further, the Hall signal acquired by the first processor is sent to the second processor by adopting the high-speed bus, the high-speed serial bus or the high-speed parallel bus.
Further, the second processor uses the high-speed bus to receive the interrupt mode to process the data sent by the first processor in real time.
Compared with the prior art, the beneficial effect of this disclosure is:
1. the method solves the problem that the traditional single processor controls the brushless direct current motor and often faces insufficient on-chip peripheral resources when multiple motors are controlled, and the PWM output and the capturing module of the processor often multiplex the same pin, so that the processor PWM peripheral resources can be occupied when the capturing module is applied to capture Hall signals of the brushless direct current motor.
2. The system can expand more processors through the high-speed bus, ensures the expansibility of the whole control system, and can cope with more complex system design.
Drawings
The accompanying drawings, which form a part hereof, are included to provide a further understanding of the present embodiments, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present embodiments and together with the description serve to explain the present embodiments without unduly limiting the present embodiments.
Fig. 1 is a control architecture diagram of embodiment 1 of the present disclosure.
The specific implementation mode is as follows:
the present disclosure is further described with reference to the following drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
Example 1:
as shown in fig. 1, the present disclosure provides a dual processor brushless dc motor drive system for minimally invasive surgery, comprising a first processor (MCU1), a second processor (MCU2), and a high speed bus;
the first processor configured to: collecting digital Hall signals fed back by a plurality of brushless direct current motors;
the second processor configured to: outputting a PWM control signal to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and finishing the drive phase change and PWM control of the brushless direct current motor;
the high-speed bus configured to: sending the Hall signal acquired by the first processor to the second processor; specifically, the first processor and the second processor are connected through a high-speed bus (SP I, CAN, HP, USART, and the like), and a CAN transceiver chip is arranged between the CANs, and preferably, the CAN transceiver chip adopts SN65HVD 233.
In this embodiment, the first processor is connected to a charged erasable programmable read only memory; the first processor and the second processor are respectively connected with a monitoring chip.
In this embodiment, the first processor and the second processor employ an MCU, and in other embodiments, the first processor and the second processor employ one of a DSP, an ARM, or an FPGA.
In this embodiment, the first processor may collect an analog hall signal, a photoelectric encoder signal, or a motor position signal transmitted through a specific protocol, which are fed back by the brushless dc motor; the first processor also collects mechanical rotation signals and handle control signals.
In the embodiment, a plurality of brushless direct current motor lithium batteries are connected with the boost charging management chip and the fuel gauge chip.
In this embodiment, the hall signal collected by the first processor is sent to the second processor by using the high-speed bus, the high-speed serial bus, or the parallel bus.
In this embodiment, the second processor uses the high-speed bus interrupt mode to perform real-time processing on the data sent by the first processor.
As shown in fig. 1, the MCU1 is responsible for collecting digital hall signals fed back by a plurality of motors, and then sending the collected hall signals to the MCU2 through a high-speed bus (SP I, CAN, HP I, USART, etc.), and the MCU2 outputs PWM control signals according to hall signal information transmitted from the MCU1 to perform on-off control of the three-phase full-bridge power MOSFET, thereby completing phase change and PWM speed control or torque control of the brushless dc motor; it should be noted that, to ensure real-time performance, the MCU2 uses the high-speed bus interrupt mode to process data sent by the MCU1 in real-time and ensure that the priority of the high-speed bus interrupt is higher.
Example 2:
the embodiment provides a dual-processor brushless direct current motor driving method for minimally invasive surgery, which comprises the following steps of;
collecting digital Hall signals fed back by a plurality of brushless direct current motors by adopting a first processor;
sending the Hall signal acquired by the first processor to a second processor by adopting a high-speed bus;
and the second processor outputs PWM control signals to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and completes the drive phase change and PWM control of the brushless direct current motor.
Specifically, the first processor and the second processor are respectively one of an MCU, a DSP, an ARM, or an FPGA. The first processor can also acquire analog Hall signals fed back by the brushless direct current motor, photoelectric encoder signals or motor position signals transmitted through a specific protocol. The Hall signal acquired by the first processor is sent to the second processor, and a high-speed serial or parallel bus can be adopted. And the second processor uses the high-speed bus to receive the interrupt mode and process the data sent by the first processor in real time.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and those skilled in the art can make various modifications and variations. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present embodiment should be included in the protection scope of the present embodiment.
Claims (10)
1. A dual-processor brushless DC motor driving system for minimally invasive surgery is characterized by comprising a first processor, a second processor and a high-speed bus;
the first processor configured to: collecting digital Hall signals fed back by a plurality of brushless direct current motors;
the second processor configured to: outputting a PWM control signal to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and finishing the drive phase change and PWM control of the brushless direct current motor;
the high-speed bus configured to: and sending the Hall signal acquired by the first processor to the second processor.
2. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the first processor and the second processor each employ one of a MCU, DSP, ARM, or FPGA.
3. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the first processor collects digital Hall signals, analog Hall signals fed back by the brushless DC motor, photoelectric encoder signals, or motor position signals transmitted via a specific protocol.
4. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the Hall signals collected by the first processor are sent to the second processor using the high speed bus, the high speed serial or parallel bus.
5. The dual-processor brushless DC motor driving system for minimally invasive surgery according to claim 1, wherein the second processor uses the high-speed bus receive interrupt mode to process the data sent from the first processor in real time.
6. A dual-processor brushless DC motor driving method for minimally invasive surgery is characterized by comprising the following steps of;
collecting digital Hall signals fed back by a plurality of brushless direct current motors by adopting a first processor;
sending the Hall signal acquired by the first processor to a second processor by adopting a high-speed bus;
and the second processor outputs PWM control signals to carry out on-off control on the three-phase full-bridge power MOSFET according to the Hall signal information acquired by the first processor, and completes the drive phase change and PWM control of the brushless direct current motor.
7. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the first processor and the second processor each employ one of a MCU, DSP, ARM, or FPGA.
8. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the first processor collects digital Hall signals, analog Hall signals fed back by the brushless DC motor, photoelectric encoder signals, or motor position signals transmitted via a specific protocol.
9. The dual-processor brushless DC motor drive system for minimally invasive surgery of claim 1, wherein the Hall signals collected by the first processor are sent to the second processor using the high speed bus, the high speed serial or parallel bus.
10. The dual-processor brushless DC motor driving system for minimally invasive surgery according to claim 1, wherein the second processor uses the high-speed bus receive interrupt mode to process the data sent from the first processor in real time.
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ES2958838A1 (en) * | 2022-07-19 | 2024-02-15 | Univ Leon | FLYBACK CONTROLLER AND BATTERY CHARGING SYSTEM |
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