CN1122234C - High-speed synchronous data acquiring and digital signal processing board - Google Patents
High-speed synchronous data acquiring and digital signal processing board Download PDFInfo
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- CN1122234C CN1122234C CN 00109126 CN00109126A CN1122234C CN 1122234 C CN1122234 C CN 1122234C CN 00109126 CN00109126 CN 00109126 CN 00109126 A CN00109126 A CN 00109126A CN 1122234 C CN1122234 C CN 1122234C
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Abstract
The present invention relates to a high-speed synchronous data acquiring and digital signal processing board which belongs to the technical field of the electric power system. The present invention is composed of an analog signal inputting and A/D converting module, a digital signal processing module and communication module, wherein the analog signal inputting and A/D converting module is arranged on a piece of circuit board and is in circuit connection; the analog signal inputting and A/D converting module comprises a prepositive low pass circuit, a prepositive band pass circuit, an A/D module and a hardware starting circuit; the digital signal processing module comprises a controlling and decoding circuit, a digital signal processor DSP module, a buffer, a memory double-port RAM, a memory FLASH of a program memory, a data memory RAM and a digital signal processing program. The present invention can synchronously acquire various voltage and current signals in high speed, and can do fast real-time processing on the signals.
Description
Technical field
The invention belongs to field of power, particularly electric system is carried out high speed, data in synchronization collection and quick real-time processing technique to the high frequency transient signal.
Background technology
Transmission line travelling wave protection with hypervelocity performance is an important topic of relay protection of power system research.Regrettably: still do not have perfect traveling-wave protection device up to now in the world and come out.Reason has two, one, lacks suitable mathematical analysis means analysis high frequency transient travelling wave signal; The 2nd, technical requirement too high (for example, sample frequency arrive 400KHZ or more than, very of short duration 1～2 millisecond of processing time).The problems referred to above are insurmountable with traditional technological means.
Summary of the invention
The objective of the invention is for overcoming the weak point of prior art, propose a kind of high-speed data acquisition and digital signal processing scheme, design high-speed data acquisition and digital signal processing hardware circuit board, for the signal collected wavelet transformation that carries out, thereby realize the high-speed synchronous collection and the fast processing of the capable ripple of high frequency transient; Make perfect performance the development of novel transmission line travelling wave protective device become possibility.
A kind of high-speed synchronous data acquiring and the digital signal panel that propose is characterized in that, are made up of the simulating signal input and A/D modular converter, digital signal processing module, communication module three parts that are integrated in a circuit connection on the circuit board; Wherein, said simulating signal input comprises with the A/D modular converter: the hardware-initiated circuit that receives the preposition low pass circuit of three road voltages and three road current analog signals, the preposition band-pass circuit that receives three road current analog signals, the A/D module that links to each other with this preposition low pass circuit and link to each other with this preposition band-pass circuit; Said digital signal processing module comprises: the control and the decoding scheme that link to each other with said A/D module, the digital signal processor DSP module that links to each other with said hardware-initiated circuit, impact damper that links to each other with this control and decoding scheme and storer dual port RAM, the program storage storer FLASH, the data-carrier store RAM that link to each other with this DSP module, and be stored among the FLASH and for the DSP program of DSP use, communication module links to each other with this DSP module, is used for gathering and result of calculation with other plate or background computer exchange; Sampled signal is deposited among the said double port memory RAM by one group of bus of said A/D modular converter, impact damper, double port memory, said control and decoding scheme control A/D conversion, data storage, fault data first address, when said hardware-initiated circuit sent trigger pip, said digital processing unit DSP carried out fault handling through another group bus transfer data of double port memory and to data.
The present invention can at a high speed, synchronously gather various voltage and current signals, and these signals are carried out handling in real time fast.Particularly can carry out high speed, data in synchronization collection and processing in real time fast to the high frequency transient signal.
The present invention can be used for the following field in the electric system:
1. the protective relaying device of electrical equipments such as ultra-high-tension power transmission line, generator, large-scale power transformer;
2. electric power system fault oscillograph;
3. electric power system fault logout instrument;
4. power system security aut.eq.;
Other need synchronously, high-speed data acquisition and the occasion handled in real time fast.
Main performance index of the present invention is as follows:
1, acquired signal scope
A) signal amplitude :-2.5V～+ 2.5V;
B) sample frequency: 0～400 KHz is optional.
2. synchronous acquisition way: 6 tunnel (three-phase voltage and three-phase currents).
3.A the D conversion accuracy: 12.
4. minimum instruction cycle: 60 nanoseconds.
5. but store data length (circulation) 64K word.
Description of drawings
The high-speed data acquisition of Fig. 1 present embodiment and digital signal panel hardware structure diagram and decoding scheme
The asynchronous communication means of Fig. 2 present embodiment
The three-phase fault current waveform figure of Fig. 3 present embodiment
The deposit data form of Fig. 4 present embodiment
The software of Fig. 5 present embodiment constitutes block diagram
Embodiment
A kind of high-speed data acquisition of the present invention's design combines each accompanying drawing with the embodiment of digital signal panel and is described in detail as follows:
Present embodiment is made up of simulating signal input and A/D modular converter I, digital signal processing module II, communication module III three parts, as shown in Figure 1.
The composition and the function declaration of each module are as follows:
1, simulating signal input and A/D modular converter comprise preposition low pass circuit, preposition band-pass circuit, A/D module, A/D control loop and hardware-initiated circuit, wherein:
(1) preposition low pass circuit
A/D partly sample three road voltages, three road electric currents, sampling rate is 400K (also can be made as 1 megahertz), in order to be complementary with preposition amplifier, PT, CT secondary side require maximum to be output as ± 2.5v.
The energy of considering the transient state travelling wave signal behind the electric power system fault mainly concentrates on below the 200 KHz frequencies, so be provided with the low-pass filter circuit of one 200 KHz for the simulated data input channel.
(2) preposition band-pass circuit
In order to improve the reliability of traveling-wave protection action, prevent that high frequency noise (being higher than 20 KHz) and power frequency component, harmonic component (being lower than 1 KHz) from causing error starting, hardware-initiated circuit to be provided with the band-pass circuit of one 3 KHz～10 KHz.
(3) hardware-initiated circuit
Hardware-initiated circuit is started respectively by three road electric currents, or door output, mainly as the criterion that starts fault processing module.In order to prevent the influence of hardware-initiated loop to A/D conversion loop, the magnitude of current in this loop will be drawn separately from another secondary tap of CT, and for this reason, the CT that exchanges in the plug-in unit will make two taps.
Hardware-initiated loop mainly obtains the signal of capable ripple 3～10 KHz, so need preposition bandpass filtering, via comparer output enabling signal, this signal mainly contains three kinds of purposes then:
(1) trigger control circuit, memory start address constantly;
(2) produce the DSP external interrupt, log-on data reads and exception handles;
(3) notify other circuit (perhaps circuit board) record to start constantly.
The core parts of hardware-initiated circuit are voltage comparator LM293, and the three-phase current starting element uses three comparers.
(4) digital to analog converter chip A/D
The A/D conversion chip is selected AD803: sampling rate 5M, and carry sampling and keep (S/H), internal reference voltage, low-power consumption, low noise, ternary output ,-2.5～2.5V mode is selected in input.
2, digital signal processing module comprises data exchange module and the DSP module and the correspondent peripheral circuit of control and decoding scheme, utilization dual port RAM, wherein:
(1) control and decoding scheme
This circuit is mainly used in control A/D conversion; Transformation result is sent into data buffer and dual port RAM; Form the pairing fault data first address of fault initiating.Control loop is driven by the crystal oscillator of the high stability of external 6.4 megahertzes, the AD that its 16 frequency division is produced 400 KHz triggers signal constantly, produce sequential circuit by four-ten six code translators simultaneously, keep the about 600ns in front as AD switching time, the about 300ns in back is as reading each road transformation result time, produce six the tunnel and read signal, produce the code translator address by the sixteen bit counter simultaneously, deposit and read the result, and produce correct read-write, if break down startup when reading, then memory starts first address constantly in addition.
(2) DSP and peripheral circuit
This module is the core of this circuit board, is mainly used in for the processing original sampling data, comprising: the processing of the software differentiation of fault initiating, wavelet analysis, part traveling-wave protection program.
DSP adopts the Starting mode of interrupt routine guiding, and the source code in the program storage FLASH is loaded among the quick RAM, behind the power-up initializing, execution is to the detection and the monitoring of periphery, distribute peripheral space, after the wait enabling signal is confirmed, carry out corresponding failure and handle.
The two timer pins of this module DSP are set to the I/O mouth, are used for the synchronous communication feedback signal with other plate.
Dual port RAM is configured to the circulation RAM of 64K, solved the contradiction of uninterrupted sampling and data read, dual port RAM is arranged to deposit the high capacity RAM of 5 fault datas (each 12K), mainly be for arranged to DSP the sufficient time in data read with when handling, only used the most basic function of dual port RAM here, i.e. two groups of same data spaces of the common control of bus.One group of bus interface A/D shift output bus, typing raw data incessantly, this group bus is by A/D conversion and control circuit controls; Another group bus interface DSP peripheral bus is controlled by DSP, is used for carving where necessary reading of data, does not produce conflict in order to make data, must guarantee that two groups of buses can not visit same address simultaneously, and this needs artificial control.
Digital signal processor module DSP is chosen as the TMS320C31 chip, is mainly used in data processing and analysis, speed fast (60ns execution time monocycle) is arranged, the characteristics of precision height (32).24 address wires, 32 data lines
3, communication module adopts the MC485 chip, is used for gathering and result of calculation with other plate or background computer exchange.
The DSP standard communication modes of TI company is the synchronous serial mode of six lines, and it is mainly used in our company corresponding product and communicates by letter.In order to communicate by letter with other plate or to communicate by letter with background computer, must the new interface mode of design.The present embodiment plate has adopted the one-way communication mode, as shown in Figure 2.Now communicating by letter with the MC68332 fender with this plate is example, and its communication implementation is described.
This mode is initiatively to send data to MC68332 by DSP; in order to guarantee reliability, can send continuously three times, after MC68332 receives three identical data; feed back a confirmation signal line, the shortcoming of this kind mode is that the traveling-wave protection module can not pass more information down to DSP.In order to guarantee the antijamming capability of connection, utilize 485 chips that level is transmitted on hardware and be converted to the difference transmission simultaneously, experiment proves that the antijamming capability of differential mode is higher than the level mode far away.
The high-speed digital-analog conversion of present embodiment with the function and the principle of work of digital signal panel is:
If this plate is applied to the digital travelling wave protection device.Its effect is to carry out failure data acquisition and digital signal processing.Its course of work can be described below: establish three-phase current waveform to be sampled as shown in Figure 3, among the figure, curve 1, curve 2, curve 3 are represented A, B, C three-phase current respectively.
1. three-phase voltage and three-phase current amount to six tunnel analog quantitys and need gather and record;
2. the three-phase voltage and the three-phase current that come from ultra-high-tension power transmission line are transformed into 100 volts voltage and 5 amperes electric current through the voltage and current mutual inductor respectively;
3. the electric current of 100 volts voltage and 5 amperes is transformed into positive and negative 2.5 the simulating signal of using for gathering through superpotential-voltage changer and electric current-voltage changer again;
4. these six positive and negative 2.5 simulating signal inserts the input end of high speed acquisition board;
5. under the commander of control and decoding scheme, finish the synchronized sampling and the timesharing analog to digital conversion (12 of conversion accuracies, be 416.67 microseconds the switching time on each road) of one time six tunnel simulating signal every 2.5 microseconds;
6. under the driving of control and decoding scheme, above-mentioned transformation result is pushed into impact damper in order, enters dual port RAM (data-carrier store) again;
7. in the input port of dual port RAM, data are recycled to be deposited, that is: from certain unit, store data continuously, institute have living space deposit full after, new data will cover legacy data.Deposit form as shown in Figure 4;
8. under the normal condition, data are stored continuously, but DSP will not do any processing to it;
9. after fault takes place, hardware-initiated circuit will be worked.At first, three-phase current warp or door output through the output of analog bandpass circuit enter hardware-initiated circuit, and voltage comparator output high level thinks that then fault takes place, and send trigger pip and file an application to DSP, DSP will note this constantly and correspondingly storage address;
10. after fault took place, DSP handled the read failure data.
If fault has taken place constantly at t, in Fig. 3:
1) t=10ms breaks down, and voltage and current will be undergone mutation
Count from this moment, DSP begins to read data the circulation dual port RAM from the another one mouth, reading of data is read till the 15ms, has read 5 milliseconds of data altogether, amounts to 12 K words (every road take 2 K words, 16) (having write down 5 milliseconds fault data window altogether);
11. carry out wavelet transformation or other digital signal processing for three-phase voltage after the above-mentioned fault and current data, ask for the fault signature value behind the wavelet transformation, calculate the direction (come from the faulty line direction and still come from faulty line direction behind) that fault distance, failure judgement take place;
12. result of calculation is delivered in the microprocessor 68332 and is gone through serial communication port, thereby finish the task of whole data collection and calculation of fault.
Present embodiment constitutes and basic functional principle according to above-mentioned hardware, has designed the software of this plate, is stored among the DSP, and this software constitutes block diagram as shown in Figure 5, is described as follows:
Dsp software is carried out three partial functions
1) fault initiating writes down (trigger constantly record) and sampled data reads constantly;
2) digital signal processing and partial function program (such as relay protection);
3) communication.
In addition, dsp software also need possess self check circulation, function such as automatically reset after crashing.
Wherein, digital signal processing is the core of this software.It comprises functional modules such as the selection mutually of software startup algorithm, fault, fault type recognition, phase-model transformation, fourier transform, wavelet transformation.The operand of above-mentioned algorithm is very big, be to guarantee the speed of signal Processing, just selects DSP and does not adopt common single-chip microcomputer.
In DSP program, wavelet transformation is simply described as follows:
Wavelet transformation is a kind of new mathematical method, and it is to represent signal to be analyzed by the flexible of function that is called as small echo with translation.It has time-the frequency localization performance, therefore be particularly suitable for having analysis and processing transient state character, the non-stationary variable signal.Wavelet transformation is defined as
W
sF (t)=f (t) * ψ
s(t) wherein, f (t)-signal (row ripple);
ψ
s(t)=and ψ (t/s)/s, be called small echo;
S-scale parameter or contraction-expansion factor;
ψ (t)-basic small echo.If the s value is 2
j(j ∈ Z), then small echo is called dyadic wavelet, and corresponding wavelet transformation is called dyadic wavelet transform.
Claims (1)
1, a kind of high-speed synchronous data acquiring and digital signal panel is characterized in that, are made up of the simulating signal input and A/D modular converter, digital signal processing module, communication module three parts that are integrated in a circuit connection on the circuit board; Wherein, said simulating signal input comprises with the A/D modular converter: the hardware-initiated circuit that receives the preposition low pass circuit of three road voltages and three road current analog signals, the preposition band-pass circuit that receives three road current analog signals, the A/D module that links to each other with this preposition low pass circuit and link to each other with this preposition band-pass circuit; Said digital signal processing module comprises: the control and the decoding scheme that link to each other with said A/D module, the digital signal processor DSP module that links to each other with said hardware-initiated circuit, impact damper that links to each other with this control and decoding scheme and storer dual port RAM, the program storage storer FLASH, the data-carrier store RAM that link to each other with this DSP module, and be stored among the FLASH and for the DSP program of DSP use, communication module links to each other with this DSP module, is used for gathering and result of calculation with other plate or background computer exchange; Sampled signal is deposited among the said double port memory RAM by one group of bus of said A/D modular converter, impact damper, double port memory, said control and decoding scheme control A/D conversion, data storage, fault data first address, when said hardware-initiated circuit sent trigger pip, said digital processing unit DSP carried out fault handling through another group bus transfer data of double port memory and to data.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100388285C (en) * | 2005-10-26 | 2008-05-14 | 东北大学 | PnP high speed multichannel intelligent comprehensive data acquiring system |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100416959C (en) * | 2004-10-18 | 2008-09-03 | 昆明理工大学 | Traveling wave protective data acquisition plan considering asynchronous switching of 3-phase breaker |
| CN100461570C (en) * | 2007-04-13 | 2009-02-11 | 清华大学 | Digital current synthesizer |
| CN102280866A (en) * | 2011-02-10 | 2011-12-14 | 清华大学 | Traveling wave data acquisition and processing device |
| CN102248254B (en) * | 2011-05-18 | 2014-08-20 | 湖南科天健光电技术有限公司 | Data processing system and method |
| CN105652110A (en) * | 2015-12-21 | 2016-06-08 | 中国西电电气股份有限公司 | Converter valve secondary control interface fault signal intelligent recording device |
| CN108761191B (en) * | 2018-08-27 | 2023-12-19 | 南京国电南自电网自动化有限公司 | Traveling wave protection acquisition circuit |
-
2000
- 2000-06-09 CN CN 00109126 patent/CN1122234C/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100388285C (en) * | 2005-10-26 | 2008-05-14 | 东北大学 | PnP high speed multichannel intelligent comprehensive data acquiring system |
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