CN113658891A - Wafer processing device - Google Patents
Wafer processing device Download PDFInfo
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- CN113658891A CN113658891A CN202110952494.3A CN202110952494A CN113658891A CN 113658891 A CN113658891 A CN 113658891A CN 202110952494 A CN202110952494 A CN 202110952494A CN 113658891 A CN113658891 A CN 113658891A
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- wafer
- gas
- processing apparatus
- chamber
- wafer processing
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- 238000012545 processing Methods 0.000 title claims abstract description 26
- 235000012431 wafers Nutrition 0.000 claims description 109
- 238000000034 method Methods 0.000 claims description 26
- 239000003990 capacitor Substances 0.000 claims description 8
- 238000004806 packaging method and process Methods 0.000 claims 2
- 239000007789 gas Substances 0.000 description 34
- 229920002120 photoresistant polymer Polymers 0.000 description 20
- 238000005530 etching Methods 0.000 description 15
- 239000012495 reaction gas Substances 0.000 description 6
- 238000009825 accumulation Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910003910 SiCl4 Inorganic materials 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention discloses a wafer processing device, comprising: the wafer-removing device comprises a cavity, wherein a carrying platform is arranged inside the cavity, a wafer is arranged on the carrying platform, a capacitance matcher is arranged outside the cavity, a gas baffle is fixedly connected inside the cavity, through holes are uniformly formed in the gas baffle, the top of the cavity is communicated with a gas inlet pipe, and preheated gas is added into the cavity through the gas inlet pipe.
Description
Technical Field
The invention relates to the technical field of semiconductor equipment, in particular to a wafer processing device.
Background
In a semiconductor process, wafers are usually sequentially placed in a wafer cassette having 12 slots or 25 slots (fig. one) in the order from bottom to top. After each wafer is processed, each wafer is taken out of the process chamber, and then the chamber waits for the next wafer to arrive. The chamber may not be operated, and may be subjected to a non-wafer plasma process, such as using a cleaning gas, such as oxygen, to remove polymer remaining in the chamber during the process; chamber deposition gases such as SiCl4 may also be used to protect the chamber; in any event, the objective is to have each wafer get nearly the same ambient environment in the chamber from the beginning to the end of the process, which is beneficial to process stability. The initial wafer speed is low, and as the amount of running increases, the speed is faster and faster, often referred to as the "first-order effect". This phenomenon is particularly evident for photoresist stripping processes below 120 degrees. For the oxygen-type plasma photoresist removing equipment, no matter how many wafers run, the cavity is in a clean state all the time, and special treatment among the wafers is not generally needed, so that after the previous wafer is taken out, the cavity waits for the next wafer to arrive, and no plasma treatment is carried out in the period.
Although the cavity is always in a clean state, heat accumulation caused by a continuous process is inevitable, large-scale mass production is not allowed to wait until the cavity is completely cooled and then a next process is carried out, the output is influenced, the temperature of the cavity is automatically controlled by water cooling in part of the cavities, so that the stability of the process temperature of each wafer is achieved, but the water cooling cannot be distributed in the whole cavity, so that the thermal instability and the accumulation effect of the cavity exist all the time.
Disclosure of Invention
The present invention is directed to a wafer processing apparatus to solve the above problems.
In order to achieve the purpose, the invention provides the following technical scheme: a wafer processing apparatus, comprising: the wafer-level vacuum pump comprises a cavity, wherein a carrying platform is arranged inside the cavity, a wafer is arranged on the carrying platform, and a capacitor matcher is arranged outside the cavity.
Through adopting above-mentioned technical scheme, preheat during gaseous entering cavity, add voltage ionization excitation gas through starting the capacitance matcher, produce electrified positive ion and active particle, electrified ion receives electric field effect bombardment wafer surface, and active particle carries out chemical reaction through diffusing to the wafer surface simultaneously, under dual-action, discharges the photoresist on wafer surface with volatile resultant.
Preferably, the inside fixedly connected with gas baffle of cavity, evenly seted up the through-hole on the gas baffle.
Through adopting above-mentioned technical scheme, when gaseous entering cavity, evenly break out through gas baffle for during gaseous even entering cavity, avoid gaseous gathering.
Preferably, the top of the chamber is communicated with an air inlet pipe, and the preheated air is added into the chamber through the air inlet pipe.
Through adopting above-mentioned technical scheme, through the setting of intake pipe, be convenient for add the cavity through the intake pipe with preheating gas.
Preferably, the bottom of the chamber is communicated with an exhaust pipe.
Through adopting above-mentioned technical scheme, through the setting of blast pipe, blast pipe and vacuum pump connection, the gas in the cavity is taken out through vacuum pump cooperation blast pipe.
Preferably, the wafer processing device further comprises a wafer box, and the wafer is arranged inside the wafer box.
Through adopting above-mentioned technical scheme, through the setting of wafer box, deposit the wafer.
Preferably, the number of the wafers is 25.
By adopting the technical scheme, the number of the wafers is 25, so that the wafers can be conveniently subjected to batch photoresist removal.
Preferably, the power of the capacitor matcher is 1500-3000W.
By adopting the technical scheme, the etching/photoresist removing rate of the initial wafer is improved by high power.
Preferably, the pressure of the gas fed into the gas feed pipe may be 2to 5 Torr.
By adopting the technical scheme, the etching/photoresist removing rate of the initial wafer is improved by the high pressure of the reaction gas, and a stable chip running process can be generated.
Preferably, the flow rate of the gas added into the gas inlet pipe can be 2000-3000 sccm.
By adopting the technical scheme, the etching/photoresist removing rate of the initial wafer is improved by the high flow of the reaction gas.
Preferably, the time of the preheating treatment is 3-5 times of the time of the subsequent single-chip running process.
By adopting the technical scheme, the photoresist removing efficiency of the wafer is improved.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, through preheating the cavity before the wafer running, the instability of etching/photoresist removing rate caused by traditional heat accumulation is solved, the wafer running process can be stabilized, the yield is improved, the defects in the research and development or mass production process are reduced, and a large amount of manpower and material resources are saved.
Drawings
FIG. 1 is a schematic structural diagram of a wafer processing apparatus according to the present invention;
FIG. 2 is a schematic diagram illustrating a structure of a wafer in a wafer cassette of the wafer processing apparatus according to the present invention;
FIG. 3 is a schematic diagram of the Run number of wafers and the rate of increase in the wafer processing apparatus of the present invention;
FIG. 4 is a schematic diagram illustrating the variation of CD in the wafer processing apparatus according to the present invention;
FIG. 5 is a schematic diagram illustrating the first effect of the wafer processing apparatus according to the present invention by pre-treating the chamber;
FIG. 6 is a flow chart of a process run with pre-treatment in a wafer processing apparatus of the present invention;
fig. 7 is a flow chart of a preprocessing of cyclecode in the wafer processing apparatus of the present invention.
In the figure: 1. a chamber; 2. a stage; 3. a wafer; 4. a capacitance matcher; 5. an air inlet pipe; 6. a wafer cassette; 7. a gas baffle; 8. and (4) exhausting the gas.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown in fig. 1 to 7, a wafer processing apparatus includes: the wafer processing device comprises a chamber 1, wherein a carrying platform 2 is arranged inside the chamber 1, a wafer 3 is arranged on the carrying platform 2, and a capacitance matcher 4 is arranged outside the chamber 1.
As shown in fig. 1, the gas baffle 7 is fixedly connected inside the chamber 1, through holes are uniformly formed in the gas baffle 7, and when gas enters the chamber 1, the gas baffle 7 uniformly blows out, so that the gas uniformly enters the chamber 1, and the gas accumulation is avoided.
As figure 1, the top intercommunication of chamber 1 has intake pipe 5, and the gas of preheating is through intake pipe 5 add in chamber 1, through the setting of intake pipe 5, is convenient for will add preheating gas in chamber 1 through intake pipe 5 in advance.
As shown in fig. 1, an exhaust pipe 8 is communicated with the bottom of the chamber 1, the exhaust pipe 8 is connected to a vacuum pump by the arrangement of the exhaust pipe 8, and the gas in the chamber 1 is pumped out by the vacuum pump in cooperation with the exhaust pipe 8.
As shown in fig. 1-2, the wafer cassette 6 is further included, the wafer 3 is disposed inside the wafer cassette 6, and the wafer 3 is stored by the wafer cassette 6.
As shown in fig. 1-2, the number of the wafers 3 is 25, and the number of the wafers 3 is 25, which facilitates batch photoresist stripping of the wafers 3.
As shown in fig. 5, the power of the capacitor matching unit 4 is 3000W, and the high power increases the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the gas may be fed into the inlet 5 at a pressure of 5Torr, and the high pressure of the reactive gas increases the etching/stripping rate of the initial wafer 3, resulting in a stable running process.
As shown in fig. 3-4, the flow rate of the gas added to the inlet pipe 5 may be 3000sccm, and the high flow rate of the reaction gas increases the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the time of the pre-heating process is 5 times of the time of the subsequent single wafer running process, which improves the photoresist removing efficiency of the wafer 3.
Example 2
As shown in fig. 1-2, the number of the wafers 3 is 25, and the number of the wafers 3 is 25, which facilitates batch photoresist stripping of the wafers 3.
As shown in fig. 5, the capacitor matching unit 4 has a power of 2200W, and the high power increases the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the gas may be fed into the inlet 5 at a pressure of 3.5Torr, and the high pressure of the reactant gas increases the etching/stripping rate of the initial wafer 3, resulting in a stable running process.
As shown in fig. 3-4, the flow rate of the gas added to the inlet pipe 5 may be 2500sccm, and the high flow rate of the reaction gas improves the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the time of the pre-heating process is 4 times of the time of the subsequent single wafer running process, so that the photoresist removing efficiency of the wafer 3 is improved.
Example 3
As shown in fig. 1-2, the number of the wafers 3 is 25, and the number of the wafers 3 is 25, which facilitates batch photoresist stripping of the wafers 3.
Referring to fig. 5, the capacitor matching unit 4 has a power of 1500W, and the high power increases the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the pressure of the gas fed into the gas inlet 5 may be 2Torr, and the high pressure of the reaction gas increases the etching/stripping rate of the initial wafer 3, resulting in a stable running process.
As shown in fig. 3-4, the flow rate of the gas added to the inlet pipe 5 can be 2000sccm, and the high flow rate of the reaction gas improves the etching/stripping rate of the initial wafer 3.
As shown in fig. 3-4, the time of the pre-heating process is 3 times of the time of the subsequent single wafer running process, which improves the photoresist removing efficiency of the wafer 3.
With reference to the attached figures 1-7, the working steps of the scheme are summarized and carded according to the technical scheme:
before the photoresist removing process starts to run, preheating gas enters a cavity 1, a capacitor matcher 4 is started to apply voltage to ionize and excite gas to generate charged positive ions and active particles, the charged ions bombard the surface of a wafer 3 under the action of an electric field, meanwhile, the active particles are diffused to the surface of the wafer 3 to carry out chemical reaction, photoresist on the surface of the wafer 3 is extracted by a volatile product through a vacuum pump matched with an exhaust pipe 8 under the double action, the cavity is subjected to non-wafer 3 plasma preheating treatment, the etching/photoresist removing rate of the initial wafer 3 is improved by using the process conditions of high power, high pressure and high flow, the influence of preheating treatment with different power and time on the rate is shown by referring to a graph 3, the pretreatment of the invention improves the rate of initial wafers, solves the 'first wafer effect', and pulls the initial wafers to a high state by referring to graphs 5 and 2000W pretreatment, by reducing the power to 1500W, a stable track process is achieved, referring to fig. 6, a track flow is shown, generally, a wafer-free 3 pretreatment is performed On the chamber once before a photoresist stripping process is performed On 25 wafers per batch, referring to fig. 7, the pretreatment of the invention can adopt a continuous plasma striking mode, and also can adopt an On-Off-On-Off mode, and the plasma switch cycle mode can better preheat the chamber 1, thereby improving the stability of the preheating process.
To sum up: according to the invention, through preheating the chamber 1 before wafer running, the instability of etching/photoresist removing rate caused by traditional heat accumulation is solved, the wafer running process can be stabilized, the yield is improved, the defects in the research and development or mass production process are reduced, and a large amount of manpower and material resources are saved.
The parts not involved in the present invention are the same as or can be implemented by the prior art. Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
1. A wafer processing apparatus, comprising: the wafer-level packaging device comprises a chamber (1), wherein a carrying platform (2) is arranged inside the chamber (1), a wafer (3) is arranged on the carrying platform (2), and a capacitor matcher (4) is arranged outside the chamber (1).
2. The wafer processing apparatus as claimed in claim 1, wherein: the gas baffle (7) is fixedly connected to the inner part of the cavity (1), and through holes are uniformly formed in the gas baffle (7).
3. The wafer processing apparatus as claimed in claim 1, wherein: the top of chamber (1) intercommunication has intake pipe (5), and the gas that preheats passes through intake pipe (5) and adds in chamber (1).
4. The wafer processing apparatus as claimed in claim 1, wherein: the bottom of the chamber (1) is communicated with an exhaust pipe (8).
5. The wafer processing apparatus as claimed in claim 1, wherein: the wafer packaging machine is characterized by further comprising a wafer box (6), wherein the wafer (3) is arranged inside the wafer box (6).
6. The wafer processing apparatus as claimed in claim 1, wherein: the number of the wafers (3) is 25.
7. The wafer processing apparatus as claimed in claim 1, wherein: the using power of the capacitor matcher (4) is 1500-3000W.
8. A wafer processing apparatus as claimed in claim 3, wherein: the pressure of the gas added into the gas inlet pipe (5) is 2-5 Torr.
9. A wafer processing apparatus as claimed in claim 3, wherein: the flow rate of the gas added into the gas inlet pipe (5) is 2000-3000 sccm.
10. A wafer processing apparatus as claimed in claim 3, wherein: the time of the preheating treatment is 3-5 times of the time of the subsequent single-chip running process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110952494.3A CN113658891A (en) | 2021-08-19 | 2021-08-19 | Wafer processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110952494.3A CN113658891A (en) | 2021-08-19 | 2021-08-19 | Wafer processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113658891A true CN113658891A (en) | 2021-11-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110952494.3A Pending CN113658891A (en) | 2021-08-19 | 2021-08-19 | Wafer processing device |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6030901A (en) * | 1999-06-24 | 2000-02-29 | Advanced Micro Devices, Inc. | Photoresist stripping without degrading low dielectric constant materials |
| KR20010095228A (en) * | 2000-04-02 | 2001-11-03 | 브라이언 알. 바흐맨 | Post etch photoresist and residue removal process |
| US20030029833A1 (en) * | 2000-03-20 | 2003-02-13 | Johnson Wayne L | High speed photoresist stripping chamber |
| TW200601451A (en) * | 2004-06-23 | 2006-01-01 | Hitachi High Tech Corp | Dry-etching method and apparatus |
| CN1910308A (en) * | 2004-01-06 | 2007-02-07 | 马特森技术公司 | Advanced multi-pressure workpiece processing |
| JP2008199010A (en) * | 2007-01-30 | 2008-08-28 | Applied Materials Inc | Process for wafer backside polymer removal with wafer front side gas purge |
| CN104157566A (en) * | 2014-08-20 | 2014-11-19 | 上海华力微电子有限公司 | Gradient type dry photoresist removing method |
| CN111755353A (en) * | 2019-03-26 | 2020-10-09 | 北京北方华创微电子装备有限公司 | Warming-up method and etching method |
-
2021
- 2021-08-19 CN CN202110952494.3A patent/CN113658891A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6030901A (en) * | 1999-06-24 | 2000-02-29 | Advanced Micro Devices, Inc. | Photoresist stripping without degrading low dielectric constant materials |
| US20030029833A1 (en) * | 2000-03-20 | 2003-02-13 | Johnson Wayne L | High speed photoresist stripping chamber |
| TW567737B (en) * | 2000-03-20 | 2003-12-21 | Tokyo Electron Ltd | High speed photoresist stripping chamber |
| KR20010095228A (en) * | 2000-04-02 | 2001-11-03 | 브라이언 알. 바흐맨 | Post etch photoresist and residue removal process |
| CN1910308A (en) * | 2004-01-06 | 2007-02-07 | 马特森技术公司 | Advanced multi-pressure workpiece processing |
| TW200601451A (en) * | 2004-06-23 | 2006-01-01 | Hitachi High Tech Corp | Dry-etching method and apparatus |
| JP2008199010A (en) * | 2007-01-30 | 2008-08-28 | Applied Materials Inc | Process for wafer backside polymer removal with wafer front side gas purge |
| CN104157566A (en) * | 2014-08-20 | 2014-11-19 | 上海华力微电子有限公司 | Gradient type dry photoresist removing method |
| CN111755353A (en) * | 2019-03-26 | 2020-10-09 | 北京北方华创微电子装备有限公司 | Warming-up method and etching method |
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Application publication date: 20211116 |