CN113645497A - Self-adaptive adjustment method and system for output timing of image size conversion module - Google Patents

Self-adaptive adjustment method and system for output timing of image size conversion module Download PDF

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CN113645497A
CN113645497A CN202111200767.5A CN202111200767A CN113645497A CN 113645497 A CN113645497 A CN 113645497A CN 202111200767 A CN202111200767 A CN 202111200767A CN 113645497 A CN113645497 A CN 113645497A
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output
value
image data
time sequence
size conversion
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CN113645497B (en
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蔡剑
叶选新
李堃
蔡杰羽
石炳磊
白海楠
朱诗文
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Weichuang Microelectronics Shanghai Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/433Content storage operation, e.g. storage operation in response to a pause request, caching operations
    • H04N21/4331Caching operations, e.g. of an advertisement for later insertion during playback
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
    • H04N21/4402Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H04N21/440263Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display by altering the spatial resolution, e.g. for displaying on a connected PDA

Abstract

The invention discloses an output timing sequence self-adaptive adjusting method and system of an image size conversion module, which comprises the following steps: a PID controller is arranged in the image size conversion module, and the control law of the PID controller is as follows:
Figure 100004_DEST_PATH_IMAGE001
(ii) a And the image size conversion module is internally provided with an output time sequence controller, and the output time sequence controller receives the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence adjusted by the PID controller and controls the output time sequence of the image data in the output buffer area. The invention can support DDIC application scene of video mode only by the line buffer area capable of buffering 5-6 lines of image data without setting extra frame buffer area.

Description

Self-adaptive adjustment method and system for output timing of image size conversion module
Technical Field
The invention relates to the technical field of display driving, in particular to an output timing sequence self-adaptive adjusting method and system of an image size conversion module.
Background
In the conventional OLED display panel driving (hereinafter referred to as DDIC) technology, when the resolution of an input video is not consistent with that of an output video, an image size conversion module is required to complete the conversion between the input and output resolutions. When the input video is in a vertical synchronous signal/horizontal synchronous signal/effective display data strobe signal (VS/HS/DE) timing mode and the output is also in the VS/HS/DE timing mode, the video stream scaled by the image size conversion module needs to recreate the VS/HS/DE timing.
In the prior art, there are two methods for performing image size conversion processing of video images:
1. and adding a frame buffer area, and using the frame buffer area to buffer the problem of the deviation of the output time sequence and the input time sequence in the image size conversion module.
2. The magnification of image size conversion and the use scene are limited, and the problem of time sequence offset is avoided.
In the first method, a frame buffer is required and is not necessary in the application scenario of the DDIC, so that the increase of the frame buffer inevitably increases the manufacturing cost and power consumption of the chip. In the second method, limiting the magnification of image size conversion refers to: when the image size conversion operation of the video image is carried out, the transverse multiplying power is required to be consistent with the longitudinal multiplying power; the restricted use scenario refers to: it must be used only in command mode (common mode) and cannot support video mode, so this method limits the application scenarios of the chip and does not apply to video mode.
From the results of the above two methods, if no extra frame buffer is set for buffering in image size conversion, synchronous control of input and output video streams needs to be completed on the basis of the image size conversion function, and a block diagram of the image size conversion module in the prior art is shown in fig. 1.
In order to achieve bandwidth equalization of input and output and stabilization of timing, it is necessary that the input timing and the output timing of image size conversion satisfy the following two conditions:
1. the input Active time is equal to the output Active time (Active time is the time occupied by the Active row), and the following formula needs to be satisfied:
Figure DEST_PATH_IMAGE001
(1);
2. the input frame time is equal to the output frame time, and the following formula needs to be satisfied:
Figure DEST_PATH_IMAGE002
(2)。
wherein the content of the first and second substances,
Figure DEST_PATH_IMAGE003
the unit is the time of inputting one row of the time sequence and is mus;
Figure DEST_PATH_IMAGE004
the effective row number of the input time sequence;
Figure 774974DEST_PATH_IMAGE005
the total row number of the input time sequence;
Figure 597437DEST_PATH_IMAGE006
is the number of valid columns of the output timing sequence;
Figure 208678DEST_PATH_IMAGE007
a Back Porch (Back Porch) indicating output timing;
Figure 876420DEST_PATH_IMAGE008
a horizontal Front shoulder value (Front Port) indicating an output timing;
Figure 76457DEST_PATH_IMAGE009
the unit MHz is the input clock frequency of the image size conversion module;
Figure 688397DEST_PATH_IMAGE010
a valid line number indicating an output timing;
Figure 911568DEST_PATH_IMAGE011
a vertical back shoulder value representing an output timing;
Figure 507634DEST_PATH_IMAGE012
a vertical front shoulder value representing the output timing.
On one hand, Hbp, Hfp, Vbp, Vfp calculated by the above formula may not be integers, and at this time, the output buffer may be empty or full when the image size conversion module operates, and at this time, the threshold for operating the output buffer needs to be adjusted to ensure that the output buffer is not empty or full within one frame. If the output buffer is full, the threshold needs to be adjusted down, and if the output buffer is empty, the threshold needs to be adjusted up.
On the other hand, in practical applications, if the DDIC is operating in video mode, the input timing is controlled entirely by the host microprocessor, while the output timing is controlled by the DDIC, both being independent systems, their clocks cannot be fully adapted to the above two equations.
Therefore, for the application of image size conversion in DDIC, it is mainly necessary to solve the problem of the offset of the input timing and the output timing, and the offset of the timing is caused by two reasons:
1. hbp, Hfp, Vbp, Vfp calculated by the horizontal scaling factor and the vertical scaling factor of the image size conversion block are not integers, but can be rounded only in actual chip application, which results in a shift in input timing and output timing.
2. If the DDIC operates in the video mode, even if the calculated Hbp, Hfp, Vbp, Vfp are integers, the input timing and the output timing are eventually shifted due to frequency shifts of the clock of the upper microprocessor and the clock of the DDIC.
In summary, the image size conversion of DDIC needs a method for adaptively adjusting the input timing of image size conversion to satisfy the functions of bandwidth equalization and output timing stabilization.
Disclosure of Invention
In order to solve the technical problem in the prior art, the invention provides a method and a system for adaptively adjusting the output time sequence of an image size conversion module based on a PID controller, which meet the functions of bandwidth balance and stable output time sequence and complete the synchronous control of input and output video streams.
The invention provides an output timing sequence self-adaptive adjusting method of an image size conversion module, which comprises the following steps:
s1: a PID controller is arranged in the image size conversion module, and the control law of the PID controller is as follows:
Figure 499861DEST_PATH_IMAGE013
wherein the content of the first and second substances,
e (t) is an error function, e (t) represents the offset of the output time sequence relative to the input time sequence at the time t;
u (t) is a change value of a front shoulder value and/or a rear shoulder value of an image data output time sequence at the time t;
Kpbeing a dimensionless scale parameter, Ti、TdThe integral control rate parameter and the derivative control rate parameter, respectively, of the time dimension, the specific values of which can be set as desired by those skilled in the art.
As can be seen from the above equation, the output u (t) of the PID controller is determined by the error e (t) at the current time, the accumulation of the error e (t), and the rate of change of the error e (t).
The PID controller is applied to the control of the output timing of the image scale conversion module, and in order to ensure that the bandwidth is constant, the output timing of the image scale conversion module needs to follow the input timing.
According to the PID controller principle, we first need to define an error e (t), and further, the e (t) satisfies the following formula:
Figure 477175DEST_PATH_IMAGE014
l (t) is the data quantity value of an output buffer area in the image size conversion module at the time t;
L0the data amount is a preset target value of the data amount of the output buffer.
In the image scale conversion application, because there is no extra frame buffer, and only a line buffer (line buffer), the line buffer can only store 5-6 lines of data, what we need to do is to ensure that the line buffer will not be empty or full during the image scale conversion work. Therefore, the current data quantity value L (t) of the output buffer is introduced as the control target of the PID controller, and the corresponding e (t) is the preset data quantity target value L of the output buffer0Minus L (t).
Secondly, we also need to determine the control amount u (t) of the PID controller, in order to keep the data amount value L (t) of the output buffer at the target value L of the data amount0Nearby, the output timing of the image scale conversion module needs to be controlled, but in order to ensure the stability of the output timing, we only want to see the Hbp and/or Hfp change, and Vfp and Vbp are always constant. Then the controlled variable of the PID controller is Hbp and/or Hfp, and u (t) corresponds to the variation value of Hbp and/or Hfp in the output timing of the image scaling module.
Further, in step S1, the data amount target value L0Is half of the maximum data size of the output buffer.
S2: and the image size conversion module is internally provided with an output time sequence controller, and the output time sequence controller receives the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence adjusted by the PID controller and controls the output time sequence of the image data in the output buffer area.
Further, in step S2, the controlling the output timing of the image data in the output buffer specifically includes: keeping the longitudinal front shoulder value and the longitudinal back shoulder value of the image data output time sequence unchanged, and integrating and then superposing the front shoulder value and/or the back shoulder value change value to the original value of the transverse front shoulder value and/or the transverse back shoulder value.
Another aspect of the present invention provides an output timing adaptive adjustment system for an image size conversion module, including:
an input buffer for buffering input image data;
the transverse image size conversion module is used for receiving the image data output by the input buffer area and carrying out transverse size conversion filtering processing on the image data;
the longitudinal image size conversion module is used for receiving the image data processed by the transverse image size conversion module and performing longitudinal size conversion filtering processing on the image data;
the output buffer area is used for receiving and buffering the image data processed by the longitudinal image size conversion module and outputting the image data according to an output time sequence;
the PID controller is used for calculating the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence according to the data amount in the output buffer area; and
and the output time sequence controller is used for receiving the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence calculated by the PID controller, adjusting the front shoulder value and/or the back shoulder value of the image data output time sequence and controlling the output time sequence of the image data in the output buffer area.
Further, the adjusting of the front shoulder value and/or the back shoulder value of the image data output timing sequence specifically includes: and keeping the longitudinal front shoulder value and the longitudinal back shoulder value of the image data output time sequence unchanged, and adjusting the transverse front shoulder value and/or the transverse back shoulder value of the image data output time sequence.
The invention has the following beneficial effects:
(1) the invention can support DDIC application scene of video mode only by line buffer area (input buffer area and output buffer area) capable of buffering 5-6 lines of image data without setting extra frame buffer area.
(2) The prior method can only support fixed resolution ratio adjustment, and must ensure that the calculated Hbp, Hfp, Vbp and Vfp are integers, but the invention can realize resolution adjustment with any aspect ratio without being limited by the limitation after adding a PID controller.
(3) After the PID controller is added, the clock skew of a certain degree can be adapted, and the normal work of the chip under different working environments and working temperatures can be ensured.
Drawings
FIG. 1 is a block diagram of an image size conversion module in the prior art;
FIG. 2 is a flow chart of an adaptive output timing adjustment method according to the present invention;
FIG. 3 is a block diagram of a PID controller of the invention;
fig. 4 is a block diagram of an image size conversion module of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application are clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In one aspect, this embodiment provides an adaptive output timing adjustment method for an image size conversion module, as shown in fig. 2, including the following steps:
step S1: a PID controller is disposed in the image size conversion module, a block diagram of the PID controller is shown in fig. 3, and the control law of the PID controller is as follows:
Figure 46697DEST_PATH_IMAGE015
wherein the content of the first and second substances,
e (t) is an error function, e (t) represents the offset of the output time sequence relative to the input time sequence at the time t;
u (t) is a change value of a front shoulder value and/or a rear shoulder value of an image data output time sequence at the time t;
Kp、Ti、Tdto control the law parameters, one skilled in the art can set their specific values as desired.
As can be seen from the above equation, the output u (t) of the PID controller is determined by the error e (t) at the current time, the accumulation of the error e (t), and the rate of change of the error e (t).
The PID controller is applied to the control of the output timing of the image scale conversion module, and in order to ensure that the bandwidth is constant, the output timing of the image scale conversion module needs to follow the input timing.
According to the PID controller principle, we first need to define an error e (t), and further, the e (t) satisfies the following formula:
Figure 56241DEST_PATH_IMAGE016
l (t) is the data quantity value of an output buffer area in the image size conversion module at the time t;
L0the data amount is a preset target value of the data amount of the output buffer.
In the image scale conversion application, because there is no extra frame buffer, and only a line buffer (line buffer), the line buffer can only store 5-6 lines of data, what we need to do is to ensure that the line buffer will not be empty or full during the image scale conversion work. Therefore, the current data quantity value L (t) of the output buffer is introduced as the control target of the PID controller, and the corresponding e (t) is the preset data quantity target value L of the output buffer0Minus L (t).
Secondly, we also need to determine the control amount u (t) of the PID controller, in order to keep the data amount value L (t) of the output buffer at the target value L of the data amount0Nearby, control of image scale rotation is requiredThe output timing of the module is changed, but in order to ensure the stability of the output timing, only Hbp and/or Hfp change is expected to be seen, and Vfp and Vbp are always constant. Then the controlled variable of the PID controller is Hbp and/or Hfp, and u (t) corresponds to the variation value of Hbp and/or Hfp in the output timing of the image scaling module.
One skilled in the art first sets K as desiredp、Ti、TdWhen L (t) < L0When e (t) > 0 shows that the output time sequence of the output buffer region is faster at the moment, if u (t) > 0 calculated according to the control law of the PID controller, Hbp and/or Hfp will become larger, so that the output time sequence of the output buffer region becomes slower. When L (t) > L0If e (t) < 0, which indicates that the output timing of the output buffer is slow at this time, u (t) < 0 calculated according to the control law of the PID controller, Hbp and/or Hfp will be small, so that the output timing of the output buffer becomes fast.
Further, in step S1, the data amount target value L0Is half of the maximum data size of the output buffer.
Step S2: and the image size conversion module is internally provided with an output time sequence controller, and the output time sequence controller receives the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence adjusted by the PID controller and controls the output time sequence of the image data in the output buffer area.
Further, in step S2, the controlling the output timing of the image data in the output buffer specifically includes: keeping the longitudinal front shoulder value and the longitudinal back shoulder value of the image data output time sequence unchanged, and integrating and then superposing the front shoulder value and/or the back shoulder value change value to the original value of the transverse front shoulder value and/or the transverse back shoulder value.
In one embodiment, the host microprocessor sends video image data to the DDIC in video mode, and the DDIC then displays the image after 1.2 image size conversion. In this application scenario, according to formula (1) and formula (2) described in the background of the invention section, it can be calculated that Hbp, Hfp, Vbp, Vfp are not integers, we first round them,as initial values of Hbp, Hfp, Vbp, Vfp, then during image size conversion, the PID controller monitors the data amount of the output buffer, and sets Kp=0.2、Ti =0.1、TdAnd =0.05, the calculated u (t) is rounded and then is superposed on Hbp and Hfp, so that even output of an output time sequence can be realized without an offset phenomenon under the condition that an additional frame buffer area is not arranged, and meanwhile, the output buffer area is not full or empty.
In another aspect, the present embodiment provides an output timing adaptive adjustment system of an image size conversion module, including:
an input buffer for buffering input image data;
the transverse image size conversion module is used for receiving the image data output by the input buffer area and carrying out transverse size conversion filtering processing on the image data;
the longitudinal image size conversion module is used for receiving the image data processed by the transverse image size conversion module and performing longitudinal size conversion filtering processing on the image data;
the output buffer area is used for receiving and buffering the image data processed by the longitudinal image size conversion module and outputting the image data according to an output time sequence;
the PID controller is used for calculating the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence according to the data amount in the output buffer area; and
and the output time sequence controller is used for receiving the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence calculated by the PID controller, adjusting the front shoulder value and/or the back shoulder value of the image data output time sequence and controlling the output time sequence of the image data in the output buffer area.
FIG. 4 shows a block diagram of a PID controller based image size conversion module, with the input being a DPI video interface including VS/HS/DE data and the output also being a DPI video interface including VS/HS/DE data.
Firstly, input video image data can be firstly input into an input buffer area, a certain amount of data is cached in the input buffer area, then the video image data is sent to a transverse image size conversion module, the transverse image size conversion module is responsible for carrying out transverse image filtering processing, then the image data output by the transverse image size conversion module can be input into a longitudinal image size conversion module, the longitudinal image size conversion module is responsible for carrying out longitudinal image filtering processing, and an image passing through the longitudinal image size conversion module is changed into the image resolution required by the output of the image size conversion module. Then the video image data output by the vertical image size conversion module enters an output buffer area to wait for output. The timing of the output is controlled by an output timing controller.
When the image size conversion module works, the stability of an output time sequence needs to be ensured, namely video image data needs to be output constantly at a certain speed, in order to ensure that the video image data can be output constantly, two buffer areas for caching the video image data are an input buffer area and an output buffer area inside the image size conversion module, and the input buffer area and the output buffer area cannot be too large and only can cache 5-6 lines of video image data in consideration of the requirements of power consumption and area. When the data rate between the input timing and the output timing does not match, it may cause the output buffer to gradually read empty or to fill up. In order to determine the data amount of the current output buffer, the output buffer outputs an l (t) signal for recording the data amount of the current output buffer.
As described above, it is understood that the output buffer is not full and is not empty by only keeping the data amount of the output buffer at a certain level. Meanwhile, the rate of outputting video image data can be adjusted by controlling Hbp and/or Hfp of the output timing, thereby controlling the value of l (t).
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (6)

1. An output timing self-adaptive adjusting method of an image size conversion module is characterized by comprising the following steps:
s1: a PID controller is arranged in the image size conversion module, and the control law of the PID controller is as follows:
Figure 891705DEST_PATH_IMAGE001
wherein e (t) is an error function, e (t) represents the offset of the output time sequence relative to the input time sequence at the time t;
u (t) is a change value of a front shoulder value and/or a rear shoulder value of an image data output time sequence at the time t;
Kpbeing a dimensionless scale parameter, Ti、TdRespectively an integral control rate parameter and a differential control rate parameter of a time dimension;
s2: and the image size conversion module is internally provided with an output time sequence controller, and the output time sequence controller receives the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence adjusted by the PID controller and controls the output time sequence of the image data in the output buffer area of the image size conversion module.
2. The adaptive output timing adjustment method according to claim 1, wherein e (t) satisfies the following equation:
Figure 700523DEST_PATH_IMAGE002
wherein the content of the first and second substances,
l (t) is the data quantity value of an output buffer area in the image size conversion module at the time t;
L0the data amount is a preset target value of the data amount of the output buffer.
3. The adaptive output timing adjustment method according to claim 2, wherein in step S1, the target data amount value is half of the maximum data amount value of the output buffer.
4. The adaptive output timing adjustment method according to claim 1, wherein in step S2, the controlling of the output timing of the image data in the output buffer includes: keeping the longitudinal front shoulder value and the longitudinal back shoulder value of the image data output time sequence unchanged, and integrating and then superposing the front shoulder value and/or the back shoulder value change value to the original value of the transverse front shoulder value and/or the transverse back shoulder value.
5. An output timing adaptive adjustment system of an image size conversion module, comprising:
an input buffer for buffering input image data;
the transverse image size conversion module is used for receiving the image data output by the input buffer area and carrying out transverse size conversion filtering processing on the image data;
the longitudinal image size conversion module is used for receiving the image data processed by the transverse image size conversion module and performing longitudinal size conversion filtering processing on the image data;
the output buffer area is used for receiving and buffering the image data processed by the longitudinal image size conversion module and outputting the image data according to an output time sequence;
the PID controller is used for calculating the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence according to the data amount in the output buffer area; and
and the output time sequence controller is used for receiving the change value of the front shoulder value and/or the back shoulder value of the image data output time sequence calculated by the PID controller, adjusting the front shoulder value and/or the back shoulder value of the image data output time sequence and controlling the output time sequence of the image data in the output buffer area.
6. The adaptive output timing adjustment system according to claim 5, wherein the adjusting of the front shoulder value and/or the back shoulder value of the image data output timing is specifically: and keeping the longitudinal front shoulder value and the longitudinal back shoulder value of the image data output time sequence unchanged, and adjusting the transverse front shoulder value and/or the transverse back shoulder value of the image data output time sequence.
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