CN113643654A - Power loss optimization circuit of micro-display array passive driving circuit - Google Patents
Power loss optimization circuit of micro-display array passive driving circuit Download PDFInfo
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- CN113643654A CN113643654A CN202110942093.XA CN202110942093A CN113643654A CN 113643654 A CN113643654 A CN 113643654A CN 202110942093 A CN202110942093 A CN 202110942093A CN 113643654 A CN113643654 A CN 113643654A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
The invention discloses a micro-display array passive driving circuit power loss optimization circuit, belonging to the technical field of light emitting array passive driving, which is characterized by comprising the following components: the display light-emitting array is used for displaying image information and/or text information; the power supply driving module is used for generating a driving signal, and the driving signal is used for controlling the light emitting state of the display light emitting array pixel point; the passive connecting circuit completes the connection of the power driving module and the display light-emitting array; the logic control module is used for generating a time sequence signal, and the time sequence signal is used for controlling the working time sequence of the power supply driving module; the logic control module provides a driving logic command for the power driving module and selects the shortest connecting line according to the position of the pixel in the light-emitting array chip. According to the invention, two ends of each interconnecting line are connected with the output electrodes, selection is carried out through the logic control module, and the shortest loop path of the array pixels is selected, so that the purpose of reducing the loss of the passive driving line is achieved.
Description
Technical Field
The invention belongs to the technical field of passive driving of light emitting arrays, and particularly relates to a power loss optimization circuit of a micro-display array passive driving circuit.
Background
The display plays an increasingly important role in human social life, and particularly in the current information society, people cannot live away from the display. Computer screen, cell-phone screen and various intelligent wearing equipment all need the display screen. With the continuous progress of material science, the display technology has been developed dramatically, Liquid Crystal Display (LCD) and Organic Light Emitting Diode (OLED) display are two main flat panel display technologies, and in the future, the display based on inorganic Micro-LED is considered as one of the most promising next generation display technologies.
Displays are moving towards higher resolution, smaller pixel size and smaller pixel pitch, and more power efficient. Display systems with superior performance require good display materials, and do not depart from advanced driving strategies. The current display driving strategies are mainly divided into active driving and passive driving. The active driving effect is good, the array is suitable for large-size arrays, and the problems of high technical requirements, high cost and the like exist. Compared with active driving, passive driving has the advantages of being much lower in implementation difficulty and cost and beneficial to a small-size light-emitting array, but the problems of uneven light emission of array pixels and line loss in the passive driving need to be solved.
In 2011, Chao-Chyun An et al proposed a GaN micro-led array device with a flip-chip structure. The GaN micro light-emitting diode array adopts a passive driving mode.
In 2018, Ray-Hua Horng et al prepared and studied a red micro-led display made of AlGaInP epitaxial layers. The AlGaInP epitaxial layer is bonded to the double-side polished sapphire substrate by a wafer bonding technique. The light emitting array adopts a passive driving mode, takes an indium tin oxide material as a column interconnection line, researches the relation between the photoelectric characteristic of each pixel and an address line, and results show that the light emitting performance of the array is improved by adopting ITO as the interconnection line.
In 2020, Shuo-Huang Yuan et al prepared an InGaN-based blue micro light emitting diode display. By adopting a passive driving mode, thick titanium/aluminum/titanium/gold interconnection metal is deposited on an n-type GaN region to reduce interconnection resistance, and the influence of the existence of the interconnection metal on a light emitting array is researched. The results show that micro-led arrays with interconnect metal have better electrical performance uniformity than conventional micro-led arrays.
In 2017, Chang-Mo Kang et al produced a color tunable display consisting of two passive matrix micro light emitting diode array chips. The blue array and the green array both adopt a passive driving mode, and one end of each row-column interconnection line in the array is connected with the output electrode.
In the traditional display array passive driving method, only one end of each row-column interconnection line is connected with the output electrode, so that the distance from some pixels to the output electrode is larger, and the line loss is larger.
Disclosure of Invention
Aiming at the problem of large loss of the passive driving circuit, the invention provides a power loss optimization circuit of a micro-display array passive driving circuit.
The invention aims to provide a power loss optimization circuit of a micro-display array passive driving circuit, which at least comprises:
the display light-emitting array is used for displaying image information and/or text information;
the power supply driving module is used for generating a driving signal, and the driving signal is used for controlling the light emitting state of the display light emitting array pixel point;
the passive connecting line completes the connection of the power driving module and the display light-emitting array; the passive connection circuit comprises a row selection circuit and a column selection circuit, driving electrodes are arranged at two ends of the row selection circuit and two ends of the column selection circuit, and the driving electrodes are connected with the power supply driving module; the power driving module provides driving current for the driving electrode;
the logic control module is used for generating a time sequence signal, and the time sequence signal is used for controlling the working time sequence of the power supply driving module; the logic control module provides a driving logic command for the power driving module and selects the shortest connecting line according to the position of the pixel in the light-emitting array chip.
Preferably, the display light-emitting array is composed of n rows and m columns of display pixels, each display pixel is an individual light-emitting diode element and is provided with an individual p electrode and an individual n electrode; wherein: m and n are positive integers.
Preferably, the passive connection line is composed of a silicon plate, a row selection line, silicon nitride, a column selection line, p and n electrodes, and a row selection electrode and a column selection electrode.
Preferably, the silicon plate includes n row selection lines, m column selection lines, 2n row selection electrodes, and 2m column selection electrodes; the first layer on the silicon plate is a row selection circuit and a row selection electrode and is defined through a photoetching process; the second layer is silicon nitride for protecting the row selection line; the third layer is a column selection line and a column selection electrode which are defined by a photoetching process; the fourth layer is silicon nitride for protecting the row selection line; and finally, defining p and n electrode holes, a row selection electrode and a column selection electrode through a photoetching process, and generating the p and n electrodes through metal evaporation and stripping.
Preferably, each array pixel is connected with a row selection line and a column selection line, namely the row selection line and the column selection line correspond to the display light-emitting array, the row selection line and the column selection line have 4 ports, and the light-emitting diodes at the intersection points of the rows and the columns form 4 working circuits; are respectively (m, n), (m, n)*)、(m*N) and (m)*、n*) (ii) a Taking the ith row and jth column pixel, whose coordinate is (i, j), if
Selecting a path (m, n); if it is
Then selectSelect path (m, n)*) (ii) a If it is
Then a path (m) is selected*N); if it is
Then a path (m) is selected*、n*) (ii) a Here, the
Rounded to an integer.
Preferably, the power driving module includes: the device comprises a row driving chip SM5166PC, a column driving chip SM16206, a row selection chip 74HC138D, a voltage stabilization chip AMS1117-3.3, a switching port and a fpc connector; wherein:
the adapter interface completes the connection between the driving chip and the logic control module; the row selection chip 74HC138D is connected with the row driving chip SM5166 PC;
the row driving chip SM5166PC is connected with the fpc connector and is used for completing the function of row scanning;
the column driver chip is connected to the fpc connector to complete column data transmission.
The display light emitting array includes light emitting diodes made of organic or inorganic materials.
Preferably, the p-electrode and the n-electrode of the light emitting diode are respectively connected with a row selection line and a column selection line in the passive connection line, or the p-electrode and the n-electrode are respectively connected with a column selection line and a row selection line in the passive connection line.
The invention has the advantages and positive effects that:
according to the invention, two ends of each interconnecting line are connected with the output electrodes, selection is carried out through the logic control module, and the shortest loop path of the array pixels is selected, so that the purpose of reducing the loss of the passive driving line is achieved.
Drawings
FIG. 1 is a system block diagram of a preferred embodiment of the present invention;
FIG. 2 is a schematic diagram of a light emitting array structure according to a preferred embodiment of the present invention;
FIG. 3 is a schematic diagram of a passive connection circuit according to a preferred embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating the connection between the light emitting array and the passive connection circuit according to the preferred embodiment of the present invention;
Detailed Description
In order to further understand the contents, features and effects of the present invention, the following embodiments are illustrated and described in detail with reference to the accompanying drawings:
as shown in fig. 1 to 4, the technical solution of the present invention is:
a power loss optimization circuit of a micro-display array passive driving circuit structurally comprises a display light emitting array, a passive connecting circuit, a power supply driving module and a logic control module. Wherein:
and the display light-emitting array is used for displaying image information or character information.
And the passive connecting circuit consists of a silicon plate, a row selection circuit, silicon nitride, a column selection circuit, p and n electrodes, a row selection electrode and a column selection electrode. And the passive connection circuit completes the connection of the power driving module and the display light-emitting array. The silicon plate comprises n row selection lines, m column selection lines, 2n row selection electrodes and 2m column selection electrodes. The first layer on the silicon plate is a row selection circuit and a row selection electrode and is defined through a photoetching process; the second layer is silicon nitride for protecting the row selection line; the third layer is a column selection line and a column selection electrode which are defined by a photoetching process; the fourth layer is silicon nitride for protecting the row selection line; and finally, defining p and n electrode holes, a row selection electrode and a column selection electrode through a photoetching process, and generating the p and n electrodes through metal evaporation and stripping.
The power driving module is used for generating driving signals for enabling the display light-emitting array to emit light and comprises a row driving chip, a column driving chip, a switching interface, a voltage stabilizing chip, an fpc connector and a capacitor resistor. The power driving module is connected with the logic control module.
And the logic control module generates a time sequence signal for controlling the power supply driving module so as to control the display light-emitting array to display a specific character.
The power driving module is connected with the display light-emitting array through a passive connecting circuit to drive the pixels of the light-emitting array to work.
The logic control module controls the working logic of the power supply driving module, and further realizes the control of the display luminous array pixels. The logic control module selects the shortest passive connection circuit path according to the position of the pixels of the light emitting array, so that the purpose of reducing the power loss of the light emitting array circuit is achieved.
The display light-emitting array is composed of n rows and m columns of display pixels (m and n are positive integers), each pixel is an independent light-emitting diode element, the array pixels are independent and are provided with independent p and n electrodes, and the structural schematic diagram of the display light-emitting array is shown in the attached figure 2 of the specification.
The passive connection circuit corresponds to the display light emitting array and is composed of n row selection circuits and m column selection circuits, the row selection circuits and the column selection circuits are insulated from each other, and output electrodes are arranged at two ends of each row line and column line and are connected with a driving circuit of the power driving module. The lines are represented numerically at one end and numerically plus asterisk at the other end. The schematic diagram of the passive connection circuit structure is shown in the specification and attached figure 3.
The n rows and the m columns of passive connecting circuits are correspondingly connected with the display light-emitting array, and the p electrodes and the n electrodes of the light-emitting diodes are respectively connected with row selection circuits and column selection circuits in the passive connecting circuits, or the p electrodes and the n electrodes are respectively connected with the column selection circuits and the row selection circuits in the passive connecting circuits. The schematic diagram of the connection structure is shown in the attached figure 4 in the specification.
The light emitting diodes in the n-th row and m-th column (m and n are any row and column numbers) in the display light emitting array correspond to four passive driving loops, and are represented as (m, n), (m, n) by port numbers*)、(m*N) and (m)*、n*)。
The power driving module is connected with (m, n), (m, n)*)、(m*N) and (m)*、n*) And providing a driving current for the light emitting array.
A logic control module according toPixel position selection (m, n), (m, n) in display light emitting array*)、(m*N) and (m)*、n*) The shortest loop path. Taking the ith row and jth column pixel, whose coordinate is (i, j), if
Selecting a path (m, n); if it is
Then path (m, n) is selected*) (ii) a If it is
Then a path (m) is selected*N); if it is
Then a path (m) is selected*、n*) (ii) a Here, the
Rounded to an integer.
The display light-emitting array can be a light-emitting array which is formed by light-emitting diodes made of organic or inorganic materials and arranged in rows and columns;
the passive connection circuit comprises a row selection circuit and a column selection circuit, and driving electrodes are arranged at two ends of the row selection circuit and the column selection circuit and are connected with the power supply driving module.
The passive driving module can provide driving current for driving electrodes at two ends of a row selection line and a column selection line of the passive connection line to drive the light emitting diodes in the light emitting array to work.
The logic control module can provide a driving logic command for the power driving module, and selects the shortest connecting line according to the pixel position in the light-emitting array chip, so that the power loss of the device line is reduced.
And the p electrode and the n electrode of the light emitting diode of the display light emitting array are respectively connected with a row selection line and a column selection line in the passive connection line, or the p electrode and the n electrode are respectively connected with the column selection line and the row selection line in the passive connection line.
The line selection circuit and the column selection circuit of the passive connection circuit are mutually insulated, the line selection circuit and the column selection circuit correspond to the display light-emitting array, the line selection circuit and the column selection circuit have 4 ports, and the light-emitting diodes at the intersection point of the line and the column can form 4 working circuits.
The output driving current switch, the driving current and the output current port of the power driving module can be controlled by the logic control module.
The logic control module can select the shortest loop of the 4 working loops of the light-emitting diode passive connection circuit to work through the power driving module, so that the power loss of the light-emitting array circuit is reduced.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the scope of the technical solution of the present invention.
Claims (8)
1. A micro display array passive driving line power loss optimization circuit is characterized by at least comprising:
a display light emitting array for displaying image information;
the power supply driving module is used for generating a driving signal, and the driving signal is used for controlling the light emitting state of the display light emitting array pixel point;
the passive connecting line completes the connection of the power driving module and the display light-emitting array; the passive connection circuit comprises a row selection circuit and a column selection circuit, driving electrodes are arranged at two ends of the row selection circuit and two ends of the column selection circuit, and the driving electrodes are connected with the power supply driving module; the power driving module provides driving current for the driving electrode;
the logic control module is used for generating a time sequence signal, and the time sequence signal is used for controlling the working time sequence of the power supply driving module; the logic control module provides a driving logic command for the power driving module and selects the shortest connecting line according to the position of the pixel in the light-emitting array chip.
2. The circuit of claim 1, wherein the display light array comprises n rows and m columns of display pixels, each display pixel being a separate led element having separate p and n electrodes; wherein: m and n are positive integers.
3. The microdisplay array passive drive line power loss optimization circuit of claim 1 in which the passive connecting lines are comprised of silicon plates, row select lines, silicon nitride, column select lines, p, n electrodes, and row and column select electrodes.
4. The microdisplay array passive drive circuit power loss optimizing circuit of claim 3 in which the silicon panel comprises n row select lines, m column select lines, 2n row select electrodes and 2m column select electrodes; the first layer on the silicon plate is a row selection circuit and a row selection electrode; the second layer is silicon nitride for protecting the row selection line; the third layer is a column selection circuit and a column selection electrode; the fourth layer is silicon nitride for protecting the row selection line; and finally, defining p and n electrode holes, a row selection electrode and a column selection electrode through a photoetching process, and generating the p and n electrodes through metal evaporation and stripping.
5. The microdisplay array passive driving circuit power loss optimizing circuit of claim 1, wherein each array pixel is connected with a row selection circuit and a column selection circuit, i.e. the row selection circuit and the column selection circuit correspond to the display luminescent array, the row selection circuit and the column selection circuit have 4 ports, and the light emitting diodes at the intersection point of the row and the column form 4 working circuits; are respectively (m, n), (m, n)*)、(m*N) and (m)*、n*) (ii) a Taking the ith row and jth column pixel, whose coordinate is (i, j), if
Selecting a path (m, n); if it is
Then path (m, n) is selected*) (ii) a If it is
Then a path (m) is selected*N); if it is
Then a path (m) is selected*、n*) (ii) a Here, the
Rounded to an integer.
6. The power consumption optimization circuit of claim 1, wherein the power driving module comprises: the device comprises a row driving chip, a column driving chip, a row selection chip, a voltage stabilizing chip, a switching interface and an fpc connector; wherein:
the adapter interface completes the connection between the driving chip and the logic control module; the row selection chip is connected with the row driving chip;
the line driving chip is connected with the connector and is used for completing the line scanning function;
the column driving chip is connected with the connector and used for completing a column data transmission function.
7. The microdisplay array passive drive line power loss optimizing circuit of claim 1 in which the display illumination array comprises light emitting diodes made of organic or inorganic materials.
8. The microdisplay array passive driving line power loss optimizing circuit of claim 2 in which the p-electrodes and n-electrodes of the leds are connected to row select lines and column select lines, respectively, or the p-electrodes and n-electrodes are connected to column select lines and row select lines, respectively, in the passive connection lines.
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2021
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| CN1163000A (en) * | 1994-09-09 | 1997-10-22 | 狄肯研究公司 | Display panel with electrically-controlled waveguide-routing |
| US6556182B1 (en) * | 1999-08-31 | 2003-04-29 | Hitachi, Ltd. | Liquid crystal display device having an improved video line driver circuit |
| CN1748237A (en) * | 2003-02-14 | 2006-03-15 | 皇家飞利浦电子股份有限公司 | Electronic device with electrostatic discharge protection circuitry |
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