CN113641048A

CN113641048A - Display device

Info

Publication number: CN113641048A
Application number: CN202110709686.1A
Authority: CN
Inventors: 颜崇纹; 刘侑宗; 王兆祥; 李淂裕
Original assignee: Innolux Display Corp
Current assignee: Innolux Corp
Priority date: 2015-08-28
Filing date: 2015-08-28
Publication date: 2021-11-12
Also published as: CN106483724A

Abstract

The invention discloses a display device, comprising: a first substrate; an active layer on the first substrate; a first electrode layer on the first substrate, the first electrode layer including a gate line extending in a first direction; and a second electrode layer on the first substrate, the second electrode layer including a conductive pattern and a data line extending in a second direction, wherein the first direction is orthogonal to the second direction, and the data line and the conductive pattern are electrically connected to the active layer through a first contact hole and a second contact hole, respectively, wherein the active layer has a U-shape in a plan view direction, and the active layer has a first portion and a second portion extending in the second direction and having different lengths, and a third portion connecting the first portion and the second portion.

Description

Display device

The application is a divisional application of Chinese invention patent application (application number: 201510539786.9, application date: 2015, 08 and 28 days, invention name: display device).

Technical Field

The present invention relates to a display device.

Background

Liquid Crystal Displays (LCDs) have the advantages of low radiation, small size, and low power consumption, and have gradually replaced conventional Cathode Ray Tube (CRT) displays, so they are widely used in information products such as notebook computers, Personal Digital Assistants (PDAs), flat panel televisions, or mobile phones.

In a conventional driving method of a liquid crystal display, an external source driver (source driver) and a gate driver (gate driver) are used to drive pixels on a panel to display an image, and in recent years, a technology of directly manufacturing a driving circuit structure on a display panel, for example, integrating the gate driver on the liquid crystal panel, has been developed.

However, since the gate and the drain of the conventional tft are prone to have parasitic capacitance, the pixel unit is affected by the parasitic capacitance during driving, which results in a so-called feed-through effect. The feedthrough effect may cause a flicker (image flicker) on the display device, thereby causing a degradation of the display device.

Disclosure of Invention

To solve the above problem, according to an embodiment of the present invention, there is provided a display device including: a first substrate; an active layer on the first substrate; a first electrode layer on the first substrate, the first electrode layer including a gate line extending in a first direction; and a second electrode layer on the first substrate, the second electrode layer including a conductive pattern and a data line extending in a second direction, wherein the first direction is orthogonal to the second direction, and the data line and the conductive pattern are electrically connected to the active layer through a first contact hole and a second contact hole, respectively, wherein the active layer has a U-shape in a plan view direction, and the active layer has a first portion and a second portion extending in the second direction and having different lengths, and a third portion connecting the first portion and the second portion.

In order to make the features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a schematic plan view of a display device according to an embodiment of the invention;

FIGS. 2A to 2F are schematic cross-sectional views of the display device of FIG. 1 along the line 2-2';

fig. 3 to 5 are schematic plan views of display devices according to other embodiments of the present invention;

FIGS. 6A to 6F are schematic cross-sectional views of the display device shown in FIG. 5 along line 6-6';

fig. 7 to 8 are schematic plan views of display devices according to other embodiments of the present invention.

Description of the symbols

10 a display device;

12 a first substrate;

14 an active layer;

14A first active layer portion;

14B a second active layer portion;

16a first electrode layer;

a 16A gate line;

a 16B projection;

16C a first gate line portion;

16D second gate line portions;

18a second electrode layer;

18A data lines;

18B conductive pattern

18B1 first conductive pattern part

18B2 second conductive pattern part

19 interface (L)

2-2' tangent line

20 first insulating layer

21 contact hole

22 second insulating layer

23 contact hole

24 third insulating layer

25 non-planar side surfaces

27 contact hole

6-6' tangent line

Maximum width of A

B maximum width

Minimum distance D1

Minimum distance D2

Minimum distance D3

Maximum width of W1

Maximum width of W2

X first direction

Y second direction

Detailed Description

The display device of the present invention will be described in detail below. It is to be understood that the following description provides many different embodiments, or examples, for implementing different aspects of the invention. The specific elements and arrangements described below are merely illustrative of the invention. These are, of course, merely examples and are not intended to be limiting. Moreover, repeated reference numerals or designations may be used in various embodiments. These iterations are merely for simplicity and clarity in describing the present invention and are not intended to represent any interrelationship between the different embodiments and/or architectures discussed. Furthermore, when a first material layer is located on or above a second material layer, the first material layer and the second material layer are in direct contact. Alternatively, it is also possible to space one or more layers of other materials, in which case there may not be direct contact between the first and second layers of material.

It is to be understood that the elements specifically described and illustrated may exist in various forms well known to those skilled in the art. Further, when a layer is "on" another layer or a substrate, it may mean "directly on" the other layer or the substrate, or that the layer is on the other layer or the substrate, or that the other layer is interposed between the other layer and the substrate.

And in the drawings, the shape or thickness of the embodiments may be exaggerated for simplicity or convenience. Moreover, while the invention has been described in connection with specific embodiments thereof, it should be understood that it is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

Furthermore, the use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a claim element does not by itself connote any preceding element or element of a claim element, nor does it denote the order of a certain claimed element or element from another claimed element or method of manufacture, but are used merely to distinguish one claimed element having a certain name from another claimed element having a same name.

The display device according to the embodiment of the invention can reduce parasitic capacitance (parasitic capacitance) between the gate line and the conductive pattern (for example, as a drain) with a specific shape design, so as to reduce a feed-through effect (feed-through effect), avoid a phenomenon of image flicker of the display device, and increase the performance of the display device. The display device according to the embodiments of the invention may include a low-temperature polysilicon thin film transistor (LTPS-TFT), wherein the LTPS-TFT may be, for example, L-type or U-type as an active layer of a channel.

Referring to fig. 1, a schematic plan view of a display device 10 according to an embodiment of the invention is shown, in which only a first substrate, an active layer, a first electrode layer, and a second electrode layer are shown, and other elements (for example, the second substrate, a display medium layer located between the first substrate and the second substrate, such as a liquid crystal layer) are omitted to illustrate the relationship between the active layer, the first electrode layer, and the second electrode layer. The display device 10 includes an active layer 14 disposed on a first substrate 12. The active layer 14 can be composed of a first active layer 14A and a second active layer 14B, wherein the first active layer 14A extends along a first direction X and the second active layer 14B extends along a second direction Y, wherein the first direction X is orthogonal to the second direction Y, which is orthogonal in the embodiments of the present invention, meaning that the first direction X and the second direction Y have a 90 degree included angle and allow an error of plus or minus 10 degrees, and the first active layer 14A is connected to the second active layer 14B. The active layer 14 may be, for example, L-shaped, as shown in fig. 1. A first electrode layer 16 is disposed on a first insulating layer (not shown), wherein the first insulating layer is disposed on the first substrate 12 and covers the active layer 14. In other words, the first electrode layer 16 is separated from the active layer 14 by the first insulating layer. The first electrode layer 16 may include a gate line 16A extending along a first direction X and a protrusion 16B extending along a second direction Y, and the gate line 16A is connected to the protrusion 16B. The first electrode layer 16 may be, for example, T-shaped, as shown in fig. 1. The protruding portion 16B of the first electrode layer 16 partially overlaps the first active layer portion 14A of the active layer 14, and the gate line 16A of the first electrode layer 16 partially overlaps the second active layer portion 14B of the active layer 14. A second insulating layer (not shown) may be disposed over the first insulating layer and cover the first electrode layer 16. A second electrode layer 18 is disposed on the second insulating layer.

Still referring to fig. 1, the second electrode layer 18 includes a data line 18A and a conductive pattern 18B extending along the second direction Y, wherein the data line 18A and the conductive pattern 18B are electrically connected but not directly contacted, and the data line 18A and the conductive pattern 18B are respectively located at left and right sides of the protrusion 16B of the first electrode layer 16. In other words, the projection of the data line 18A onto the first substrate 12 and the projection of a part of the conductive pattern 18B onto the first substrate 12 are separated by the projection of the protrusion 16B of the first electrode layer 16 onto the first substrate 12, i.e. the projection of the protrusion 16B of the first electrode layer 16 onto the first substrate 12 is arranged between the projection of the data line 18A onto the first substrate 12 and the projection of a part of the conductive pattern 18B onto the first substrate 12. The data line 18A is electrically connected to the active layer 14 through a contact hole (not shown) penetrating the first and second insulating layers, and the conductive pattern 18B is electrically connected to the active layer 14 through another contact hole (not shown) penetrating the first and second insulating layers.

The conductive pattern 18B is composed of a first conductive pattern part 18B1 and a second conductive pattern part 18B2, and the first conductive pattern part 18B1 is disposed between the second conductive pattern part 18B2 and the gate line 16A, i.e., the second conductive pattern part 18B2 and the gate line 16A are separated by the first conductive pattern part 18B 1. In detail, the projection of the first conductive pattern part 18B1 on the first substrate 12 is disposed between the projection of the second conductive pattern part 18B2 on the first substrate 12 and the projection of the gate line 16A on the first substrate 12. The first conductive pattern part 18B1 is connected to the second conductive pattern part 18B2, and an interface 19 is formed between the first conductive pattern part 18B1 and the second conductive pattern part 18B2, and the interface 19 extends along the first direction X, as shown in fig. 1.

In addition, the projection of the second conductive pattern part 18B2 on the first substrate 12 and the projection of the protruding part 16B on the first substrate 12 at least partially overlap in the second direction Y. Here, the first conductive pattern part 18B1 has a maximum width a in the first direction X, the second conductive pattern part 18B2 has a maximum width B in the first direction X, and the maximum width a is smaller than the maximum width B, so as to reduce a parasitic capacitance (parasitic capacitance) generated between the conductive pattern 18B and the first electrode layer 16 (e.g., the protrusion 16B) due to overlapping, thereby reducing a feed-through effect (feed-through effect) and avoiding a display flicker (image flicker) phenomenon.

According to some embodiments of the present invention, the first maximum width A may be between about 2.0 μm and 14.0 μm, the second maximum width B may be between about 3.0 μm and 15.0 μm, and the ratio of the first maximum width A to the second maximum width B is between 0.50 and 0.90, preferably between 0.75 and 0.85. Furthermore, according to an embodiment of the present invention, to further reduce the feedthrough effect, the minimum distance D1 between the projection of the first conductive pattern part 18B1 and the projection of the protrusion part 16B to the first substrate 12 may be greater than 0. According to an embodiment of the invention, the minimum distance D1 may be between about 0.1 μm and 1.0 μm.

Fig. 2A to 2F are a series of cross-sectional views taken along line 2-2' of fig. 1 to illustrate a manufacturing process of the display device 10 of fig. 1. First, referring to fig. 2A, a first substrate 12 is provided, and an active layer 14 is formed thereon. The first substrate 12 may be quartz, glass, silicon, metal, plastic, or ceramic material. The active layer 14 may be L-shaped, for example. As shown in fig. 1, the active layer 14 may be composed of a first active layer 14A and a second active layer 14B, wherein the first active layer 14A extends along a first direction X and the second active layer 14B extends along a second direction Y, and the first active layer 14A is connected to the second active layer 14B. The active layer 14 may be Low Temperature Polysilicon (LTPS), Indium Gallium Zinc Oxide (IGZO), or other metal oxide semiconductor materials commonly used in the art, but the invention is not limited thereto.

Next, referring to fig. 2B, a first insulating layer 20 is formed on the first substrate 12 and covers the active layer 14. The material of the first insulating layer 20 may be an organic insulating material (e.g., photosensitive resin) or an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or a combination thereof). Next, referring to fig. 2C, a first electrode layer 16 is formed on the first insulating layer 20, wherein the first electrode layer 16 includes a gate line 16A extending along a first direction X and a protrusion 16B extending along a second direction Y, and the gate line 16A is connected to the protrusion 16B (see fig. 1). The first electrode layer 16 may be made of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), platinum (Pt), iridium (Ir), nickel (Ni), chromium (Cr), silver (Ag), gold (Au), tungsten (W), or an alloy thereof.

Next, referring to fig. 2D, a second insulating layer 22 is formed on the first insulating layer 20 and covers a portion of the first electrode layer 16. The material of the second insulating layer 22 can be an organic insulating material (e.g., photosensitive resin) or an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or a combination thereof), and the material of the second insulating layer 22 can be the same as or different from that of the first insulating layer 20. Next, referring to fig. 2E, contact holes 21 and 23 penetrating through the first insulating layer 20 and the second insulating layer 22 are formed to expose the upper surfaces of the second active layer portion 14B and the first active layer portion 14A, respectively.

Finally, a second electrode layer 18 is formed on the second insulating layer 22, as shown in fig. 2F and fig. 1. The second electrode layer 18 includes a data line 18A and a conductive pattern 18B extending along the second direction, wherein the data line 18A and the conductive pattern 18B are electrically connected but not directly contacted with each other, and the data line 18A and the conductive pattern 18B are respectively located at left and right sides of the protrusion 16B of the first electrode layer 16, that is, the projection of the protrusion 16B on the first substrate 12 is located between the projection of the data line 18A on the first substrate 12 and the projection of a part of the conductive pattern 18B on the first substrate 12. In addition, the data line 18A is electrically connected to the second active layer 14B through a contact hole 21 penetrating the first insulating layer 20 and the second insulating layer 22, and the conductive pattern 18B is electrically connected to the first active layer 14A through a contact hole 23 penetrating the first insulating layer 20 and the second insulating layer 22. According to some embodiments of the present invention, the display device 10 may further include a light-shielding layer (not shown) disposed on the first substrate 12 and below the active layer 14. The light-shielding layer can be, for example, a black matrix, the material of the black matrix can be an organic insulating material (e.g., photosensitive resin) or a metal material, and the active layer 14 and the light-shielding layer can be separated by an insulating layer (not shown).

According to another embodiment of the present invention, the minimum distance D1 between the projection of the first conductive pattern 18B1 and the projection of the protrusion 16B onto the first substrate 12 may be 0, i.e. the projection of the first conductive pattern 18B1 onto the first substrate 12 is adjacent to the projection of the protrusion 16B onto the first substrate 12, as shown in fig. 3. In addition, according to another embodiment of the present invention, a projection of the first conductive pattern portion 18B1 on the first substrate 12 and a projection of the protruding portion 16B on the first substrate 12 may partially overlap, and a distance of the overlap is about 0.1 μm to 0.5 μm in the first direction X, as shown in fig. 4.

Fig. 5 is a schematic plan view of a display device 10 according to another embodiment of the invention, in which only the first substrate, the active layer, the first electrode layer, and the second electrode layer are shown, and other elements (such as the second substrate, and a display medium layer (such as a liquid crystal layer, an insulating layer) between the first substrate and the second substrate are omitted to illustrate the relationship between the active layer, the first electrode layer, and the second electrode layer. The display device 10 includes an active layer 14 disposed on a first substrate 12. The active layer 14 may be composed of a first active layer 14A and a second active layer 14B, wherein a projection of the first active layer 14A to the first substrate 12 may be L-shaped, and is composed of a first portion extending along a first direction X and a second portion extending along a second direction Y, the second active layer 14B may extend along the second direction Y, and the first active layer 14A is connected to the second active layer 14B. The active layer 14 may be, for example, U-shaped, as shown in fig. 5. A first electrode layer 16 is disposed on a first insulating layer (not shown), wherein the first insulating layer is disposed on the first substrate 12 and covers the active layer 14. In other words, the first electrode layer 16 is separated from the active layer 14 by the first insulating layer. The first electrode layer 16 can be, for example, a gate line extending along the first direction X, and the first electrode layer 16 can be formed by a first gate line portion 16C and a second gate line portion 16D. The portion of the first electrode layer 16 overlapping the first active layer portion 14A is defined as the first gate line portion 16C, i.e. the projection of the first active layer portion 14A onto the first substrate 12 covers the projection of the first gate line portion 16C onto the first substrate 12. In addition, the portion of the first electrode layer 16 not overlapping the first active layer portion 14A is defined as the second gate line portion 16D, that is, the projection of the first active layer portion 14A on the first substrate 12 is adjacent to the projection of the second gate line portion 16D on the first substrate 12, that is, the projection of the first active layer portion 14A on the first substrate 12 does not overlap the projection of the second gate line portion 16D on the first substrate 12. A second insulating layer (not shown) may be disposed over the first insulating layer and cover the first electrode layer 16. A second electrode layer 18 is disposed on the second insulating layer.

Still referring to fig. 5, the second electrode layer 18 includes a data line 18A and a conductive pattern 18B extending along the second direction Y, wherein the data line 18A and the conductive pattern 18B are electrically connected but not directly contacted. The data line 18A is electrically connected to the active layer 14 through a contact hole (not shown) penetrating the first and second insulating layers, and the conductive pattern 18B is electrically connected to the active layer 14 through another contact hole (not shown) penetrating the first and second insulating layers. According to the embodiment of the present invention, the conductive pattern 18B has a non-flat side 25 (e.g., a concave edge), and the non-flat side 25 is a side of the conductive pattern 18B adjacent to the first electrode layer 16. In addition, a minimum distance D2 exists between the projection of the first gate line portion 16C and the projection of the conductive pattern 18B on the first substrate 12, and a minimum distance D3 exists between the projection of the second gate line portion 16D on the first substrate 12 and the projection of the conductive pattern 18B on the first substrate 12, wherein the minimum distance D2 is greater than the minimum distance D3, so as to reduce a parasitic capacitance (parasitic capacitance) between the conductive pattern 18B and the first electrode layer 16, thereby reducing a feed-through effect (fed through effect) and avoiding a display device image flicker (image flicker) phenomenon. According to some embodiments of the present invention, the minimum distance D2 may be between about 1.0 μm and 5.0 μm, the minimum distance D3 may be between about 0.5 μm and 4.5 μm, and the ratio of the minimum distance D3 to the minimum distance D2 (D3/D2) may be between about 0.50 and 0.95, preferably between 0.80 and 0.90.

Fig. 6A to 6F are a series of cross-sectional views taken along line 6-6' of fig. 5 to illustrate the manufacturing process of the display device 10 shown in fig. 5. First, referring to fig. 6A, a first substrate 12 is provided, and an active layer 14 is formed thereon. The first substrate 102 may be quartz, glass, silicon, metal, plastic, or ceramic material. The active layer 14 may be, for example, U-shaped. As shown in fig. 5, the active layer 14 may be composed of a first active layer 14A and a second active layer 14B, the projection of the first active layer 14A to the first substrate 12 is L-shaped, and is composed of a first portion extending along a first direction X and a second portion extending along a second direction Y, the second active layer 14B extends along the second direction Y, and the first active layer 14A is connected to the second active layer 14B. The active layer 14 may be Low Temperature Polysilicon (LTPS), Indium Gallium Zinc Oxide (IGZO), or other metal oxide semiconductor materials commonly used in the art, but the invention is not limited thereto.

Next, referring to fig. 6B, a first insulating layer 20 is formed on the first substrate 12 and covers the active layer 14. The material of the first insulating layer 20 may be an organic insulating material (e.g., photosensitive resin) or an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or a combination thereof). Next, referring to fig. 6C, a first electrode layer 16 is formed on the first insulating layer 20, wherein the first electrode layer 16 can extend along the first direction X and is used as a gate line. The first electrode layer 16 may be formed by a first gate line portion 16C and a second gate line portion 16D. The portion of the first electrode layer 16 overlapping the first active layer portion 14A is defined as the first gate line portion 16C, i.e. the projection of the first active layer portion 14A onto the first substrate 12 covers the projection of the first gate line portion 16C onto the first substrate 12. In addition, a portion of the first electrode layer 16 not overlapping with the first active layer portion 14A is defined as the second gate line portion 16D, that is, a projection of the first active layer portion 14A on the first substrate 12 is adjacent to a projection of the second gate line portion 16D on the first substrate 12, that is, a projection of the first active layer portion 14A on the first substrate 12 does not overlap with a projection of the second gate line portion 16D on the first substrate 12, as shown in fig. 5. The first electrode layer 16 may be made of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), platinum (Pt), iridium (Ir), nickel (Ni), chromium (Cr), silver (Ag), gold (Au), tungsten (W), or an alloy thereof.

Next, referring to fig. 6D, a second insulating layer 22 is formed on the first insulating layer 20 and covers the first electrode layer 16. The material of the second insulating layer 22 may be an organic insulating material (e.g., photosensitive resin) or an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or a combination thereof), and the material of the second insulating layer 22 may be the same as or different from the material of the first insulating layer 20. Next, referring to fig. 6E, contact holes 21 and 23 penetrating through the first insulating layer 20 and the second insulating layer 22 are formed to expose the upper surfaces of the first active layer portion 14A and the second active layer portion 14B, respectively.

Finally, a second electrode layer 18 is formed on the second insulating layer 22, as shown in fig. 6F and fig. 5. The second electrode layer 18 includes a data line 18A extending along the second direction Y and a conductive pattern 18B, wherein the data line 18A and the conductive pattern 18B are electrically connected but not directly contacted. In addition, the data line 18A is electrically connected to the second active layer portion 14B through the contact hole 23 penetrating the first insulating layer 20 and the second insulating layer 22, and the conductive pattern 18B is electrically connected to the first active layer portion 14A through the contact hole 21 penetrating the first insulating layer 20 and the second insulating layer 22. According to some embodiments of the present invention, the display device 10 may further include a light-shielding layer (not shown) disposed on the first substrate 12 and below the active layer 14. The light-shielding layer can be, for example, a black matrix, the material of the black matrix can be an organic insulating material (e.g., photosensitive resin) or a metal material, and the active layer 14 and the light-shielding layer can be separated by an insulating layer (not shown). According to other embodiments of the present invention, the projection of the light shielding layer on the first substrate 12 may partially overlap with the projection of the conductive pattern 18B on the first substrate 12, or the projection of the light shielding layer on the first substrate 12 may not overlap with the projection of the conductive pattern 18B on the first substrate 12.

Referring to fig. 7, the display device 10 further includes a third insulating layer 24 disposed on the second insulating layer (not shown) and covering the second electrode layer 18. A contact hole 27 penetrates through the third insulating layer 24 and exposes the conductive pattern 18B, so that a pixel electrode (not shown) formed later is electrically connected to the conductive pattern 18B through the contact hole 27. The projection of the contact hole 27 to the first substrate 12 has a maximum width W1 in the first direction X, and the projection of the contact hole 27 to the first substrate 12 has a maximum width W2 in the second direction Y, wherein the maximum width W1 is not equal to the maximum width W2. For example, the maximum width W1 of the contact hole 27 projected on the first substrate 12 in the first direction X may be greater than the maximum width W2 of the contact hole 27 projected on the first substrate 12 in the second direction Y, as shown in fig. 7. Thus, by the shape design of the contact hole 27, the width of the black matrix (not shown) shielding the gate line 16 and the contact hole 27 in the second direction Y can be reduced, thereby facilitating the improvement of the aperture ratio. Here, the maximum width W1 is between about 3.0 μm and 15.0 μm, the maximum width W2 is between about 2.0 μm and 13.0 μm, and the ratio of the maximum width W2 to the maximum width W1 (W2/W1) may be between about 0.5 and 0.8, preferably between 0.65 and 0.75.

On the other hand, referring to fig. 8, according to another embodiment of the present invention, the maximum width W1 of the projection of the contact hole 27 on the first substrate 12 in the first direction X may be smaller than the maximum width W2 of the projection of the contact hole 27 on the first substrate 12 in the second direction Y. Thus, by designing the shape of the contact hole 27, the pixel pitch (pixel pitch) can be reduced and the integration of the pixel unit can be increased while maintaining a certain contact area between the pixel electrode and the conductive pattern 18B. Here, the maximum width W1 is between about 2.0 μm and 13.0 μm, the maximum width W2 is between about 3.0 μm and 15.0 μm, and the ratio of the maximum width W1 to the maximum width W2 (W1/W2) is between about 0.5 and 0.8, preferably between 0.65 and 0.75.

Although the present invention has been disclosed in conjunction with the above embodiments, it should be understood that many modifications, substitutions and alterations may be made thereto without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification, but it is to be understood that any process, machine, manufacture, composition of matter, means, method and steps, presently existing or later to be developed, that will be obvious to one skilled in the art from this disclosure may be utilized according to the present application as many equivalents of the presently existing or later-developed embodiments of the present application are possible. Accordingly, the scope of the present application includes the processes, machines, manufacture, compositions of matter, means, methods, or steps described in the specification. In addition, each claim constitutes a separate embodiment, and the scope of protection of the present invention also includes combinations of the respective claims and embodiments.

Claims

1. A display device, comprising:

a first substrate;

an active layer on the first substrate;

a first electrode layer on the first substrate, the first electrode layer including a gate line extending in a first direction; and

and a second electrode layer on the first substrate, the second electrode layer including a conductive pattern and a data line extending in a second direction, wherein the first direction is orthogonal to the second direction, and the data line and the conductive pattern are electrically connected to the active layer through a first contact hole and a second contact hole, respectively, wherein the active layer has a U-shape in a top view direction, and the active layer has a first portion and a second portion extending in the second direction and having different lengths, and a third portion connecting the first portion and the second portion.

2. The display device of claim 1, wherein the conductive pattern has a non-flat side, the non-flat side is a side of the conductive pattern adjacent to the first electrode layer, and the non-flat side does not overlap with the gate line.

3. The display device of claim 2, wherein the non-flat side is a recessed edge facing the gate line.

4. The display device of claim 1, wherein the gate line comprises a first gate line portion and a second gate line portion, the first gate line portion overlaps the active layer, a projection of the first gate line portion onto the first substrate and a projection of the conductive pattern onto the first substrate have a first minimum distance, a projection of the second gate line portion onto the first substrate and a projection of the conductive pattern onto the first substrate have a second minimum distance, and the first minimum distance is different from the second minimum distance.

5. The display device of claim 4, wherein the first minimum distance is greater than the second minimum distance.

6. The display device of claim 4, wherein the gate line further comprises another gate line portion, and the another gate line portion overlaps the active layer.

7. The display device of claim 6, wherein the another gate line portion overlaps the data line.

8. The display device according to claim 1, wherein the conductive pattern is electrically connected to the second portion of the active layer through the second contact hole, and a width of the second contact hole in the first direction is larger than a width of the second portion in the first direction.

9. The display device according to claim 1, wherein a length of the second portion is greater than a length of the first portion, the second portion overlaps the conductive pattern, and the first portion overlaps the data line.

10. The display device of claim 1, wherein the first contact hole and the second contact hole are located on the same side of the gate line, and a distance between the first contact hole and the gate line in the second direction is different from a distance between the second contact hole and the gate line in the second direction.